861 lines
22 KiB
ArmAsm
861 lines
22 KiB
ArmAsm
********************************
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* *
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* Machine Detection *
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* *
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* Routines *
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* *
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* BY MARC GOLOMBECK *
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* *
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* VERSION 1.00 / 26.04.2019 *
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********************************
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*
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DSK detect
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MX %11
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ORG $901 ; routine starts at $0901
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*
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HOME EQU $FC58 ; CLEAR SCREEN
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COUT EQU $FDED ; PRINT CHARACTER
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KYBD EQU $C000 ; READ KEYBOARD
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STROBE EQU $C010 ; CLEAR KEYBOARD
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BELL EQU $FBDD ; RING BELL
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WAIT EQU $FCA8 ; WAIT A BIT
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PREAD EQU $FB1E ; switch to LORES
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VERTBLANK EQU $C019 ; vertical blanking -> available only IIe and above
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MEMCOPY EQU $FE2C ; monitor routine for copying RAM
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WRITERAM EQU $C081 ; read ROM write RAM - toggle 2 times
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READROM EQU $C082 ; read ROM no write - toggle 1 time
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READWRITE EQU $C083 ; read & write RAM - toggle 2 times
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READRAM EQU $C080 ; read RAM no write - toggle 1 time
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*
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bMB EQU $2078 ; MockingBoard available? ($00/No | $01 Yes)
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bMachine EQU $2079 ; auto detect Apple II machine type
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bMem EQU $207A ; 128k? ($00 No | $78 Yes)
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bZC EQU $207B ; ZIPchip installed? ($00/No | $01 Yes)
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bFC EQU $207C ; FastChip installed? ($00/No | $01 Yes)
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bLC EQU $207D ; Language Card available? ($00/No | $01 Yes)
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bMBSlot EQU $207E ; slot of MockingBoard ($01..$07)
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bRefresh EQU $207F ; byte REFRESH RATE ($00/50Hz | $01/60Hz)
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b65C02 EQU $20F8 ; byte CPU ($00/6502 | $01/65C02 | $FF/65816)
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bEmu EQU $20F9 ; emulator detection ($00/No | $01 Yes)
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*
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chkMEM EQU $0100 ; adress of AUX mem checking routine
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dest EQU $F8 ; + $F9
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MB_ADDRL EQU $06
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MB_ADDRH EQU $07
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TICKS EQU $09
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charFLAG EQU $FF ; only uppercase letters?
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*
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*
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* FastChip constants
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*
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FC_UNLOCK EQU $6A ; FastChip unlock value
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FC_LOCK EQU $A6 ; FastChip lock value
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FC_LOCK_REG EQU $C06A ; FastChip lock register
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FC_EN_REG EQU $C06B ; FastChip enable register
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FC_SPD_REG EQU $C06D ; FastChip speed register
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*
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INIT SEI ; just to be sure...
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JSR DETECTA2 ; get machine type
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STA $C000 ; 80STOREOFF
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STA $C008 ; zero Page = Main (+ $FXXX MAIN)
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*
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JSR COPYAUX ; copy main program to AUX-memory
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JSR COPYROM ; copy MONITOR to language card
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JMP chkMEM ; jump to short routine in Stack for checking AUX MEM size
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JSR DETECTCPU
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JSR DETECTREFRESH
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*
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JSR DETECTZIP ; detect and disable a ZIPchip
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JSR DETECTFC ; detect FastChip and set to 1 MHz
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JSR DETECTEMU ; detect possible emulator first
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JSR DETECTLC ; can we also detect a language card?
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JSR MB_DETECT ; detect MB-slot
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JSR HOME ; clear screen
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JSR PRTRES ; print detection results on screen
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*
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RTS
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*
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*
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*************************************************
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* COPY PROGRAM TO AUX MEMORY *
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*************************************************
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*
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COPYAUX
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STA $C002 ; read MAIN
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STA $C005 ; write AUX
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LDA #$09 ; set start adress HI-byte
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STA dest+1 ; for page copy
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LDA #0
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STA dest ; LO-byte
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*
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cpAUXlp2 LDY #0 ; loop over Y
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cpAUXlp1 LDA (dest),Y ; read from MAIN memory
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STA (dest),Y ; store to AUX memory at same address!
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INY
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BNE cpAUXlp1
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INC dest+1 ; increase HI-byte +1
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LDA dest+1 ; must include the MB-playing routine in code copy!
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CMP #$0d ; HI-Byte = $14? Copy until reaching $13FF!
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BNE cpAUXlp2 ; no, copy next page
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STA $C004 ; write MAIN
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LDA #>CODE
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STA dest+1
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LDA #<CODE ; -> copy MEM chk routine to Stack area
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STA dest
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LDY #0
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STY bMem ; init result byte
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cpSTACK LDA (dest),Y
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STA chkMEM,Y
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INY
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CPY #15
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BNE cpSTACK
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*
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RTS
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*
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*
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* copy monitor ROM
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*
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COPYROM LDY #$F8 ; copy Monitor-ROM to Language Card
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STY $3D
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STY $43
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LDY #$FF
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STY $3E
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STY $3F
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INY
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STY $3C
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STY $42
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LDA WRITERAM ; toggle Language Card RAM for writing
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LDA WRITERAM
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JSR MEMCOPY
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LDA READROM ; toggle Language Card off
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RTS
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*=============================================================================
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*
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* detect slot with MockingBoard
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*
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MB_DETECT LDA #0
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STA MB_ADDRL
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*
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MB_DET_lp LDA #$07 ; we start in slot 7 ($C7) and go down to 0 ($C0)
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STA bMBSlot ; slot with MB
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ORA #$C0 ; make it start with C
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STA MB_ADDRH
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LDY #04 ; $CX04
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LDX #02 ; 2 tries?
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MB_CHK_CYC LDA (MB_ADDRL),Y ; timer 6522 (Low Order Counter)
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* ; count down
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STA TICKS ; 3 cycles
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LDA (MB_ADDRL),Y ; + 5 cycles EQU 8 cycles
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* ; between the two accesses to the timer
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SEC
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SBC TICKS ; subtract to see if we had 8 cycles (accepted range 7-9)
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CMP #$f8 ; -8
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BEQ DEC_X
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CMP #$F9 ; -7 - range is necessary if FastChip is installed
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BEQ DEC_X
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CMP #$F7 ; -9
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BNE MB_NOT_SLOT
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DEC_X DEX ; decrement, try one more time
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BNE MB_CHK_CYC ; loop detection
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INX ; Mockingboard found (XEQU1)
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DONE_DET STX bMB ; store result to bMB
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RTS ; return
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*
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MB_NOT_SLOT DEC MB_DET_lp+1 ; decrement the "slot" (self_modify)
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BNE MB_DET_lp ; loop down to one
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LDX #00
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BEQ DONE_DET
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*=============================================================================
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*
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* detect type of Apple 2 computer
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*
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DETECTA2
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LDA #$FF
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STA charFLAG ; allow lower case output
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LDA $FBB3
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CMP #$06 ; IIe/IIc/IIGS = 06
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BEQ checkII ; if not II ($38) or II+ ($EA)
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_G22PLUS STA bMachine ; save $38 or $EA as machine byte
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LDA #%11011111 ; convert lowercase chars to uppercase
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STA charFLAG
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RTS
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*
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checkII LDA $FBC0 ; detect IIc
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BEQ _G2C ; 0 = IIc / Other = no IIc
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*
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SEC ; IIgs or IIe ?
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JSR $FE1F ; test for GS
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BCS _G2E ; if carry flag is set -> IIE
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*
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LDA #$FF ; IIGS -> $FF
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STA bMachine
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*=============================================================================
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*
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* condition some IIgs settings
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*
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LDA $C036 ; put IIgs in 8-bit-mode
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AND #$7F
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STA $C036 ; slow speed
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*
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LDA $C034 ;
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AND #$F0
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STA $C034 ; black border
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*
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LDA $C022
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AND #$F0 ; bit 0-3 at 0 = background black
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ORA #$F0 ; bit 7-4 at 1 = text white
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STA $C022 ; background black/text white
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RTS
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*
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_G2E LDA #$7F ; IIE -> $7F
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STA bMachine
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RTS
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*
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_G2C STA bMachine ; IIc -> $00
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RTS
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*=============================================================================
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*
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* detect CPU type
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*
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DETECTCPU
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LDA #00
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BRA _is65C02 ; results in a BRA +4 if 65C02/65816 or NOPs if 6502
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BEQ _contD ; a 6502 drops through directly to the BEQ here
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_is65C02 INC A ; 65C02/65816 arrives here
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* ; some 65816 code here
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XBA ; .byte $eb, put $01 in B accu -> equals a NOP for 65C02
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DEC A ; .byte $3a, A=$00 if 65C02
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XBA ; .byte $eb, get $01 back if 65816
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INC A ; .byte $1a, make $01/$02
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_contD STA b65C02
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RTS
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*=============================================================================
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*
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* detect and disable a ZIPchip
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*
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DETECTZIP
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LDA #$5A ; unlock ZC
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STA $C05A
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STA $C05A
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STA $C05A
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STA $C05A
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LDX #$00
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CACHE LDA ALTER,X ; put altering part of the code in the cache!
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INX
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BNE CACHE
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ALTER LDA $C05C ; Get the slot delay status
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EOR #$FF ; Flip it
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STA $C05C ; Save it
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CMP $C05C ; Correct?
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BNE NOZIP ; No, ZIP CHIP not found.
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EOR #$FF ; Get back old status
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STA $C05C ; Save it
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CMP $C05C ; Correct?
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BNE NOZIP ; No, ZIP CHIP not found.
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LDA #$00 ; other value as $5A or $A5
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STA $C05A ; will disable ZC
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LDA #$A5 ; lock ZC
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STA $C05A
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LDA #01
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STA bZC
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RTS
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NOZIP LDA #00
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STA bZC
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RTS
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*=============================================================================
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*
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* detect a FastChip and set speed to 1 MHz
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*
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DETECTFC LDA bMachine ; get machine type byte
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LDX #$00
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CMP #$7F ; Apple IIe
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BEQ chk_slot
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BNE not_found
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chk_slot LDY #$04 ; loop 4 times
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LDA #FC_UNLOCK ; load the unlock value
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unlock_lp STA FC_LOCK_REG ; store in lock register
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DEY
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BNE unlock_lp
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LDA #$00 ; MegaAudio check
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STA FC_EN_REG ; enable the Fast Chip
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LDY FC_EN_REG ; bit 7 will be high when enabled
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CPY #$80
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BNE not_found
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found LDA #$80 ; reset speed register
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STA FC_SPD_REG
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LDA #$09 ; set FC speed to 1.10 MHz
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STA FC_SPD_REG ; necessary for correct MB-detection!
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LDA #FC_LOCK
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STA FC_LOCK_REG ; lock the registers again
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LDA #$01
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STA bFC
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RTS
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not_found TXA
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STA bFC
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RTS
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*=============================================================================
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*
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* detect Language Card
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*
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DETECTEMU
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LDA #0
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STA bEmu ; set value to "real wood"
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LDX #0 ; read PDL(0)
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JSR PREAD
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STY PDL0 ; store value
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LDX #1 ; read PDL(0)
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JSR PREAD
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STY PDL1 ; store value
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LDX #2 ; read PDL(0)
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JSR PREAD
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STY PDL2 ; store value
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LDX #3 ; read PDL(0)
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JSR PREAD
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STY PDL3 ; store value
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*
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LDA #0
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STA PDL0+1
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STA PDL1+1
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STA PDL2+1
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STA PDL3+1
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CLC
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LDA PDL0 ; adding all read PDL values
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ADC PDL1 ; emulators mainly return #127 for PDL-read
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STA PDLsum ; real wood returns 255 if no paddle is connected
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LDA PDL0+1 ; or anything else (but mostly not 127 for all values)
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ADC PDL1+1
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STA PDLsum+1
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CLC
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LDA PDLsum ; adding all read PDL values
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ADC PDL2 ; emulators mainly return #127 for PDL-read
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STA PDLsum
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LDA PDLsum+1
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ADC PDL2+1
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STA PDLsum+1
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CLC
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LDA PDLsum ; adding all read PDL values
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ADC PDL3 ; emulators mainly return #127 for PDL-read
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STA PDLsum
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LDA PDLsum+1
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ADC PDL3+1
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STA PDLsum+1
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LDA PDLsum+1
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CMP #1
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BEQ Pchk1 ; check for 508 as magic number = 4*127
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JMP Pchk3
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Pchk1 LDA PDLsum
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CMP #252
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BEQ Pchk2
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JMP Pchk3
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Pchk2 ; magic number found
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INC bEmu ; bEmu = 1
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RTS
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*
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Pchk3 LDA PDL0 ; second check if first check fails
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CMP PDL1 ; PDL(0) = PDL(1)?
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BEQ Pchk3a ; yes -> check for other two values
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RTS ; values are different, likely real wood
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Pchk3a LDA PDL0 ; open gate? (=255) is likely to be real wood here with no joystick connected
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CMP #255
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BNE Pchk3b
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RTS
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Pchk3b LDA PDL2
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CMP PDL3
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BEQ Pchk2 ; assume emulator
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RTS
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PDL0 DS 2 ; paddle read values
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PDL1 DS 2
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PDL2 DS 2
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PDL3 DS 2
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PDLsum DS 2
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*=============================================================================
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*
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* detect Emulator
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*
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DETECTLC
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LDA $C083 ; turn on LC
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LDA $C083
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LDA $D000
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INC $D000
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CMP $D000
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BEQ noLCARD
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DEC $D000
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LDA #1 ; language card positive
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STA bLC ; -> might be an emulator!
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JMP exitEMU
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noLCARD LDA #0
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STA bLC
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LDA bEmu ; emulator detected?
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BNE exitEMU
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LDA #2 ; can't tell if running in an emulator -> sorry!
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STA bEmu
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exitEMU LDA $C081 ; turn off LC
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RTS
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*=============================================================================
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*
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* detect screen refresh rate
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*
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DETECTREFRESH
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LDA bMachine
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BEQ Refresh_IIC ; IIc -> another refresh detection method is necessary
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CMP #$EA
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BEQ _badguy ; II+ -> no detection possible
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CMP #$38
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BEQ _badguy ; II -> no detection possible
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_L1 CMP VERTBLANK ; works with IIGS/IIE
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BPL _L1 ; wait until the end of the vertical blank
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_L2 CMP VERTBLANK ; synchronizing counting algorithm
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BMI _L2 ; wait until the end of the complete display -> start of vertical blanking
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_BP3 INC COUNTREF ; 6 increment counter
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LDX #$09 ; wait for a certain number of cycles
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_WL3 DEX ;
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BNE _WL3 ; = 46 cycles
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; + 6 + 3 + 3 + 4 + 3 = 65 !
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LDA bMachine ; 3
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LDA bMachine ; 3
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CMP VERTBLANK ; 4
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Bpl _BP3 ; 3 -> repeat and increment counter until VBL is done
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LDA COUNTREF
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CMP #72 ; >= 72 equals 50 HZ (120*65 cycles of VBL)
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BCS _GO3
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LDA #01 ; 60HZ (VBL = 70x65 cycles)
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JMP _GO4
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_GO3 LDA #00 ; 50HZ (VBL = 120x65 cycles)
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_GO4 STA bRefresh
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RTS
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*
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_badguy LDA #$FF ; system without VBL-signal is a bad guy
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STA bRefresh
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RTS
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*
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Refresh_IIC ; specific treatment for Apple IIc
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STA $C070
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STA $C07F
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STA $C05B
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_l1 LDA $C019 ; preparation for the beginning of VBL
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bpl _l1
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STA $C070
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STA $C07F
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STA $C05B ; enable VBL interrupt
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_BP2 INC COUNTREF ; 6 increment counter
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LDX #$09 ;
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_WL1 DEX ;
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BNE _WL1 ; = 46 cycles
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; + 6 + 6 + 4 + 3 = 65 !
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NOP
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NOP
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NOP ; 3*2 = 6 additional cycles
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LDA $C019 ; waiting for the next VBL to begin
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bpl _BP2 ; 3 -> wait for vblflag = 1
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STA $C058+2 ; disable VBL int. Contains a complete VBL + one display. Exit on the beginning of
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LDA COUNTREF ; the next VBL gives = 192+70+(50) = $138 or ($106) hence $38 or $06
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CMP #$10 ; >= 16 hence 50 HZ
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BCS _GO1
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LDA #01 ; 60HZ
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JMP _GO2
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_GO1 LDA #00 ; 50HZ
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_GO2 STA bRefresh
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RTS
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COUNTREF DS 1
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*==============================================================
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*
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* print detection results on screen
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*
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PRTRES LDA #0 ; set cursor position
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STA $25
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JSR LFEED
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LDA #6 ; HTAB 6
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STA $24
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LDX #<T_APPLE
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LDY #>T_APPLE
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JSR PRINT
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JSR LFEED
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JSR LFEED
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LDA #7 ; HTAB 7
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STA $24
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LDX #<T_MACH
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LDY #>T_MACH
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JSR PRINT
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LDA bMachine
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BNE comp1 ; //c = $00?
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LDX #<T_COMP3
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LDY #>T_COMP3
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JSR PRINT
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JMP NEXT1
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comp1 CMP #$7F ; //e?
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BNE comp2
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LDX #<T_COMP1
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LDY #>T_COMP1
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JSR PRINT
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JMP NEXT1
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comp2 CMP #$FF ; IIgs?
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BNE comp3
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LDX #<T_COMP2
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LDY #>T_COMP2
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JSR PRINT
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JMP NEXT1
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comp3 CMP #$38 ; II?
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BNE comp4
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LDX #<T_COMP4
|
|
LDY #>T_COMP4
|
|
JSR PRINT
|
|
JMP NEXT1
|
|
|
|
comp4 CMP #$EA ; II?
|
|
BNE comp5
|
|
LDX #<T_COMP5
|
|
LDY #>T_COMP5
|
|
JSR PRINT
|
|
JMP NEXT1
|
|
|
|
comp5 LDX #<T_COMP6 ; unknown machine
|
|
LDY #>T_COMP6
|
|
JSR PRINT
|
|
|
|
NEXT1
|
|
JSR LFEED ; print CPU type
|
|
LDA #7 ; HTAB 7
|
|
STA $24
|
|
LDX #<T_CPU
|
|
LDY #>T_CPU
|
|
JSR PRINT
|
|
|
|
LDA b65C02
|
|
CMP #2 ; 65816 in any machine setting!
|
|
BEQ _s2_cpu
|
|
LDA b65C02
|
|
BEQ _s1_cpu ; 0 (6502)
|
|
BMI _s2_cpu ; >$7F (65816 or 65C802)
|
|
LDX #<T_CPU2 ; 1 (65C02)
|
|
LDY #>T_CPU2
|
|
JSR PRINT
|
|
JMP NEXT1a
|
|
_s1_cpu
|
|
LDX #<T_CPU1
|
|
LDY #>T_CPU1
|
|
JSR PRINT
|
|
JMP NEXT1a
|
|
_s2_cpu ; CPU is 65816 or 65C802
|
|
LDA bMachine
|
|
CMP #$FF
|
|
BEQ cpu816 ; is 65816
|
|
LDX #<T_CPU4 ; is 65C802
|
|
LDY #>T_CPU4
|
|
JSR PRINT
|
|
JMP NEXT1a
|
|
cpu816
|
|
LDX #<T_CPU3
|
|
LDY #>T_CPU3
|
|
JSR PRINT
|
|
|
|
NEXT1a JSR LFEED ; output RAM
|
|
LDA #7 ; HTAB 7
|
|
STA $24
|
|
LDX #<T_RAM
|
|
LDY #>T_RAM
|
|
JSR PRINT
|
|
|
|
LDA bMem
|
|
CMP #$78 ; $78 is flag byte for 128k!
|
|
BNE not128 ; 64 or 48k
|
|
LDA bMachine ; check for Apple ][ and ][+ -> no 128k supported
|
|
CMP #$38
|
|
BEQ not128
|
|
CMP #$EA
|
|
BEQ not128
|
|
|
|
LDX #<T_128 ; 128k
|
|
LDY #>T_128
|
|
JSR PRINT
|
|
JMP NEXT1b
|
|
|
|
not128 LDA bLC
|
|
BEQ only48
|
|
LDX #<T_64 ; 64k
|
|
LDY #>T_64
|
|
JSR PRINT
|
|
JMP NEXT1b
|
|
|
|
only48 LDX #<T_48 ; 48k
|
|
LDY #>T_48
|
|
JSR PRINT
|
|
|
|
NEXT1b JSR LFEED ; output Language Card
|
|
LDA #7 ; HTAB 7
|
|
STA $24
|
|
LDX #<T_LANG
|
|
LDY #>T_LANG
|
|
JSR PRINT
|
|
|
|
LDA bLC
|
|
BEQ noLC
|
|
LDX #<T_YES ; YES
|
|
LDY #>T_YES
|
|
JSR PRINT
|
|
JMP NEXT2
|
|
|
|
noLC LDX #<T_NO ; NO LC
|
|
LDY #>T_NO
|
|
JSR PRINT
|
|
|
|
|
|
|
|
NEXT2 JSR LFEED ; print refresh rate
|
|
LDA #7 ; HTAB 7
|
|
STA $24
|
|
LDX #<T_REFRESH
|
|
LDY #>T_REFRESH
|
|
JSR PRINT
|
|
LDA bRefresh
|
|
BMI _s2_rate
|
|
BEQ _s1_rate
|
|
LDX #<T_RATE2
|
|
LDY #>T_RATE2
|
|
JSR PRINT
|
|
JMP NEXT3
|
|
_s1_rate
|
|
LDX #<T_RATE1
|
|
LDY #>T_RATE1
|
|
JSR PRINT
|
|
JMP NEXT3
|
|
_s2_rate
|
|
LDX #<T_RATE3
|
|
LDY #>T_RATE3
|
|
JSR PRINT
|
|
|
|
NEXT3 JSR LFEED ; output MockingBoard detection results
|
|
LDA #7 ; HTAB 7
|
|
STA $24
|
|
LDX #<T_MOCK
|
|
LDY #>T_MOCK
|
|
JSR PRINT
|
|
|
|
LDA bMB
|
|
BEQ noMB ; no MB detected
|
|
LDX #<T_SLOT ; slot no
|
|
LDY #>T_SLOT
|
|
JSR PRINT
|
|
LDA bMBSlot ; get slot no and convewrt to ASCII-value
|
|
CLC
|
|
ADC #$B0
|
|
JSR COUT ; output ASCII-value!
|
|
JMP NEXT4
|
|
|
|
noMB LDX #<T_NONE ; no MB!
|
|
LDY #>T_NONE
|
|
JSR PRINT
|
|
|
|
NEXT4 JSR LFEED ; output FastChip detection
|
|
LDA #7 ; HTAB 7
|
|
STA $24
|
|
LDX #<T_FC
|
|
LDY #>T_FC
|
|
JSR PRINT
|
|
|
|
LDA bFC
|
|
BEQ noFC ; no FC detected
|
|
|
|
LDX #<T_YES ; FC detected!
|
|
LDY #>T_YES
|
|
JSR PRINT
|
|
JMP NEXT5
|
|
|
|
noFC LDX #<T_NO ; no FC!
|
|
LDY #>T_NO
|
|
JSR PRINT
|
|
|
|
NEXT5 JSR LFEED ; output ZipChip detection result
|
|
LDA #7 ; HTAB 7
|
|
STA $24
|
|
LDX #<T_ZC
|
|
LDY #>T_ZC
|
|
JSR PRINT
|
|
|
|
LDA bZC
|
|
BEQ noZC ; no ZC detected
|
|
|
|
LDX #<T_YES ; ZC detected!
|
|
LDY #>T_YES
|
|
JSR PRINT
|
|
JMP NEXT6
|
|
|
|
noZC LDX #<T_NO ; no ZC!
|
|
LDY #>T_NO
|
|
JSR PRINT
|
|
|
|
NEXT6 JSR LFEED ; output Emulator detection
|
|
JSR LFEED
|
|
LDA #7 ; HTAB 7
|
|
STA $24
|
|
LDX #<T_EMU
|
|
LDY #>T_EMU
|
|
JSR PRINT
|
|
|
|
LDA bEmu
|
|
BEQ pnoEmu
|
|
|
|
CMP #1
|
|
BEQ pyesEmu
|
|
|
|
LDX #<T_UNCLEAR ; unclear condition
|
|
LDY #>T_UNCLEAR
|
|
JSR PRINT
|
|
JMP prtSHK
|
|
|
|
pnoEmu LDX #<T_RATE3 ; no EMU detected!
|
|
LDY #>T_RATE3
|
|
JSR PRINT
|
|
JMP prtSHK
|
|
|
|
pyesEmu LDX #<T_POS ; EMU detected!
|
|
LDY #>T_POS
|
|
JSR PRINT
|
|
|
|
|
|
prtSHK JSR LFEED ; output copyright notice
|
|
JSR LFEED
|
|
JSR LFEED
|
|
LDA #4 ; HTAB 4
|
|
STA $24
|
|
LDX #<T_SHACK
|
|
LDY #>T_SHACK
|
|
JSR PRINT
|
|
|
|
|
|
resRTS RTS
|
|
*
|
|
*
|
|
* text output routines
|
|
*
|
|
LFEED LDA #$8D ; print a line feed
|
|
JSR COUT
|
|
RTS
|
|
*
|
|
PRINT ; x = LO-Byte Text, y = HI-Byte Text
|
|
!zone
|
|
STX ba+1
|
|
STY ba+2
|
|
|
|
LDX #00
|
|
ba LDA $1000,X
|
|
BEQ rtsPRINT
|
|
CMP #$E1 ; "a" char in lower case range?
|
|
BCC doCOUT ; no -> direct output
|
|
CMP #$FB ; "z"
|
|
BCS doCOUT ; no -> direct output
|
|
AND charFLAG ; lowercase conversion if necessary
|
|
doCOUT JSR COUT ; output ASCII on screen
|
|
INX
|
|
BNE ba
|
|
rtsPRINT RTS
|
|
|
|
*=============================================================================
|
|
*
|
|
* AUX-memory detection code
|
|
*
|
|
CODE HEX 8D03C0AD01098D02
|
|
HEX C08D7A204C1409
|
|
*
|
|
*
|
|
* text output data
|
|
*
|
|
T_APPLE ASC "* Hardware Autodetection *"
|
|
HEX 00
|
|
T_SHACK ASC "* V.1.00 by 8-BIT-SHACK 2019 *"
|
|
HEX 00
|
|
T_MACH ASC "Machine: "
|
|
HEX 00
|
|
T_COMP1 ASC "Apple //e"
|
|
HEX 00
|
|
T_COMP2 ASC "Apple IIgs"
|
|
HEX 00
|
|
T_COMP3 ASC "Apple //c"
|
|
HEX 00
|
|
T_COMP4 ASC "Apple ]["
|
|
HEX 00
|
|
T_COMP5 ASC "Apple ][+"
|
|
HEX 00
|
|
T_COMP6 ASC "Other"
|
|
HEX 00
|
|
T_RAM ASC "RAM: "
|
|
HEX 00
|
|
T_48 ASC "48kB "
|
|
HEX 00
|
|
T_64 ASC "64kB (LC) "
|
|
HEX 00
|
|
T_128 ASC ">= 128kB "
|
|
HEX 00
|
|
T_MOCK ASC "MockingBoard: "
|
|
HEX 00
|
|
T_NONE ASC "None "
|
|
HEX 00
|
|
T_SLOT ASC "Slot #"
|
|
HEX 00
|
|
T_FC ASC "FastChip: "
|
|
HEX 00
|
|
T_YES ASC "Yes"
|
|
HEX 00
|
|
T_ZC ASC "ZIPChip: "
|
|
HEX 00
|
|
T_NO ASC "No"
|
|
HEX 00
|
|
T_CPU ASC "CPU-Type: "
|
|
HEX 00
|
|
T_REFRESH ASC "Refresh Rate: "
|
|
HEX 00
|
|
T_LANG ASC "Language Card: "
|
|
HEX 00
|
|
T_EMU ASC "Emulator: "
|
|
HEX 00
|
|
T_CPU1 ASC "6502"
|
|
HEX 00
|
|
T_CPU2 ASC "65C02"
|
|
HEX 00
|
|
T_CPU3 ASC "65816"
|
|
HEX 00
|
|
T_CPU4 ASC "65C802"
|
|
HEX 00
|
|
T_RATE1 ASC "50Hz"
|
|
HEX 00
|
|
T_RATE2 ASC "60Hz"
|
|
HEX 00
|
|
T_RATE3 ASC "Not detected!"
|
|
HEX 00
|
|
T_POS ASC "Detected!"
|
|
HEX 00
|
|
T_UNCLEAR ASC "Unclear..."
|
|
HEX 00
|
|
*
|
|
* end of file
|
|
*
|