644 lines
24 KiB
ArmAsm
644 lines
24 KiB
ArmAsm
****************************
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* *
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* read address field *
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* subroutine *
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* (16-sector format) *
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* *
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****************************
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* *
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* reads volume, track *
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* and sector *
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* *
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* on entry ---- *
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* *
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* xreg: slotnum times $10 *
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* *
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* read mode (q6l, q7l) *
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* *
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* on exit ----- *
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* *
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* carry set if error. *
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* *
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* if no error: *
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* a-reg holds $aa. *
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* y-reg holds $00. *
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* x-reg unchanged. *
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* carry clear. *
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* *
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* csstv holds chksum, *
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* sector, track, and *
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* volume read. *
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* *
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* uses temps count, *
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* last, csum, and *
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* 4 bytes at csstv. *
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* *
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* expects ---- *
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* *
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* original 10-sector *
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* normal density nibls *
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* (4-bit), odd bits, *
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* then even. *
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* *
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* caution ---- *
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* *
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* observe *
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* 'no page cross' *
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* warnings on *
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* some branches!! *
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* *
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* assumes ---- *
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* *
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* 1 usec cycle time *
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* *
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****************************
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RdAdr16 LDY #$FC
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STY count ;'must find' count
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RdASyn INY
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BNE :loop1 ;Low order of count
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INC count ;(2k nibbles to find
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BEQ RdErr ; adr mark, else err)
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:loop1 LDA q6l,X ;Read nibble
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BPL :loop1 ;*** no page cross! ***
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RdASyn1 CMP #$D5 ;Adr mark 1?
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BNE RdASyn ;(loop if not)
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NOP ;Added nibble delay
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LDA q6l,X
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BPL *-3 ;*** no page cross! ***
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CMP #$AA ;Adr mark 2?
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BNE RdASyn1 ; (if not, is it am1?)
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* (added nibl delay)
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LDY #$03 ;Index for 4-byte read
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LDA q6l,X
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BPL *-3 ;*** no page cross! ***
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CMP #$96 ;Adr mark 3?
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BNE RdASyn1 ; (if not, is it am1?)
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SEI ;No interupts until address is tested.(carry is set)
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LDA #$00 ;Init checksum
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RdAddrFld STA chkSum
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LDA q6l,X ;Read 'odd bit' nibble
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BPL *-3 ;*** no page cross! ***
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ROL ;Align odd bits, '1' into lsb
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STA last ; (save them)
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LDA q6l,X ;Read 'even bit' nibble
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BPL *-3 ;*** no page cross! ***
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AND last ;Merge odd and even bits
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STA csSTV,Y ;Store data byte
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EOR chkSum
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DEY
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BPL RdAddrFld ;Loop on 4 data bytes
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TAY ;If final checksum
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BNE RdErr ; nonzero, then error
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LDA q6l,X ;First bit-slip nibble
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BPL *-3 ;*** no page cross! ***
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CMP #$DE
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BNE RdErr ;Error if nonmatch
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NOP ;delay
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LDA q6l,X ;Second bit-slip nibble
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BPL *-3 ;*** no page cross! ***
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CMP #$AA
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BNE RdErr ;Error if nonmatch
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CLC ;Clear carry on
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RTS ;Normal read exits
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RdErr SEC
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RTS
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**************************
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* *
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* read subroutine *
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* (16-sector format) *
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* *
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**************************
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* *
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* reads encoded bytes *
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* into nbuf1 and nbuf2 *
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* *
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* first reads nbuf2 *
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* high to low, *
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* then reads nbuf1 *
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* low to high. *
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* *
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* on entry ---- *
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* *
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* x-reg: slotnum *
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* times $10. *
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* *
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* read mode (q6l, q7l) *
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* *
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* on exit ----- *
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* *
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* carry set if error. *
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* *
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* if no error: *
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* a-reg holds $aa. *
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* x-reg unchanged. *
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* y-reg holds $00. *
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* carry clear. *
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* caution ----- *
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* *
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* observe *
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* 'no page cross' *
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* warnings on *
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* some branches!! *
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* *
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* assumes ---- *
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* *
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* 1 usec cycle time *
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* *
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**************************
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Read16 TXA ;Get slot #
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ORA #$8C ;Prepare mods to read routine
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STA Read4+1 ;Warning: the read routine is self modified!!!
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STA Read5+1
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STA Read6+1
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STA Read7+1
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STA Read8+1
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LDA bufPtr ;Modify storage addresses also
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LDY bufPtr+1
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STA Ref3+1
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STY Ref3+2
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SEC
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SBC #$54
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BCS :1
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DEY
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:1 STA Ref2+1
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STY Ref2+2
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SEC
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SBC #$57
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BCS :2 ;Branch if no borrow
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DEY
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:2 STA Ref1+1
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STY Ref1+2
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LDY #$20 ;'must find count'
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rSync DEY
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BEQ RdErr2 ;Branch if can't find data header marks
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LDA q6l,X
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BPL *-3
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rSync1 EOR #$D5 ;First data mark
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BNE rSync
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NOP ;Waste a little time...
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LDA q6l,X
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BPL *-3
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CMP #$AA ;Data mark 2
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BNE rSync1 ;If not, check for first again
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NOP
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LDA q6l,X
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BPL *-3
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CMP #$AD ;Data mark 3
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BNE rSync1 ;If not, check for data mark 1 again
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LDY #$AA
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LDA #$00
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RdData1 STA wTemp ;Use zpage for checksum keepin
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Read4 LDX $C0EC ;Warning: self modified
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BPL Read4
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LDA dNibble,X
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STA nBuf2-$AA,Y ;Save the two-bit groups in nbuf
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EOR wTemp ;Update checksum
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INY ;Bump to next nBuf2 position
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BNE RdData1 ;Loop for all $56 two-bit groups
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LDY #$AA ;Now read directly into user buffer
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BNE Read5 ;Branch always taken!!!
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RdErr2 SEC
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RTS
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Ref1 STA $1000,Y ;Warning: self modified!
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Read5 LDX $C0EC
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BPL Read5
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EOR dNibble,X ;Get actual 6-bit data from dNibble table
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LDX nBuf2-$AA,Y ;Get associated two-bit pattern
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EOR dNibble2,X ; & combine to form whole byte
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INY
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BNE Ref1 ;Loop for $56 bytes
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PHA ;Save this byte for now, no time to store...
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AND #$FC ;Strip low 2 bits...
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LDY #$AA ;Prepare for next $56 bytes
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Read6 LDX $C0EC
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BPL Read6
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EOR dNibble,X
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LDX nBuf2-$AA,Y
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EOR dNibble3,X
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Ref2 STA $1000,Y ;Warning: self modified
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INY
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BNE Read6 ;Loop until this group of $56 read in
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*
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Read7 LDX $C0EC
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BPL Read7
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AND #$FC
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LDY #$AC ;Last group is $54 long
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RdData2 EOR dNibble,X
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LDX nBuf2-$AC,Y
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EOR dNibble4,X ;Combine to form full byte
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Ref3 STA $1000,Y
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Read8 LDX $C0EC ;Warning: self modified
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BPL Read8
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INY
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BNE RdData2
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AND #$FC
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EOR dNibble,X ;Check sum ok?
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BNE RdErr1 ;Branch if not
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LDX slotZ ;Test end marks
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LDA q6l,X
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BPL *-3
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CMP #$DE
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CLC
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BEQ RdOK ;Branch if good trailer...
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RdErr1 SEC
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RdOK PLA
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LDY #$55 ;Place last byte into user buffer
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STA (bufPtr),Y
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RTS
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* This subroutine sets the slot
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* dependent track location.
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SetTrk JSR DrvIndx ;Get index to drive number
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STA drv0Trk,X
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RTS
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*****************************************
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*
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* Subrtn to tell if motor is stopped
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*
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* If motor is stopped, controller's
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* shift reg will not be changing.
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*
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* return y=0 and zero flag set if it is stopped.
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*
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*****************************************
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ChkDrv LDX slotZ
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ChkDrv0 LDY #$00 ;init loop counter
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:loop LDA q6l,X ;read the shift reg
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JSR :ChkDrvRTS ;delay
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PHA
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PLA ;more delay
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CMP q6l,X
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BNE :ChkDrvRTS
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LDA #$28
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DEY
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BNE :loop
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:ChkDrvRTS RTS
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DrvIndx PHA ;Preserve Acc
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LDA unitNum ;DSSS xxxx where D=0/1 & SSS=slot #
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LSR
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LSR
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LSR
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LSR ;0000 DSSS
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CMP #$08 ;C=1 -> drive 2
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AND #$07 ;0000 0SSS
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ROL ;0000 SSSD
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TAX ;Into X for index to table
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PLA ;Restore A
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RTS
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************************
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* *
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* write subr *
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* (16-sector format) *
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* *
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************************
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* *
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* writes data from *
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* nbuf1 and buf *
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* *
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* first nbuf2, *
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* high to low. *
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* then direct from *
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* (buf), low to high. *
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* self modified code!! *
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* on entry ---- *
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* *
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* x-reg: slotnum *
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* times $10. *
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* *
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* *
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* on exit ----- *
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* *
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* carry set if error. *
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* (w prot violation) *
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* *
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* if no error: *
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* *
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* a-reg uncertain. *
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* x-reg unchanged. *
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* y-reg holds $00. *
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* carry clear. *
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* *
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* assumes ---- *
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* *
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* 1 usec cycle time *
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* *
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************************
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Write16 SEC ;Anticipate wprot err
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LDA q6h,X
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LDA q7l,X ;Sense wprot flag
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BPL :1
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JMP WExit ;Exit if write protected
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:1 LDA nBuf2
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STA wTemp
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LDA #$FF ;Sync data
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STA q7h,X ;(5) Goto write mode
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ORA q6l,X ;(4)
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LDY #$04 ;(2) For five nibbles
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NOP ;(2)
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PHA ;(3)
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PLA ;(4)
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WSync PHA ;(3) exact timing
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PLA ;(4) exact timing
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JSR WrNibl7 ;(13,9,6) write sync
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DEY ;(2)
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BNE WSync ;(3-) must not cross page!
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LDA #$D5 ;(2) 1st data mark
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JSR WrNibl9 ;(15,9,6)
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LDA #$AA ;(2) 2nd data mark
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JSR WrNibl9 ;(15,9,6)
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LDA #$AD ;(2) 3rd data mark
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JSR WrNibl9 ;(15,9,6)
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TYA ;(2) zero checksum
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LDY #$56 ;(2) nbuf2 index
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BNE wData1 ;(3) branch always taken
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wData0 LDA nBuf2,Y ;(4) prior 6-bit nibble
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wData1 EOR nBuf2-1,Y ;(5) xor with current
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TAX ;(2) index to 7-bit nibl (nBuf2 must be on page bdry)
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LDA Nibbles,X ;(4) must not cross page boundary
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LDX slotZ ;(3) restore slot index
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STA q6h,X ;(5) store encoded byte
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LDA q6l,X ;(4) time must = 32 us per byte!
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DEY ;(2)
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BNE wData0 ;(3-) must not cross page boundary
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LDA wTemp ;(3) get prior nibble (from nBuf2)
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WRefDr1 LDY #$00 ;(2) warning: load value modified by prenib!
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WData2 EQU *
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WRefAdr1 EOR $1000,Y ;(4) warning: address modified by prenib!
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AND #$FC ;(2)
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TAX ;(2) index to Nibbles table
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LDA Nibbles,X ;(4)
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WRefDr2 LDX #$60 ;(2) warning: load value modified by prenib
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STA q6h,X ;(5) write nibl
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LDA q6l,X ;(4) handshake
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WRefAdr2 LDA $1000,Y ;(4) prior nibl. warning: address modified by prenib
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INY ;(2) all done with this page?
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BNE WData2 ;(3-) loop until page end
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LDA midNib1 ;(3) get next (precalculated and translated) nibl
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BEQ WrtDone ;(2+) branch if code writen was page aligned
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LDA yEnd ;(3) get byte address of last byte to be written
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BEQ WData4 ;(2+) branch if only 1 byte left to write
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LSR ;(2) test for odd or even last byte (carry set or clear)
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LDA midNib1 ;(3) restore nibl to a
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STA q6h,X ;(5)
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LDA q6l,X ;(4)
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LDA midNib2 ;(3) =byte 0 of second page. xor'd with byte 1 if above test set carry
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NOP ;(2) waste time
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INY ;(2) y=1
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BCS WrtOdd ;(2+) branch if last byte to be odd
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WData3 EQU *
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WRefAdr3 EOR $1100,Y ;(4) warning: address modified by prenib
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AND #$FC ;(2) strip low 2 bits
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TAX ;(2) index to Nibbles table
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LDA Nibbles,X ;(4) get nibble
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WRefDr3 LDX #$60 ;(2) restore slot index. warning: modified by prenib
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STA q6h,X ;(5)
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LDA q6l,X ;(4)
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WRefAdr4 LDA $1100,Y ;(4) warning: modified by prenib
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INY ;(2) got prior nibble, bump to next
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WRefAdr5 EOR $1100,Y ;(4) warning: modified by prenib
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WrtOdd CPY yEnd ;(3) set carry if this is last nibble
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AND #$FC ;(2)
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TAX ;(2)
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LDA Nibbles,X ;(4)
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WRefDr4 LDX #$60 ;(2) restore slot. warning: modified by prenib
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STA q6h,X ;(5)
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LDA q6l,X ;(4)
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WRefAdr6 LDA $1100,Y ;(4) get prior. warning: these warnings are all the same
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INY ;(2)
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BCC WData3 ;(3-) branch if that was not the las
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BCS *+2 ;(3) waste 3 cycles, branch always
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BCS WrtDone ;(3) branch always
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WData4 LDA |midNib1 ;(4) absolute reference to zero page
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STA q6h,X ;(5)
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LDA q6l,X ;(4)
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PHA ;(3) waste 14 us total
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PLA ;(4)
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PHA ;(3)
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PLA ;(4)
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WrtDone LDX lstNib ;(3) use last nibl (anded with $fc) for checksum
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LDA Nibbles,X ;(4)
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WRefDr5 LDX #$60 ;(2) restore slot. warning: see above warnings...
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STA q6h,X ;(5)
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LDA q6l,X ;(4)
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LDY #$00 ;(2) set y to index end mark table
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PHA ;(3) waste another 11 us
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PLA ;(4)
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NOP ;(2)
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NOP ;(2)
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WrEndMrk LDA EndMarks,Y ;(4) dm4, dm5, dm6, and turn off byte
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JSR WrNibl ;(15,6) write it
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INY ;(2)
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CPY #$04 ;(2) have all end marks been written?
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BNE WrEndMrk ;(3)
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CLC ;(2,9)
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WExit LDA q7l,X ;Out of write mode
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LDA q6l,X ;Into read mode
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RTS ;Return from write
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****************************
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* *
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* 7-bit nibl write subrs *
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* *
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* a-reg or'd prior exit *
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* carry cleared *
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* *
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****************************
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WrNibl9 CLC ;(2) 9 cycles, then write
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WrNibl7 PHA ;(3) 7 cycles, then write
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PLA ;(4)
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WrNibl STA q6h,X ;(5) nibble write subrtn
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ORA q6l,X ;(4) clobbers acc, not carry
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RTS ;(6)
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****************************
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* *
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* preniblize subr *
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* (16-sector format) *
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* *
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****************************
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* *
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* converts 256 bytes of *
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* user data in (buf) into *
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* 6 bit nibls into nbuf2 *
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* high 6 bits are trans- *
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* lated directly by the *
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* write routines. *
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* *
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* on entry ---- *
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* *
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* buf is 2-byte pointer *
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* to 256 bytes of user *
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* data. *
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* *
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* on exit ----- *
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* *
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* a,x,y undefined. *
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* write routine modified *
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* to do direct conversion *
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* of high 6 bits of users *
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* buffer data. *
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****************************
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PreNibl16 LDA bufPtr ;First self modify addresses so we can be fast!
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LDY bufPtr+1 ;Y contains high order address
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CLC ;All offsets are -$AA...
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ADC #$02 ;The highest set is bufPtr+$AC
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BCC :1 ;Branch if no carry
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INY ;Otherwise add carry to high address
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:1 STA PrN3+1 ;Self mod 3
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STY PrN3+2
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SEC
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SBC #$56 ;middle set is buf+$56
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BCS :2 ;branch if no borrow
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DEY ;otherwise deduct from high...
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:2 STA PrN2+1 ;self mod 2
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STY PrN2+2
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SEC
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SBC #$56 ;Low set is exactly bufPtr
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BCS :3
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DEY
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:3 STA PrN1+1 ;self mod 1
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STY PrN1+2
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LDY #$AA ;Count up to 0
|
|
PreNib4 EQU *
|
|
PrN1 LDA $1000,Y ;Fetch byte from lowest group. warning: self modified
|
|
AND #%00000011 ;Strip high 6 bits
|
|
TAX ;Index to 2 bit equiv
|
|
LDA TwoBit1,X
|
|
PHA ;save pattern
|
|
PrN2 LDA $1056,Y ;fetch from middle group
|
|
AND #%00000011
|
|
TAX
|
|
PLA ;Restore pattern
|
|
ORA TwoBit2,X ;Combine second group with first
|
|
PHA ;Save new pattern
|
|
PrN3 LDA $10AC,Y ;Get highest group
|
|
AND #%00000011
|
|
TAX
|
|
PLA ;Restore new pattern
|
|
ORA TwoBit3,X ; & form final nibble
|
|
PHA
|
|
TYA
|
|
EOR #$FF
|
|
TAX
|
|
PLA
|
|
STA nBuf2,X ;Save in nibble buffer!
|
|
INY ;Bump to next set
|
|
BNE PreNib4 ;Loop until all $56 nibbles formed
|
|
LDY bufPtr ;Now prepare data bytes for write16 routine
|
|
DEY ;Prepare end addr
|
|
STY yEnd
|
|
LDA bufPtr
|
|
STA WRefDr1+1 ;warning: the following storage addresses starting
|
|
BEQ WrMod1 ; with 'wref' are referces into code space,
|
|
EOR #$FF ; changed by this routine
|
|
TAY ;Index to last byte of page pointed to by buf
|
|
LDA (bufPtr),Y ;Pre-niblize the last byte of the page with
|
|
INY ; the first byte of the next page
|
|
EOR (bufPtr),Y
|
|
AND #$FC
|
|
TAX
|
|
LDA Nibbles,X ;Get disk 7-bit nibble equivalent
|
|
WrMod1 STA midNib1
|
|
BEQ WrMod3 ;Branch if data to be written is page aligned
|
|
LDA yEnd ;Find out if last byte is even or odd address
|
|
LSR ;Shift even/oddness into carry
|
|
LDA (bufPtr),Y ;If even, then leave intact
|
|
BCC WrMod2 ;Branch if odd
|
|
INY ;If even, then pre-xor with byte 1
|
|
EOR (bufPtr),Y
|
|
WrMod2 STA midNib2 ;Save result for write routine
|
|
WrMod3 LDY #$FF ;Index to last byte of data to be writen
|
|
LDA (bufPtr),Y ; to be used as checksum
|
|
AND #$FC ;Strip extra bits
|
|
STA lstNib ;Save it
|
|
LDY bufPtr+1 ;Now modify address reference to user data
|
|
STY WRefAdr1+2
|
|
STY WRefAdr2+2
|
|
INY
|
|
STY WRefAdr3+2
|
|
STY WRefAdr4+2
|
|
STY WRefAdr5+2
|
|
STY WRefAdr6+2
|
|
LDX slotZ ; & lastly index references to controller
|
|
STX WRefDr2+1
|
|
STX WRefDr3+1
|
|
STX WRefDr4+1
|
|
STX WRefDr5+1
|
|
RTS ;All done
|
|
|
|
ChkPrev EOR iobPrevDn ;Same slot as last?
|
|
ASL
|
|
BEQ :Rtn ;Yes
|
|
LDA #$01
|
|
STA monTimeH
|
|
:CkLoop LDA iobPrevDn ;=DSSS xxxx
|
|
AND #$70 ;=0SSS 0000
|
|
TAX
|
|
BEQ :Rtn ;Branch if no previous ever (boot only)
|
|
JSR ChkDrv0 ;Find out if previous drive running
|
|
BEQ :Rtn ;Branch if stopped
|
|
LDA #$01 ;Waste some time
|
|
JSR msWait
|
|
LDA monTimeH
|
|
BNE :CkLoop
|
|
:Rtn RTS
|
|
|
|
* ----------------- see rev notes 14, 18 & 70 -------------
|
|
|
|
ResetPhase LDA unitNum ;Get unit number
|
|
AND #$7F ;Map off hi bit (drive bit)
|
|
TAX
|
|
|
|
* clear all the phases and force read mode
|
|
* patch 76 part 2. part 1 is in xrw1.
|
|
|
|
LDA phaseOff,X ;make sure all motor
|
|
LDA phaseOff+2,X ; phases are off
|
|
LDA phaseOff+4,X
|
|
LDA phaseOff+6,X
|
|
RTS
|
|
|
|
* ---------------------------------------------------------
|
|
doCheck LDA dhpCmd ;Get the command number
|
|
CMP #maxCmd ;Is the command allowable?
|
|
BCS doChkBad ;Branch if not!
|
|
LDA blockNum
|
|
LDX blockNum+1
|
|
STX ibTrk ;Calculate block's track & sector
|
|
BEQ doChkOK ;Branch if block # in range
|
|
DEX ;else test further
|
|
BNE doChkBad ;Bad range
|
|
CMP #$18 ;Must be <$118 (280)
|
|
BCC doChkOK
|
|
doChkBad SEC ;Set carry for an error
|
|
RTS
|
|
|
|
doChkOK CLC
|
|
RTS
|
|
|
|
LD6EA DS 2,0 ;Not used
|
|
|
|
* ---------------------------------------------------------
|
|
* Variables for handling mirror devices
|
|
* NB. Values of SmartPort unit #s: $00, $01-$7E
|
|
* Status List - ref pg 122 IIGS Firmware
|
|
|
|
spStatList EQU *
|
|
genStatus DB 0
|
|
spDevTotBlks DB 0,0,0 ;# of blocks
|
|
|
|
spUnits DS $F,0 ;table of SmartPort unit #s
|
|
DB 0 |