Added Cxxx ROM checks

This commit is contained in:
Zellyn Hunter 2017-01-26 20:46:38 -06:00
parent 4b06b0b36f
commit 3f45cceec8
9 changed files with 267 additions and 35 deletions

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@ -24,11 +24,11 @@ Error messages can be viewed at
- [x] language card tests
- [x] main/auxiliary memory softswitch behavior tests
- [x] softswitch reading tests
- [x] Incorporate Cxxx testing into data-driven test
- [x] Add testcases for Cxxx testing
### TODO
- [ ] Incorporate Cxxx testing into data-driven test
- [ ] Add testcases for Cxxx testing
- [ ] weirder softswitch behavior corner cases
- [ ] floating-bus tests

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@ -8,6 +8,8 @@
;; Zero-page locations.
SCRATCH = $1
SCRATCH2 = $2
SCRATCH3 = $3
LCRESULT = $10
LCRESULT1 = $11
AUXRESULT = $12

Binary file not shown.

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@ -9,11 +9,15 @@
.MEM_4 = %11
.MEM_2_1_1_1 = (.MEM_2 << 0) + (.MEM_1 << 2) + (.MEM_1 << 4) + (.MEM_1 << 6)
.MEM_3_2_2_2 = (.MEM_3 << 0) + (.MEM_2 << 2) + (.MEM_2 << 4) + (.MEM_2 << 6)
.C_1 = %001
.C_3 = %010
.C_8 = %100
.C_138 = .C_1 | .C_3 | .C_8
.C_8f = %0001
.C_12 = %0010
.C_47 = %0100
.C_3 = %1000
.C_0 = %0000
.C_skip = $80
.C_1348 = .C_12 | .C_3 | .C_47 | .C_8f
.C_38 = .C_3 | .C_8f
.checkdata = tmp1
.ismain = tmp3
@ -202,9 +206,10 @@ AUXMEMTESTS
;; First checkdata byte is for Cxxx tests.
jsr .nextcheck
bmi +
jsr .checkCxxx
ldx .checkdata
+ ldx .checkdata
ldy .checkdata+1
jsr RESETALL
stx .checkdata
@ -331,8 +336,133 @@ AUXMEMTESTS
;;; Check that the expected ROM areas are visible.
.checkCxxx
.gotCxxx = tmp0
.wantCxxx = SCRATCH
pha
jsr .genCxxxFingerprint
pla
cmp .gotCxxx
beq .checkCxxxDone
lda .gotCxxx
;; Reset, but copy .checkdata over.
ldx .checkdata
ldy .checkdata+1
jsr RESETALL
stx .checkdata
sty .checkdata+1
sta .gotCxxx
ldy #0
lda (.checkdata),y
sta .wantCxxx
jsr .printtest
+print
!text "WANT:",$8D
+printed
lda .wantCxxx
jsr .printCxxxBits
+print
!text "GOT:",$8D
+printed
lda .gotCxxx
jsr .printCxxxBits
+prerr $000B ;; E000B: This is a the Cxxx-ROM check part of the auxiliary memory data-driven test (see E000A for a description of the other part). After a full reset, we perform a testdata-driven sequence of instructions. Finally we check which parts of Cxxx ROM seem to be visible. We check C100-C2FF, C300-C3FF, C400-C7FF (which should be the same as C100-C2FF), and C800-CFFE. For more details, see Understanding the Apple IIe, by James Fielding Sather, Pg 5-28.
!text "CXXX ROM TEST FAILED"
+prerred
;; Don't continue with auxmem check: return from parent JSR.
pla
pla
sec
rts
.checkCxxxDone
rts
.genCxxxFingerprint
.dataptr = SCRATCH2
.want = SCRATCH3
.loopctr = SCRATCH
lda #0
sta .gotCxxx
lda #0
sta .dataptr
lda #4
sta .loopctr
-- clc
ror .gotCxxx
ldx #4 ; four check bytes per region
lda #$8 ; start out with positive match bit
ora .gotCxxx
sta .gotCxxx
- ldy .dataptr
lda .cxtestdata,y
iny
sta SRC
lda .cxtestdata,y
iny
sta SRC+1
lda .cxtestdata,y
iny
sta .want
sty .dataptr
ldy #0
lda (SRC),y
cmp .want
beq +
lda #($ff-$8) ; mismatch: clear current bit
and .gotCxxx
sta .gotCxxx
+ dex
bne -
dec .loopctr
bne --
rts
.printCxxxBits
tax
+print
!text "- C100-C2FF: "
+printed
txa
and #.C_12
jsr .printCxxxBit
+print
!text "- C300-C3FF: "
+printed
txa
and #.C_3
jsr .printCxxxBit
+print
!text "- C400-C7FF: "
+printed
txa
and #.C_47
jsr .printCxxxBit
+print
!text "- C800-CFFE: "
+printed
txa
and #.C_8f
jsr .printCxxxBit
rts
.printCxxxBit
bne +
+print
!text "?",$8D
+printed
rts
+ +print
!text "ROM",$8D
+printed
rts
;;; Increment .checkdata pointer to the next memory location, and load
;;; it into the accumulator. X and Y are preserved.
.nextcheck
@ -403,26 +533,26 @@ zpfromaux
;; Test 1: everything reset.
lda #1
jsr .check
!byte .C_138, 2, 2, 2, 2, 3, 3, 3, 3
!byte .C_skip, 2, 2, 2, 2, 3, 3, 3, 3
;; Test 2: write to AUX but read from Main RAM, everything else normal.
lda #2
sta SET_RAMWRT
jsr .check
!byte .C_138, 2, 1, 1, 1, 3, 2, 2, 2
!byte .C_skip, 2, 1, 1, 1, 3, 2, 2, 2
;; Test 3: write to main but read AUX, everything else normal.
lda #3
sta SET_RAMRD
jsr .check
!byte .C_138, 2, 4, 4, 4, 3, 3, 3, 3
!byte .C_skip, 2, 4, 4, 4, 3, 3, 3, 3
;; Test 4: write to AUX, read from AUX, everything else normal.
lda #4
sta SET_RAMRD
sta SET_RAMWRT
jsr .check
!byte .C_138, 2, 1, 1, 1, 3, 4, 4, 4
!byte .C_skip, 2, 1, 1, 1, 3, 4, 4, 4
;; Our four basic tests, but with 80STORE ON -----------------
;; (400-7ff is pointing at main mem)
@ -431,21 +561,21 @@ zpfromaux
lda #5
sta SET_80STORE
jsr .check
!byte .C_138, 2, 2, 2, 2, 3, 3, 3, 3
!byte .C_skip, 2, 2, 2, 2, 3, 3, 3, 3
;; Test 6: write to aux
lda #6
sta SET_RAMWRT
sta SET_80STORE
jsr .check
!byte .C_138, 2, 1, 2, 1, 3, 2, 3, 2
!byte .C_skip, 2, 1, 2, 1, 3, 2, 3, 2
;; Test 7: read from aux
lda #7
sta SET_RAMRD
sta SET_80STORE
jsr .check
!byte .C_138, 2, 4, 2, 4, 3, 3, 3, 3
!byte .C_skip, 2, 4, 2, 4, 3, 3, 3, 3
;; Test 8: read and write aux
lda #8
@ -453,7 +583,7 @@ zpfromaux
sta SET_RAMWRT
sta SET_80STORE
jsr .check
!byte .C_138, 2, 1, 2, 1, 3, 4, 3, 4
!byte .C_skip, 2, 1, 2, 1, 3, 4, 3, 4
;; Our four basic tests, but with 80STORE and PAGE2 ON -------
;; (400-7ff is pointing at aux mem)
@ -463,7 +593,7 @@ zpfromaux
sta SET_80STORE
sta SET_PAGE2
jsr .check
!byte .C_138, 2, 2, 1, 2, 3, 3, 4, 3
!byte .C_skip, 2, 2, 1, 2, 3, 3, 4, 3
;; Test A: write to aux
lda #$a
@ -471,7 +601,7 @@ zpfromaux
sta SET_80STORE
sta SET_PAGE2
jsr .check
!byte .C_138, 2, 1, 1, 1, 3, 2, 4, 2
!byte .C_skip, 2, 1, 1, 1, 3, 2, 4, 2
;; Test B: read from aux
lda #$b
@ -479,7 +609,7 @@ zpfromaux
sta SET_80STORE
sta SET_PAGE2
jsr .check
!byte .C_138, 2, 4, 1, 4, 3, 3, 4, 3
!byte .C_skip, 2, 4, 1, 4, 3, 3, 4, 3
;; Test C: read and write aux
lda #$c
@ -488,7 +618,7 @@ zpfromaux
sta SET_80STORE
sta SET_PAGE2
jsr .check
!byte .C_138, 2, 1, 1, 1, 3, 4, 4, 4
!byte .C_skip, 2, 1, 1, 1, 3, 4, 4, 4
;; Our four basic tests, but with 80STORE and HIRES ON -------
;; (400-7ff and 2000-3fff are pointing at main mem)
@ -498,7 +628,7 @@ zpfromaux
sta SET_80STORE
sta SET_HIRES
jsr .check
!byte .C_138, 2, 2, 2, 2, 3, 3, 3, 3
!byte .C_skip, 2, 2, 2, 2, 3, 3, 3, 3
;; Test E: write to aux
lda #$e
@ -506,7 +636,7 @@ zpfromaux
sta SET_80STORE
sta SET_HIRES
jsr .check
!byte .C_138, 2, 1, 2, 2, 3, 2, 3, 3
!byte .C_skip, 2, 1, 2, 2, 3, 2, 3, 3
;; Test F: read from aux
lda #$f
@ -514,7 +644,7 @@ zpfromaux
sta SET_80STORE
sta SET_HIRES
jsr .check
!byte .C_138, 2, 4, 2, 2, 3, 3, 3, 3
!byte .C_skip, 2, 4, 2, 2, 3, 3, 3, 3
;; Test 10: read and write aux
lda #$10
@ -523,7 +653,7 @@ zpfromaux
sta SET_80STORE
sta SET_HIRES
jsr .check
!byte .C_138, 2, 1, 2, 2, 3, 4, 3, 3
!byte .C_skip, 2, 1, 2, 2, 3, 4, 3, 3
;; Our four basic tests, but with 80STORE, HIRES, PAGE2 ON ---
;; (400-7ff and 2000-3fff are pointing at aux mem)
@ -534,7 +664,7 @@ zpfromaux
sta SET_HIRES
sta SET_PAGE2
jsr .check
!byte .C_138, 2, 2, 1, 1, 3, 3, 4, 4
!byte .C_skip, 2, 2, 1, 1, 3, 3, 4, 4
;; Test 12: write to aux
lda #$12
@ -543,7 +673,7 @@ zpfromaux
sta SET_HIRES
sta SET_PAGE2
jsr .check
!byte .C_138, 2, 1, 1, 1, 3, 2, 4, 4
!byte .C_skip, 2, 1, 1, 1, 3, 2, 4, 4
;; Test 13: read from aux
lda #$13
@ -552,7 +682,7 @@ zpfromaux
sta SET_HIRES
sta SET_PAGE2
jsr .check
!byte .C_138, 2, 4, 1, 1, 3, 3, 4, 4
!byte .C_skip, 2, 4, 1, 1, 3, 3, 4, 4
;; Test 14: read and write aux
lda #$14
@ -562,7 +692,52 @@ zpfromaux
sta SET_HIRES
sta SET_PAGE2
jsr .check
!byte .C_138, 2, 1, 1, 1, 3, 4, 4, 4
!byte .C_skip, 2, 1, 1, 1, 3, 4, 4, 4
;; Test 15: Cxxx test with everything reset.
lda #$15
jsr .check
!byte .C_3, 2, 2, 2, 2, 3, 3, 3, 3
;; Test 16: Cxxx test with SLOTC3ROM set
lda #$16
sta SET_SLOTC3ROM
jsr .check
!byte .C_0, 2, 2, 2, 2, 3, 3, 3, 3
;; Test 17: Cxxx test with INTCXROM set.
lda #$17
sta SET_INTCXROM
jsr .check
!byte .C_1348, 2, 2, 2, 2, 3, 3, 3, 3
;; Test 18: Cxxx test with SLOTC3ROM and INTCXROM set
lda #$18
sta SET_SLOTC3ROM
sta SET_INTCXROM
jsr .check
!byte .C_1348, 2, 2, 2, 2, 3, 3, 3, 3
;; Test 19: Cxxx test with "INTC8ROM" set
lda #$19
lda $C300
jsr .check
!byte .C_38, 2, 2, 2, 2, 3, 3, 3, 3
;; Test 1A: Cxxx test showing inability to reset "INTC8ROM" with softswitches.
lda #$1A
lda $C300
sta SET_SLOTC3ROM
jsr .check
!byte .C_8f, 2, 2, 2, 2, 3, 3, 3, 3
;; Test 1B: Cxxx test showing ability to reset "INTC8ROM" with CFFF reference.
lda #$1B
lda $C300
sta SET_SLOTC3ROM
lda RESET_INTC8ROM
jsr .check
!byte .C_0, 2, 2, 2, 2, 3, 3, 3, 3
!byte 0 ; end of tests
@ -579,4 +754,28 @@ zpfromaux
.memorylen = * - .memorylocs - 2
!word 0
.cxtestdata
;; C800-Cffe
!byte $00, $c8, $4c
!byte $21, $ca, $8d
!byte $43, $cc, $f0
!byte $b5, $ce, $7b
;; C100-C2ff
!byte $4d, $c1, $a5
!byte $6c, $c1, $2a
!byte $b5, $c2, $ad
!byte $ff, $c2, $00
;; C400-C7ff
!byte $36, $c4, $8d
!byte $48, $c5, $18
!byte $80, $c6, $8b
!byte $6e, $c7, $cb
;; C300-C3ff
!byte $00, $c3, $2c
!byte $0a, $c3, $0c
!byte $2b, $c3, $04
!byte $e2, $c3, $ed
} ;auxmem

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@ -296,8 +296,8 @@ LANGCARDTESTS_NO_CHECK:
!byte $23, $34, $11, $23, $34 ;
!byte $07, $0D, $ff ; Read $C087, read $C08D (read ROM, write bank 1)
!byte $53, $60, $54, $22, $61 ;
; !byte $0b, $8b, $0b, $ff ; Read $C08B, write $C08B, read $C08B (read RAM bank 1, no write)
; !byte $11, $33, $11, $22, $33 ; (this one is tricky: reset WRTCOUNT by writing halfway)
!byte $0b, $8b, $0b, $ff ; Read $C08B, write $C08B, read $C08B (read RAM bank 1, no write)
!byte $11, $33, $11, $22, $33 ; (this one is tricky: reset WRTCOUNT by writing halfway)
!byte $ff
nop ; Provide clean break after data when viewing disassembly

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@ -192,3 +192,12 @@ Just switch them on and off, and test each, one at a time.
On entry into AUXMEMTESTS
SP: 01FE
returned to 02A0
* 80 column details
Lores80 color differences: UtA2e: 8-29
* apple2e.rom
4000-40ff is zeros. I believe this corresponds to C000-C0ff

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@ -20,6 +20,8 @@ RESETALL
sta RESET_ALTZP
sta RESET_SLOTC3ROM
sta RESET_INTC8ROM
sta RESET_80COL
sta RESET_ALTCHRSET
sta SET_TEXT
sta RESET_MIXED
sta RESET_PAGE2

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@ -60,6 +60,7 @@ SOFTSWITCHTESTS
ldx #$80
jsr RESETALL
jsr .fail
beq .wrtloopend
+ dex
bne -
@ -69,9 +70,10 @@ SOFTSWITCHTESTS
ldx #.testtimes ; test `.testtimes` times
- lda (.readloc),y
bpl + ;ok
ldx #$02 ;TODO: create "LEAVE" fail message
ldx #$42
jsr RESETALL
jsr .fail
beq .wrtloopend
+ dex
bne -
@ -84,6 +86,7 @@ SOFTSWITCHTESTS
ldx #$82
jsr RESETALL
jsr .fail
beq .wrtloopend
+ dex
bne -
@ -96,9 +99,11 @@ SOFTSWITCHTESTS
ldx #$80
jsr RESETALL
jsr .fail
beq .wrtloopend
+ dex
bne -
.wrtloopend
dec .loopcount
bne .wrtloop
@ -131,6 +136,7 @@ SOFTSWITCHTESTS
ldx #$00
jsr RESETALL
jsr .fail
beq .readloopend
+ dex
bne -
@ -143,6 +149,7 @@ SOFTSWITCHTESTS
ldx #$02
jsr RESETALL
jsr .fail
beq .readloopend
+ dex
bne -
@ -155,9 +162,11 @@ SOFTSWITCHTESTS
ldx #$00
jsr RESETALL
jsr .fail
beq .readloopend
+ dex
bne -
.readloopend
dec .loopcount
bne .readloop
@ -180,6 +189,7 @@ SOFTSWITCHTESTS
;;; A = actual value read (which tells what we expected: the opposite)
.fail
sta SCRATCH
stx SCRATCH2
txa
bmi +
+print
@ -202,7 +212,14 @@ SOFTSWITCHTESTS
+print
!text " SHOULD "
+printed
lda SCRATCH
lda SCRATCH2
and #$40
beq +
+print
!text "NOT SET "
+printed
beq ++
+ lda SCRATCH
bpl +
+print
!text "RE"
@ -210,11 +227,11 @@ SOFTSWITCHTESTS
+ +print
!text "SET "
+printed
ldx .readloc
++ ldx .readloc
ldy .readloc+1
jsr PRNTYX
+print
!text ";GOT $"
!text ";GOT "
+printed
lda SCRATCH
jsr PRBYTE
@ -222,7 +239,6 @@ SOFTSWITCHTESTS
jsr COUT
lda #0
sta SOFTSWITCHRESULT
ldx #1
rts
.writeswitches

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@ -39,3 +39,7 @@ We wrote $44 to main RAM in the three test locations used by the LC test. They s
## E000A
This is a data-driven test of main and auxiliary memory softswitch operation. We initialize $FF, $100, $200, $3FF, $427, $7FF, $800, $1FFF, $2000, $3FFF, $4000, $5FFF, and $BFFF in main RAM to value 1, and in auxiliary RAM to value 3. Then, we perform a testdata-driven sequence of instructions. Finally we (try to) increment all test locations. Then we test the expected values of the test locations in main and auxiliary memory. For more information on the operation of the auxiliary memory soft-switches, see Understanding the Apple IIe, by James Fielding Sather, Pg 5-22 to 5-28.
## E000B
This is a the Cxxx-ROM check part of the auxiliary memory data-driven test (see E000A for a description of the other part). After a full reset, we perform a testdata-driven sequence of instructions. Finally we check which parts of Cxxx ROM seem to be visible. We check C100-C2FF, C300-C3FF, C400-C7FF (which should be the same as C100-C2FF), and C800-CFFE. For more details, see Understanding the Apple IIe, by James Fielding Sather, Pg 5-28.