2018-03-05 05:36:00 +00:00
|
|
|
;;; ============================================================
|
2018-02-06 03:01:17 +00:00
|
|
|
;;; Generic Macros
|
2018-03-05 05:36:00 +00:00
|
|
|
;;; ============================================================
|
2018-02-06 03:01:17 +00:00
|
|
|
|
2018-03-05 16:41:22 +00:00
|
|
|
.define _is_immediate(arg) (.match (.mid (0, 1, {arg}), #))
|
|
|
|
.define _is_register(arg) (.match ({arg}, x) .or .match ({arg}, y))
|
|
|
|
.define _immediate_value(arg) (.right (.tcount ({arg})-1, {arg}))
|
|
|
|
|
|
|
|
.macro _op_lo op, arg
|
|
|
|
.if _is_immediate {arg}
|
|
|
|
op #<_immediate_value {arg}
|
|
|
|
.else
|
|
|
|
op arg
|
|
|
|
.endif
|
|
|
|
.endmacro
|
|
|
|
|
|
|
|
.macro _op_hi op, arg
|
|
|
|
.if _is_immediate {arg}
|
|
|
|
op #>_immediate_value {arg}
|
|
|
|
.else
|
|
|
|
op arg+1
|
|
|
|
.endif
|
|
|
|
.endmacro
|
2018-02-09 05:42:59 +00:00
|
|
|
|
2018-03-05 05:36:00 +00:00
|
|
|
;;; ============================================================
|
2018-02-06 05:49:39 +00:00
|
|
|
;;; Pad with zeros to the given address
|
|
|
|
|
|
|
|
.macro PAD_TO addr
|
|
|
|
.res addr - *, 0
|
|
|
|
.endmacro
|
2018-02-06 03:01:17 +00:00
|
|
|
|
2018-03-05 05:36:00 +00:00
|
|
|
;;; ============================================================
|
2018-02-16 03:29:05 +00:00
|
|
|
;;; Common patterns
|
|
|
|
|
2018-03-07 18:39:36 +00:00
|
|
|
.define AS_WORD(arg) arg & $FFFF
|
|
|
|
|
|
|
|
|
2018-02-16 03:29:05 +00:00
|
|
|
.macro return arg
|
|
|
|
lda arg
|
|
|
|
rts
|
|
|
|
.endmacro
|
|
|
|
|
2018-03-05 05:36:00 +00:00
|
|
|
;;; ============================================================
|
2018-02-06 03:01:17 +00:00
|
|
|
;;; Calls with one parameter (address in A,X)
|
|
|
|
|
|
|
|
.macro addr_call target, addr
|
|
|
|
lda #<addr
|
|
|
|
ldx #>addr
|
|
|
|
jsr target
|
|
|
|
.endmacro
|
|
|
|
|
2018-02-09 05:42:59 +00:00
|
|
|
.macro addr_call_indirect target, addr
|
|
|
|
lda addr
|
|
|
|
ldx addr+1
|
|
|
|
jsr target
|
|
|
|
.endmacro
|
|
|
|
|
2018-02-06 03:01:17 +00:00
|
|
|
.macro addr_jump target, addr
|
|
|
|
lda #<addr
|
|
|
|
ldx #>addr
|
|
|
|
jmp target
|
|
|
|
.endmacro
|
|
|
|
|
2018-03-05 05:36:00 +00:00
|
|
|
;;; ============================================================
|
2018-02-06 03:01:17 +00:00
|
|
|
;;; Calls with two paramters (call # in y, address in A,X)
|
|
|
|
;;; (various output orders to match original binary)
|
|
|
|
|
|
|
|
.macro axy_call target, yparam, addr
|
|
|
|
lda #<addr
|
|
|
|
ldx #>addr
|
|
|
|
ldy #yparam
|
|
|
|
jsr target
|
|
|
|
.endmacro
|
|
|
|
|
|
|
|
.macro yax_call target, yparam, addr
|
|
|
|
ldy #yparam
|
|
|
|
lda #<addr
|
|
|
|
ldx #>addr
|
|
|
|
jsr target
|
|
|
|
.endmacro
|
|
|
|
|
|
|
|
.macro yxa_call target, yparam, addr
|
|
|
|
ldy #yparam
|
|
|
|
ldx #>addr
|
|
|
|
lda #<addr
|
|
|
|
jsr target
|
|
|
|
.endmacro
|
|
|
|
|
|
|
|
.macro yxa_jump target, yparam, addr
|
|
|
|
ldy #yparam
|
|
|
|
ldx #>addr
|
|
|
|
lda #<addr
|
|
|
|
jmp target
|
|
|
|
.endmacro
|
|
|
|
|
2018-02-10 08:00:42 +00:00
|
|
|
|
2018-03-05 05:36:00 +00:00
|
|
|
;;; ============================================================
|
2018-02-06 03:01:17 +00:00
|
|
|
;;; 16-bit pseudo-ops
|
|
|
|
|
2018-02-06 23:36:39 +00:00
|
|
|
;;; Load A,X
|
|
|
|
;;; ldax #$1234 ; immediate
|
|
|
|
;;; ldax $1234 ; absolute
|
2018-02-06 03:01:17 +00:00
|
|
|
.macro ldax arg
|
2018-03-05 16:41:22 +00:00
|
|
|
_op_lo lda, {arg}
|
|
|
|
_op_hi ldx, {arg}
|
2018-02-06 03:01:17 +00:00
|
|
|
.endmacro
|
|
|
|
|
2018-02-07 02:42:00 +00:00
|
|
|
;;; Load X,Y
|
|
|
|
;;; ldxy #$1234 ; immediate
|
|
|
|
;;; ldxy $1234 ; absolute
|
|
|
|
.macro ldxy arg
|
2018-03-05 16:41:22 +00:00
|
|
|
_op_lo ldx, {arg}
|
|
|
|
_op_hi ldy, {arg}
|
2018-02-07 02:42:00 +00:00
|
|
|
.endmacro
|
|
|
|
|
2018-02-06 23:36:39 +00:00
|
|
|
;;; Store A,X
|
|
|
|
;;; stax $1234 ; absolute
|
2018-02-06 03:01:17 +00:00
|
|
|
.macro stax arg
|
|
|
|
sta arg
|
|
|
|
stx arg+1
|
|
|
|
.endmacro
|
|
|
|
|
2018-03-26 03:49:27 +00:00
|
|
|
;;; Core for add16/sub16
|
|
|
|
.macro _addsub16 op, opc, arg1, arg2, arg3, arg4, arg5, arg6
|
|
|
|
.if _is_register {arg2} && _is_register {arg4} && _is_register {arg6}
|
|
|
|
;; xxx16 $1111,x, $2222,x, $3333,x
|
|
|
|
lda arg1,arg2
|
|
|
|
opc
|
|
|
|
op arg3,arg4
|
|
|
|
sta arg5,arg6
|
|
|
|
lda arg1+1,arg2
|
|
|
|
op arg3+1,arg4
|
|
|
|
sta arg5+1,arg6
|
|
|
|
.elseif _is_register {arg2} && _is_register {arg4}
|
|
|
|
;; xxx16 $1111,x, $2222,x, $3333
|
|
|
|
lda arg1,arg2
|
|
|
|
opc
|
|
|
|
op arg3,arg4
|
|
|
|
sta arg5
|
|
|
|
lda arg1+1,arg2
|
|
|
|
op arg3+1,arg4
|
|
|
|
sta arg5+1
|
|
|
|
.elseif _is_register {arg2} && _is_register {arg5}
|
|
|
|
;; xxx16 $1111,x, $2222, $3333,x
|
|
|
|
;; xxx16 $1111,x, #$2222, $3333,x
|
|
|
|
lda arg1,arg2
|
|
|
|
opc
|
|
|
|
_op_lo op, {arg3}
|
|
|
|
sta arg4,arg5
|
|
|
|
lda arg1+1,arg2
|
|
|
|
_op_hi op, {arg3}
|
|
|
|
sta arg4+1,arg5
|
|
|
|
.elseif _is_register {arg2}
|
|
|
|
;; xxx16 $1111,x, $2222, $3333
|
|
|
|
;; xxx16 $1111,x, #$2222, $3333
|
|
|
|
lda arg1,arg2
|
|
|
|
opc
|
|
|
|
_op_lo op, {arg3}
|
|
|
|
sta arg4
|
|
|
|
lda arg1+1,arg2
|
|
|
|
_op_hi op, {arg3}
|
|
|
|
sta arg4+1
|
|
|
|
.elseif _is_register {arg3}
|
|
|
|
;; xxx16 $1111, $2222,x $3333
|
|
|
|
;; xxx16 #$1111, $2222,x $3333
|
|
|
|
_op_lo lda, {arg1}
|
|
|
|
opc
|
|
|
|
op arg2,arg3
|
|
|
|
sta arg4
|
|
|
|
_op_hi lda, {arg1}
|
|
|
|
op arg2+1,arg3
|
|
|
|
sta arg4+1
|
|
|
|
.elseif _is_register {arg4}
|
|
|
|
;; xxx16 $1111, $2222, $3333,x
|
|
|
|
;; xxx16 #$1111, $2222, $3333,x
|
|
|
|
;; xxx16 $1111, #$2222, $3333,x
|
|
|
|
;; xxx16 #$1111, #$2222, $3333,x
|
|
|
|
_op_lo lda, {arg1}
|
|
|
|
opc
|
|
|
|
_op_lo op, {arg2}
|
|
|
|
sta arg3,arg4
|
|
|
|
_op_hi lda, {arg1}
|
|
|
|
_op_hi op, {arg2}
|
|
|
|
sta arg3+1,arg4
|
|
|
|
.else
|
|
|
|
;; xxx16 $1111, $2222, $3333
|
|
|
|
;; xxx16 #$1111, $2222, $3333
|
|
|
|
;; xxx16 $1111, #$2222, $3333
|
|
|
|
;; xxx16 #$1111, #$2222, $3333
|
|
|
|
_op_lo lda, {arg1}
|
|
|
|
opc
|
|
|
|
_op_lo op, {arg2}
|
|
|
|
sta arg3
|
|
|
|
_op_hi lda, {arg1}
|
|
|
|
_op_hi op, {arg2}
|
|
|
|
sta arg3+1
|
|
|
|
.endif
|
|
|
|
.endmacro
|
2018-03-05 16:41:22 +00:00
|
|
|
|
2018-03-26 03:49:27 +00:00
|
|
|
;;; Core for add16/sub16, with leading carry operation
|
|
|
|
.macro _addsub16lc op, opc, arg1, arg2, arg3, arg4, arg5, arg6
|
|
|
|
opc
|
2018-03-05 16:41:22 +00:00
|
|
|
.if _is_register {arg2} && _is_register {arg4} && _is_register {arg6}
|
2018-03-26 03:49:27 +00:00
|
|
|
;; xxx16 $1111,x, $2222,x, $3333,x
|
2018-02-14 05:52:36 +00:00
|
|
|
lda arg1,arg2
|
2018-03-26 03:49:27 +00:00
|
|
|
op arg3,arg4
|
2018-02-14 05:52:36 +00:00
|
|
|
sta arg5,arg6
|
|
|
|
lda arg1+1,arg2
|
2018-03-26 03:49:27 +00:00
|
|
|
op arg3+1,arg4
|
2018-02-14 05:52:36 +00:00
|
|
|
sta arg5+1,arg6
|
2018-03-26 03:49:27 +00:00
|
|
|
.elseif _is_register {arg2} && _is_register {arg4}
|
|
|
|
;; xxx16 $1111,x, $2222,x, $3333
|
|
|
|
lda arg1,arg2
|
|
|
|
op arg3,arg4
|
|
|
|
sta arg5
|
|
|
|
lda arg1+1,arg2
|
|
|
|
op arg3+1,arg4
|
|
|
|
sta arg5+1
|
2018-03-05 16:41:22 +00:00
|
|
|
.elseif _is_register {arg2} && _is_register {arg5}
|
2018-03-26 03:49:27 +00:00
|
|
|
;; xxx16 $1111,x, $2222, $3333,x
|
|
|
|
;; xxx16 $1111,x, #$2222, $3333,x
|
2018-02-14 05:52:36 +00:00
|
|
|
lda arg1,arg2
|
2018-03-26 03:49:27 +00:00
|
|
|
_op_lo op, {arg3}
|
2018-02-14 05:52:36 +00:00
|
|
|
sta arg4,arg5
|
|
|
|
lda arg1+1,arg2
|
2018-03-26 03:49:27 +00:00
|
|
|
_op_hi op, {arg3}
|
2018-02-14 05:52:36 +00:00
|
|
|
sta arg4+1,arg5
|
2018-03-05 16:41:22 +00:00
|
|
|
.elseif _is_register {arg2}
|
2018-03-26 03:49:27 +00:00
|
|
|
;; xxx16 $1111,x, $2222, $3333
|
|
|
|
;; xxx16 $1111,x, #$2222, $3333
|
2018-02-10 07:33:54 +00:00
|
|
|
lda arg1,arg2
|
2018-03-26 03:49:27 +00:00
|
|
|
_op_lo op, {arg3}
|
2018-02-10 07:33:54 +00:00
|
|
|
sta arg4
|
|
|
|
lda arg1+1,arg2
|
2018-03-26 03:49:27 +00:00
|
|
|
_op_hi op, {arg3}
|
2018-02-10 07:33:54 +00:00
|
|
|
sta arg4+1
|
2018-03-05 16:41:22 +00:00
|
|
|
.elseif _is_register {arg3}
|
2018-03-26 03:49:27 +00:00
|
|
|
;; xxx16 $1111, $2222,x $3333
|
|
|
|
;; xxx16 #$1111, $2222,x $3333
|
2018-03-05 16:41:22 +00:00
|
|
|
_op_lo lda, {arg1}
|
2018-03-26 03:49:27 +00:00
|
|
|
op arg2,arg3
|
2018-02-10 07:33:54 +00:00
|
|
|
sta arg4
|
2018-03-05 16:41:22 +00:00
|
|
|
_op_hi lda, {arg1}
|
2018-03-26 03:49:27 +00:00
|
|
|
op arg2+1,arg3
|
2018-02-10 07:33:54 +00:00
|
|
|
sta arg4+1
|
2018-03-05 16:41:22 +00:00
|
|
|
.elseif _is_register {arg4}
|
2018-03-26 03:49:27 +00:00
|
|
|
;; xxx16 $1111, $2222, $3333,x
|
|
|
|
;; xxx16 #$1111, $2222, $3333,x
|
|
|
|
;; xxx16 $1111, #$2222, $3333,x
|
|
|
|
;; xxx16 #$1111, #$2222, $3333,x
|
2018-03-05 16:41:22 +00:00
|
|
|
_op_lo lda, {arg1}
|
2018-03-26 03:49:27 +00:00
|
|
|
_op_lo op, {arg2}
|
2018-02-10 07:33:54 +00:00
|
|
|
sta arg3,arg4
|
2018-03-05 16:41:22 +00:00
|
|
|
_op_hi lda, {arg1}
|
2018-03-26 03:49:27 +00:00
|
|
|
_op_hi op, {arg2}
|
2018-02-10 07:33:54 +00:00
|
|
|
sta arg3+1,arg4
|
2018-02-06 03:01:17 +00:00
|
|
|
.else
|
2018-03-26 03:49:27 +00:00
|
|
|
;; xxx16 $1111, $2222, $3333
|
|
|
|
;; xxx16 #$1111, $2222, $3333
|
|
|
|
;; xxx16 $1111, #$2222, $3333
|
|
|
|
;; xxx16 #$1111, #$2222, $3333
|
2018-03-05 16:41:22 +00:00
|
|
|
_op_lo lda, {arg1}
|
2018-03-26 03:49:27 +00:00
|
|
|
_op_lo op, {arg2}
|
2018-02-10 05:24:35 +00:00
|
|
|
sta arg3
|
2018-03-05 16:41:22 +00:00
|
|
|
_op_hi lda, {arg1}
|
2018-03-26 03:49:27 +00:00
|
|
|
_op_hi op, {arg2}
|
2018-02-10 05:24:35 +00:00
|
|
|
sta arg3+1
|
2018-02-06 03:01:17 +00:00
|
|
|
.endif
|
|
|
|
.endmacro
|
|
|
|
|
2018-03-26 03:49:27 +00:00
|
|
|
;;; Add arg1 to arg2, store to arg3
|
|
|
|
;;; add16 $1111, $2222, $3333 ; absolute, absolute, absolute
|
|
|
|
;;; add16 $1111, #$2222, $3333 ; absolute, immediate, absolute
|
|
|
|
;;; add16 $1111,x, $2222, $3333 ; indexed, absolute, absolute
|
|
|
|
;;; add16 $1111, $2222,x, $3333 ; absolute, indexed, absolute
|
|
|
|
;;; add16 $1111, $2222, $3333,x ; absolute, absolute, indexed
|
|
|
|
;;; add16 $1111,x, $2222, $3333,x ; indexed, absolute, indexed
|
|
|
|
;;; add16 $1111,x, $2222,x, $3333,x ; indexed, indexed, indexed
|
|
|
|
.macro add16 arg1, arg2, arg3, arg4, arg5, arg6
|
|
|
|
_addsub16 adc, clc, arg1, arg2, arg3, arg4, arg5, arg6
|
|
|
|
.endmacro
|
|
|
|
;;; (as above, but clc precedes first lda)
|
|
|
|
.macro add16lc arg1, arg2, arg3, arg4, arg5, arg6
|
|
|
|
_addsub16lc adc, clc, arg1, arg2, arg3, arg4, arg5, arg6
|
|
|
|
.endmacro
|
|
|
|
|
2018-03-05 16:41:22 +00:00
|
|
|
|
2018-02-06 03:01:17 +00:00
|
|
|
;;; Add arg1 (absolute) to arg2 (8-bit absolute), store to arg3
|
2018-02-06 23:36:39 +00:00
|
|
|
;;; add16_8 $1111, #$22, $3333 ; absolute, immediate, absolute
|
|
|
|
;;; add16_8 $1111, $22, $3333 ; absolute, absolute, absolute
|
2018-02-10 07:33:54 +00:00
|
|
|
.macro add16_8 arg1, arg2, arg3
|
2018-03-05 16:41:22 +00:00
|
|
|
_op_lo lda, {arg1}
|
2018-02-06 03:01:17 +00:00
|
|
|
clc
|
2018-02-10 05:24:35 +00:00
|
|
|
adc arg2
|
|
|
|
sta arg3
|
2018-03-05 16:41:22 +00:00
|
|
|
_op_hi lda, {arg1}
|
2018-02-06 03:01:17 +00:00
|
|
|
adc #0
|
2018-02-10 05:24:35 +00:00
|
|
|
sta arg3+1
|
2018-02-06 03:01:17 +00:00
|
|
|
.endmacro
|
|
|
|
|
2018-03-05 05:52:38 +00:00
|
|
|
;;; Add A,Z to arg1 (immediate or absolute), store to arg2
|
|
|
|
;;; addax #$1111, $3333 ; immediate, absolute
|
|
|
|
;;; addax $1111, $3333 ; absolute, absolute
|
|
|
|
.macro addax arg1, arg2
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clc
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2018-03-05 16:41:22 +00:00
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_op_lo adc, {arg1}
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2018-03-05 05:52:38 +00:00
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sta arg2
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txa
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2018-03-05 16:41:22 +00:00
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_op_hi adc, {arg1}
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2018-03-05 05:52:38 +00:00
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sta arg2+1
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.endmacro
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2018-02-06 23:36:39 +00:00
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;;; Subtract arg2 from arg1, store to arg3
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2018-03-05 16:41:22 +00:00
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;;; sub16 #$1111, #$2222, $3333 ; immediate, immediate, absolute
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2018-02-10 07:33:54 +00:00
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;;; sub16 #$1111, $2222, $3333 ; immediate, absolute, absolute
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2018-02-06 23:36:39 +00:00
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;;; sub16 $1111, #$2222, $3333 ; absolute, immediate, absolute
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;;; sub16 $1111, $2222, $3333 ; absolute, absolute, absolute
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2018-02-10 07:33:54 +00:00
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;;; sub16 $1111, $2222,x, $3333 ; absolute, indexed, absolute
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;;; sub16 $1111, $2222, $3333,x ; absolute, absolute, indexed
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2018-02-14 05:52:36 +00:00
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;;; sub16 $1111,x, $2222,x, $3333 ; indexed, indexed, absolute
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;;; sub16 $1111,x, $2222, $3333,x ; indexed, absolute, indexed
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2018-03-26 03:18:43 +00:00
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;;; sub16 $1111,x, $2222,x $3333,x ; indexed, indexed, indexed
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.macro sub16 arg1, arg2, arg3, arg4, arg5, arg6
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2018-03-26 03:49:27 +00:00
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_addsub16 sbc, sec, arg1, arg2, arg3, arg4, arg5, arg6
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.endmacro
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;;; (as above, but sec precedes first lda)
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.macro sub16lc arg1, arg2, arg3, arg4, arg5, arg6
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_addsub16lc sbc, sec, arg1, arg2, arg3, arg4, arg5, arg6
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2018-02-06 03:01:17 +00:00
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.endmacro
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2018-02-06 17:31:58 +00:00
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2018-02-06 23:36:39 +00:00
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;;; Subtract arg2 from arg1, store to arg3
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2018-03-05 16:41:22 +00:00
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;;; sub16_8 #$1111, #$22, $3333 ; immediate, immediate, absolute
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;;; sub16_8 #$1111, $22, $3333 ; immediate, absolute, absolute
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2018-02-06 23:36:39 +00:00
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;;; sub16_8 $1111, #$22, $3333 ; absolute, immediate, absolute
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;;; sub16_8 $1111, $22, $3333 ; absolute, absolute, absolute
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2018-02-10 05:24:35 +00:00
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.macro sub16_8 arg1, arg2, arg3
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2018-03-05 16:41:22 +00:00
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_op_lo lda, {arg1}
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2018-02-06 23:36:39 +00:00
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sec
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2018-02-10 05:24:35 +00:00
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sbc arg2
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sta arg3
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2018-03-05 16:41:22 +00:00
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_op_hi lda, {arg1}
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2018-02-06 23:36:39 +00:00
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sbc #0
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2018-02-10 05:24:35 +00:00
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sta arg3+1
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2018-02-06 23:36:39 +00:00
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.endmacro
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2018-02-06 17:31:58 +00:00
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;;; Copy 16-bit value
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2018-02-06 23:36:39 +00:00
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;;; copy16 #$1111, $2222 ; immediate, absolute
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;;; copy16 $1111, $2222 ; absolute, absolute
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;;; copy16 $1111,x, $2222 ; indirect load, absolute store
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;;; copy16 $1111, $2222,x ; absolute load, indirect store
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2018-03-26 03:18:43 +00:00
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;;; copy16 $1111,x $2222,x ; indirect load, indirect store
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2018-03-05 16:41:22 +00:00
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;;; copy16 #$1111, $2222,x ; immediate load, indirect store
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2018-03-26 03:18:43 +00:00
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.macro copy16 arg1, arg2, arg3, arg4
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.if _is_register {arg2} && _is_register {arg4}
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;; indexed load/indexed store
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lda arg1,arg2
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sta arg3,arg4
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lda arg1+1,arg2
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sta arg3+1,arg4
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.elseif _is_register {arg2}
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2018-02-06 17:31:58 +00:00
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;; indexed load variant (arg2 is x or y)
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lda arg1,arg2
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sta arg3
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lda arg1+1,arg2
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sta arg3+1
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2018-03-05 16:41:22 +00:00
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.elseif _is_register {arg3}
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2018-02-06 17:31:58 +00:00
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;; indexed store variant (arg3 is x or y)
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2018-03-05 16:41:22 +00:00
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_op_lo lda, {arg1}
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2018-02-06 17:31:58 +00:00
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sta arg2,arg3
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2018-03-05 16:41:22 +00:00
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_op_hi lda, {arg1}
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2018-02-06 17:31:58 +00:00
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sta arg2+1,arg3
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.else
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2018-03-05 16:41:22 +00:00
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_op_lo lda, {arg1}
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2018-02-06 17:31:58 +00:00
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sta arg2
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2018-03-05 16:41:22 +00:00
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_op_hi lda, {arg1}
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2018-02-06 17:31:58 +00:00
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sta arg2+1
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.endif
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.endmacro
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2018-02-06 18:06:44 +00:00
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2018-02-06 23:36:39 +00:00
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;;; Compare 16-bit values
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2018-03-05 16:41:22 +00:00
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;;; cmp16 #$1111, #$2222 ; immediate, immediate (silly, but supported)
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2018-02-06 23:36:39 +00:00
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;;; cmp16 #$1111, $2222 ; immediate, absolute
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;;; cmp16 $1111, #$2222 ; absolute, immediate
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;;; cmp16 $1111, $2222 ; absolute, absolute
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;;; cmp16 $1111,x, $2222 ; indirect, absolute
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;;; cmp16 $1111, $2222,x ; absolute, indirect
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2018-02-06 18:06:44 +00:00
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.macro cmp16 arg1, arg2, arg3
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2018-03-05 16:41:22 +00:00
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.if _is_register {arg2}
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2018-02-06 18:06:44 +00:00
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;; indexed variant (arg2 is x or y)
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lda arg1,arg2
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cmp arg3
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lda arg1+1,arg2
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sbc arg3+1
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2018-03-05 16:41:22 +00:00
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.elseif _is_register {arg3}
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2018-02-06 18:06:44 +00:00
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;; indexed variant (arg3 is x or y)
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lda arg1
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cmp arg2,arg3
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lda arg1+1
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sbc arg2+1,arg3
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.else
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2018-03-05 16:41:22 +00:00
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_op_lo lda, {arg1}
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_op_lo cmp, {arg2}
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_op_hi lda, {arg1}
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_op_hi sbc, {arg2}
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2018-02-06 18:06:44 +00:00
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.endif
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.endmacro
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2018-02-10 06:10:11 +00:00
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;;; Shift 16-bit values
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;;; lsr16 $1111 ; absolute
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.macro lsr16 arg1
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lsr arg1+1
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ror arg1
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.endmacro
|
2018-02-26 00:06:17 +00:00
|
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;;; Increment 16-bit value
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.macro inc16 arg
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.local skip
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inc arg
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bne skip
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|
inc arg+1
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skip:
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.endmacro
|