mirror of
https://github.com/mi57730/a2d.git
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359 lines
10 KiB
PHP
359 lines
10 KiB
PHP
;;; ============================================================
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;;; Generic Macros
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;;; ============================================================
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.define _is_immediate(arg) (.match (.mid (0, 1, {arg}), #))
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.define _is_register(arg) (.match ({arg}, x) .or .match ({arg}, y))
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.define _immediate_value(arg) (.right (.tcount ({arg})-1, {arg}))
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.macro _op_lo op, arg
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.if _is_immediate {arg}
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op #<_immediate_value {arg}
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.else
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op arg
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.endif
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.endmacro
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.macro _op_hi op, arg
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.if _is_immediate {arg}
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op #>_immediate_value {arg}
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.else
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op arg+1
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.endif
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.endmacro
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;;; ============================================================
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;;; Pad with zeros to the given address
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.macro PAD_TO addr
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.res addr - *, 0
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.endmacro
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;;; ============================================================
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;;; Common patterns
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.macro return arg
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lda arg
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rts
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.endmacro
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;;; ============================================================
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;;; Calls with one parameter (address in A,X)
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.macro addr_call target, addr
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lda #<addr
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ldx #>addr
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jsr target
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.endmacro
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.macro addr_call_indirect target, addr
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lda addr
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ldx addr+1
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jsr target
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.endmacro
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.macro addr_jump target, addr
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lda #<addr
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ldx #>addr
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jmp target
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.endmacro
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;;; ============================================================
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;;; Calls with two paramters (call # in y, address in A,X)
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;;; (various output orders to match original binary)
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.macro axy_call target, yparam, addr
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lda #<addr
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ldx #>addr
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ldy #yparam
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jsr target
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.endmacro
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.macro yax_call target, yparam, addr
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ldy #yparam
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lda #<addr
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ldx #>addr
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jsr target
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.endmacro
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.macro yxa_call target, yparam, addr
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ldy #yparam
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ldx #>addr
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lda #<addr
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jsr target
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.endmacro
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.macro yxa_jump target, yparam, addr
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ldy #yparam
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ldx #>addr
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lda #<addr
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jmp target
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.endmacro
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;;; ============================================================
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;;; 16-bit pseudo-ops
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;;; Load A,X
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;;; ldax #$1234 ; immediate
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;;; ldax $1234 ; absolute
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.macro ldax arg
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_op_lo lda, {arg}
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_op_hi ldx, {arg}
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.endmacro
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;;; Load X,Y
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;;; ldxy #$1234 ; immediate
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;;; ldxy $1234 ; absolute
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.macro ldxy arg
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_op_lo ldx, {arg}
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_op_hi ldy, {arg}
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.endmacro
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;;; Store A,X
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;;; stax $1234 ; absolute
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.macro stax arg
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sta arg
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stx arg+1
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.endmacro
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;;; Add arg1 to arg2, store to arg3
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;;; add16 $1111, $2222, $3333 ; absolute, absolute, absolute
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;;; add16 $1111, #$2222, $3333 ; absolute, immediate, absolute
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;;; add16 $1111,x, $2222, $3333 ; indexed, absolute, absolute
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;;; add16 $1111,y, $2222, $3333 ; indexed, absolute, absolute
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;;; add16 $1111, $2222,x, $3333 ; absolute, indexed, absolute
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;;; add16 $1111, $2222,y, $3333 ; absolute, indexed, absolute
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;;; add16 $1111, $2222, $3333,x ; absolute, absolute, indexed
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;;; add16 $1111, $2222, $3333,y ; absolute, absolute, indexed
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;;; add16 $1111,x, $2222, $3333,x ; indexed, absolute, indexed
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;;; add16 $1111,y, $2222, $3333,y ; indexed, absolute, indexed
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;;; add16 $1111,x, $2222,x, $3333,x ; indexed, indexed, indexed
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;;; add16 $1111,y, $2222,y, $3333,y ; indexed, indexed, indexed
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.macro add16 arg1, arg2, arg3, arg4, arg5, arg6
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.if _is_register {arg2} && _is_register {arg4} && _is_register {arg6}
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lda arg1,arg2
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clc
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adc arg3,arg4
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sta arg5,arg6
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lda arg1+1,arg2
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adc arg3+1,arg4
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sta arg5+1,arg6
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.elseif _is_register {arg2} && _is_register {arg5}
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lda arg1,arg2
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clc
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_op_lo adc, {arg3}
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sta arg4,arg5
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lda arg1+1,arg2
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_op_hi adc, {arg3}
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sta arg4+1,arg5
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.elseif _is_register {arg2}
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lda arg1,arg2
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clc
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_op_lo adc, {arg3}
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sta arg4
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lda arg1+1,arg2
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_op_hi adc, {arg3}
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sta arg4+1
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.elseif _is_register {arg3}
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_op_lo lda, {arg1}
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clc
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adc arg2,arg3
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sta arg4
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_op_hi lda, {arg1}
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adc arg2+1,arg3
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sta arg4+1
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.elseif _is_register {arg4}
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_op_lo lda, {arg1}
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clc
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_op_lo adc, {arg2}
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sta arg3,arg4
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_op_hi lda, {arg1}
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_op_hi adc, {arg2}
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sta arg3+1,arg4
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.else
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_op_lo lda, {arg1}
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clc
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_op_lo adc, {arg2}
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sta arg3
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_op_hi lda, {arg1}
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_op_hi adc, {arg2}
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sta arg3+1
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.endif
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.endmacro
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;;; Add arg1 (absolute) to arg2 (8-bit absolute), store to arg3
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;;; add16_8 $1111, #$22, $3333 ; absolute, immediate, absolute
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;;; add16_8 $1111, $22, $3333 ; absolute, absolute, absolute
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.macro add16_8 arg1, arg2, arg3
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_op_lo lda, {arg1}
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clc
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adc arg2
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sta arg3
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_op_hi lda, {arg1}
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adc #0
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sta arg3+1
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.endmacro
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;;; Add A,Z to arg1 (immediate or absolute), store to arg2
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;;; addax #$1111, $3333 ; immediate, absolute
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;;; addax $1111, $3333 ; absolute, absolute
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.macro addax arg1, arg2
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clc
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_op_lo adc, {arg1}
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sta arg2
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txa
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_op_hi adc, {arg1}
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sta arg2+1
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.endmacro
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;;; Subtract arg2 from arg1, store to arg3
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;;; sub16 #$1111, #$2222, $3333 ; immediate, immediate, absolute
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;;; sub16 #$1111, $2222, $3333 ; immediate, absolute, absolute
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;;; sub16 $1111, #$2222, $3333 ; absolute, immediate, absolute
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;;; sub16 $1111, $2222, $3333 ; absolute, absolute, absolute
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;;; sub16 $1111, $2222,x, $3333 ; absolute, indexed, absolute
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;;; sub16 $1111, $2222,y, $3333 ; absolute, indexed, absolute
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;;; sub16 $1111, $2222, $3333,x ; absolute, absolute, indexed
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;;; sub16 $1111, $2222, $3333,y ; absolute, absolute, indexed
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;;; sub16 $1111,x, $2222,x, $3333 ; indexed, indexed, absolute
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;;; sub16 $1111,y, $2222,y, $3333 ; indexed, indexed, absolute
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;;; sub16 $1111,x, $2222, $3333,x ; indexed, absolute, indexed
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;;; sub16 $1111,y, $2222, $3333,y ; indexed, absolute, indexed
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.macro sub16 arg1, arg2, arg3, arg4, arg5
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.if _is_register {arg2} && _is_register {arg4}
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lda arg1,arg2
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sec
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sbc arg3,arg4
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sta arg5
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lda arg1+1,arg2
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sbc arg3+1,arg4
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sta arg5+1
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.elseif _is_register {arg2} && _is_register {arg5}
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lda arg1,arg2
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sec
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_op_lo sbc, {arg3}
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sta arg4,arg5
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lda arg1+1,arg2
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_op_hi sbc, {arg3}
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sta arg4+1,arg5
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.elseif _is_register {arg3}
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_op_lo lda, {arg1}
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sec
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sbc arg2,arg3
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sta arg4
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_op_hi lda, {arg1}
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sbc arg2+1,arg3
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sta arg4+1
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.elseif _is_register {arg4}
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_op_lo lda, {arg1}
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sec
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_op_lo sbc, {arg2}
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sta arg3,arg4
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_op_hi lda, {arg1}
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_op_hi sbc, {arg2}
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sta arg3+1,arg4
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.else
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_op_lo lda, {arg1}
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sec
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_op_lo sbc, {arg2}
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sta arg3
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_op_hi lda, {arg1}
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_op_hi sbc, {arg2}
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sta arg3+1
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.endif
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.endmacro
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;;; Subtract arg2 from arg1, store to arg3
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;;; sub16_8 #$1111, #$22, $3333 ; immediate, immediate, absolute
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;;; sub16_8 #$1111, $22, $3333 ; immediate, absolute, absolute
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;;; sub16_8 $1111, #$22, $3333 ; absolute, immediate, absolute
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;;; sub16_8 $1111, $22, $3333 ; absolute, absolute, absolute
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.macro sub16_8 arg1, arg2, arg3
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_op_lo lda, {arg1}
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sec
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sbc arg2
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sta arg3
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_op_hi lda, {arg1}
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sbc #0
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sta arg3+1
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.endmacro
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;;; Copy 16-bit value
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;;; copy16 #$1111, $2222 ; immediate, absolute
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;;; copy16 $1111, $2222 ; absolute, absolute
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;;; copy16 $1111,x, $2222 ; indirect load, absolute store
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;;; copy16 $1111,y, $2222 ; indirect load, absolute store
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;;; copy16 $1111, $2222,x ; absolute load, indirect store
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;;; copy16 $1111, $2222,y ; absolute load, indirect store
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;;; copy16 #$1111, $2222,x ; immediate load, indirect store
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;;; copy16 #$1111, $2222,y ; immediate load, indirect store
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.macro copy16 arg1, arg2, arg3
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.if _is_register {arg2}
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;; indexed load variant (arg2 is x or y)
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lda arg1,arg2
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sta arg3
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lda arg1+1,arg2
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sta arg3+1
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.elseif _is_register {arg3}
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;; indexed store variant (arg3 is x or y)
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_op_lo lda, {arg1}
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sta arg2,arg3
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_op_hi lda, {arg1}
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sta arg2+1,arg3
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.else
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_op_lo lda, {arg1}
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sta arg2
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_op_hi lda, {arg1}
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sta arg2+1
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.endif
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.endmacro
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;;; Compare 16-bit values
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;;; cmp16 #$1111, #$2222 ; immediate, immediate (silly, but supported)
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;;; cmp16 #$1111, $2222 ; immediate, absolute
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;;; cmp16 $1111, #$2222 ; absolute, immediate
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;;; cmp16 $1111, $2222 ; absolute, absolute
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;;; cmp16 $1111,x, $2222 ; indirect, absolute
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;;; cmp16 $1111,y, $2222 ; indirect, absolute
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;;; cmp16 $1111, $2222,x ; absolute, indirect
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;;; cmp16 $1111, $2222,y ; absolute indirect
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.macro cmp16 arg1, arg2, arg3
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.if _is_register {arg2}
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;; indexed variant (arg2 is x or y)
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lda arg1,arg2
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cmp arg3
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lda arg1+1,arg2
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sbc arg3+1
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.elseif _is_register {arg3}
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;; indexed variant (arg3 is x or y)
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lda arg1
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cmp arg2,arg3
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lda arg1+1
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sbc arg2+1,arg3
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.else
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_op_lo lda, {arg1}
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_op_lo cmp, {arg2}
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_op_hi lda, {arg1}
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_op_hi sbc, {arg2}
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.endif
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.endmacro
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;;; Shift 16-bit values
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;;; lsr16 $1111 ; absolute
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.macro lsr16 arg1
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lsr arg1+1
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ror arg1
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.endmacro
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;;; Increment 16-bit value
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.macro inc16 arg
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.local skip
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inc arg
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bne skip
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inc arg+1
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skip:
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.endmacro
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