92 lines
2.0 KiB
ArmAsm
92 lines
2.0 KiB
ArmAsm
; https://github.com/Michaelangel007/apple2_softswitch
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;
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; What happens to HIGH RAM on Set ALTZP $C009?
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; Init 0.
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; Aux LC RAM = 'A'
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; Main LC RAM = 'M'
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; Test 1. Aux LC RAM
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; Test 2. Main LC RAM
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; Test 3. n/a LC ROM
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; ====================
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SETSTDZP = $C008
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SETALTZP = $C009
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ROMIN2 = $C082
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LCBANK2 = $C083 ; Must be LOAD x2
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; We want an address in ROM that has a printable byte 'R' = $92
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;across all ROM versions
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;
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; $FD92 is a ROM entry point for PRA1
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; It is called from $FDB3
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; FDB3:20 92 FD 832 XAM JSR PRA1
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; ^^
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; 'R'
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TEST = $FDB4
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SAVE_A = $400 ; LC Aux
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SAVE_M = $401 ; LC Main
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SAVE_R = $402 ; LC ROM
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OUT_1 = $480
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OUT_2 = $481
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OUT_3 = $482
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; ====================
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ORG $300 ; Yes, on the stack
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__MAIN
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STA ROMIN2 ; bank LC ROM
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LDA TEST
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STA SAVE_R ; save original ROM $E000
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LDA LCBANK2 ; Enable LC RAM read
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LDA LCBANK2 ; Enable LC RAM write
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SaveE000
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LDX #'A'+$80
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LDY #'M'+$80
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STA SETALTZP ; Aux $D000..$FFFF
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LDA TEST
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STA SAVE_A ; save original Aux $E000
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STX TEST ; Visual Aux flag 'A'
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STA SETSTDZP ; Main $D000..$FFFF
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LDA TEST
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STA SAVE_M ; save original Main $E000
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STY TEST ; Visual Main flag 'M'
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; Test 1 = Aux LC RAM
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STA SETALTZP ; moment of truth
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LDA TEST ; should be 'A'
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STA OUT_1 ;
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; Test 2 = Main LC RAM
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STA SETSTDZP ; moment of truth
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LDX TEST ; should be 'M'
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STX OUT_2
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; Test 3 = n/a LC ROM
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STA ROMIN2
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STA SETALTZP ; moment of truth - won't matter if STDZP or ALTZP
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LDY TEST ; should be ROM
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STY OUT_3
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LoadE000
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LDA LCBANK2 ; Enable LC RAM read
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LDA LCBANK2 ; Enable LC RAM write
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LDX SAVE_A
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LDY SAVE_M
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; STA TESTALTZP ; OPTIMIZATION: set above
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STX TEST ; restore CARD $E000
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STA SETSTDZP
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STY TEST ; restore MAIN $E000
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STA ROMIN2 ; ROM
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RTS
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