contiki/src/maca.c

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2009-04-07 13:33:04 +00:00
#include "maca.h"
/* best format */
#define MAX_DATA 43
const uint32_t addr[MAX_DATA] = { 0x80004118,0x80009204,0x80009208,0x8000920c,0x80009210,0x80009300,0x80009304,0x80009308,0x8000930c,0x80009310,0x80009314,0x80009318,0x80009380,0x80009384,0x80009388,0x8000938c,0x80009390,0x80009394,0x8000a008,0x8000a018,0x8000a01c,0x80009424,0x80009434,0x80009438,0x8000943c,0x80009440,0x80009444,0x80009448,0x8000944c,0x80009450,0x80009460,0x80009464,0x8000947c,0x800094e0,0x800094e4,0x800094e8,0x800094ec,0x800094f0,0x800094f4,0x800094f8,0x80009470,0x8000981c,0x80009828 };
const uint32_t data[MAX_DATA] = { 0x00180012,0x00000605,0x00000504,0x00001111,0x0fc40000,0x20046000,0x4005580c,0x40075801,0x4005d801,0x5a45d800,0x4a45d800,0x40044000,0x00106000,0x00083806,0x00093807,0x0009b804,0x000db800,0x00093802,0x00000015,0x00000002,0x0000000f,0x0000aaa0,0x01002020,0x016800fe,0x8e578248,0x000000dd,0x00000946,0x0000035a,0x00100010,0x00000515,0x00397feb,0x00180358,0x00000455,0x00000001,0x00020003,0x00040014,0x00240034,0x00440144,0x02440344,0x04440544,0x0ee7fc00,0x00000082,0x0000002a };
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void init_phy(void)
{
volatile uint32_t cnt;
maca_reset = maca_reset_rst;
for(cnt=0; cnt < 100; cnt++);
maca_reset = maca_reset_cln_on;
maca_control = control_seq_nop;
#define DELAY 400000
for(cnt=0; cnt < DELAY; cnt++);
maca_tmren = maca_start_clk | maca_cpl_clk;
maca_divider = gMACA_Clock_DIV_c;
maca_warmup = 0x00180012;
maca_eofdelay = 0x00000004;
maca_ccadelay = 0x001a0022;
maca_txccadelay = 0x00000025;
maca_framesync = 0x000000A7;
maca_clk = 0x00000008;
// maca_maskirq = 0; //(maca_irq_cm | maca_irq_acpl | maca_irq_rst | maca_irq_di | maca_irq_crc | maca_irq_flt );
maca_maskirq = maca_irq_rst;
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maca_slotoffset = 0x00350000;
}
void reset_maca(void)
{
uint32_t tmp;
MACA_WRITE(maca_control, control_seq_nop);
do
{
tmp = MACA_READ(maca_status);
}
while ((tmp & maca_status_cc_mask) == cc_not_completed);
/* Clear all interrupts. */
MACA_WRITE(maca_clrirq, 0xFFFF);
}
void radio_init(void) {
uint32_t i;
for(i=0; i<MAX_DATA; i++) {
*(volatile uint32_t *)(addr[i]) = data[i];
}
}
/*
* Do the ABORT-Wait-NOP-Wait sequence in order to prevent MACA malfunctioning.
* This seqeunce is synchronous and no interrupts should be triggered when it is done.
*/
void ResumeMACASync(void)
{
uint32_t clk, TsmRxSteps, LastWarmupStep, LastWarmupData, LastWarmdownStep, LastWarmdownData;
// bool_t tmpIsrStatus;
volatile uint32_t i;
// ITC_DisableInterrupt(gMacaInt_c);
// AppInterrupts_ProtectFromMACAIrq(tmpIsrStatus); <- Original from MAC code, but not sure how is it implemented
/* Manual TSM modem shutdown */
/* read TSM_RX_STEPS */
TsmRxSteps = (*((volatile uint32_t *)(0x80009204)));
/* isolate the RX_WU_STEPS */
/* shift left to align with 32-bit addressing */
LastWarmupStep = (TsmRxSteps & 0x1f) << 2;
/* Read "current" TSM step and save this value for later */
LastWarmupData = (*((volatile uint32_t *)(0x80009300 + LastWarmupStep)));
/* isolate the RX_WD_STEPS */
/* right-shift bits down to bit 0 position */
/* left-shift to align with 32-bit addressing */
LastWarmdownStep = ((TsmRxSteps & 0x1f00) >> 8) << 2;
/* write "last warmdown data" to current TSM step to shutdown rx */
LastWarmdownData = (*((volatile uint32_t *)(0x80009300 + LastWarmdownStep)));
(*((volatile uint32_t *)(0x80009300 + LastWarmupStep))) = LastWarmdownData;
/* Abort */
MACA_WRITE(maca_control, 1);
/* Wait ~8us */
for (clk = maca_clk, i = 0; maca_clk - clk < 3 && i < 300; i++)
;
/* NOP */
MACA_WRITE(maca_control, 0);
/* Wait ~8us */
for (clk = maca_clk, i = 0; maca_clk - clk < 3 && i < 300; i++)
;
/* restore original "last warmup step" data to TSM (VERY IMPORTANT!!!) */
(*((volatile uint32_t *)(0x80009300 + LastWarmupStep))) = LastWarmupData;
/* Clear all MACA interrupts - we should have gotten the ABORT IRQ */
MACA_WRITE(maca_clrirq, 0xFFFF);
// AppInterrupts_UnprotectFromMACAIrq(tmpIsrStatus); <- Original from MAC code, but not sure how is it implemented
// ITC_EnableInterrupt(gMacaInt_c);
}