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1065 lines
30 KiB
C
1065 lines
30 KiB
C
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/*
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* Original file:
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* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
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* All rights reserved.
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*
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* Port to Contiki:
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* Authors: Andreas Dröscher <contiki@anticat.ch>
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* Hu Luo
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* Hossein Shafagh <shafagh@inf.ethz.ch>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/**
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* \addtogroup cc2538-bignum
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* @{
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*
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* \file
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* Implementation of the cc2538 BigNum driver
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*
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* bignum_subtract_start bignum_subtract_get_result (subtraction)
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* bignum_add_start bignum_add_get_result (addition)
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* bignum_mod_start bignum_mod_get_result (modulo)
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* bignum_exp_mod_start bignum_exp_mod_get_result (modular exponentiation operation)
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* bignum_inv_mod_start bignum_inv_mod_get_result (inverse modulo operation)
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* bignum_mul_start bignum_mul_get_result (multiplication)
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* bignum_divide_start bignum_divide_get_result (division)
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* bignum_cmp_start bignum_cmp_get_result (comparison)
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*/
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#include "bignum-driver.h"
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#include "stdio.h"
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#include "reg.h"
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#include "nvic.h"
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#define ASSERT(IF) if(!(IF)) { return PKA_STATUS_INVALID_PARAM; }
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/*---------------------------------------------------------------------------*/
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uint8_t
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bignum_mod_start(const uint32_t *number,
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const uint8_t number_size,
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const uint32_t *modulus,
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const uint8_t modulus_size,
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uint32_t *result_vector,
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struct process *process)
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{
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uint8_t extraBuf;
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uint32_t offset;
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int i;
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/* Check the arguments. */
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ASSERT(NULL != number);
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ASSERT(NULL != modulus);
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ASSERT(NULL != result_vector);
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/* make sure no operation is in progress. */
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if((REG(PKA_FUNCTION) & PKA_FUNCTION_RUN) != 0) {
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return PKA_STATUS_OPERATION_INPRG;
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}
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/* calculate the extra buffer requirement. */
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extraBuf = 2 + modulus_size % 2;
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offset = 0;
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/* Update the A ptr with the offset address of the PKA RAM location
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* where the number will be stored. */
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REG(PKA_APTR) = offset >> 2;
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/* Load the number in PKA RAM */
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for(i = 0; i < number_size; i++) {
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REG(PKA_RAM_BASE + offset + 4 * i) = number[i];
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}
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/* determine the offset for the next data input. */
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offset += 4 * (i + number_size % 2);
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/* Update the B ptr with the offset address of the PKA RAM location
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* where the divisor will be stored. */
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REG(PKA_BPTR) = offset >> 2;
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/* Load the divisor in PKA RAM. */
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for(i = 0; i < modulus_size; i++) {
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REG(PKA_RAM_BASE + offset + 4 * i) = modulus[i];
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}
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/* determine the offset for the next data. */
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offset += 4 * (i + extraBuf);
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/* Copy the result vector address location. */
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*result_vector = PKA_RAM_BASE + offset;
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/* Load C ptr with the result location in PKA RAM */
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REG(PKA_CPTR) = offset >> 2;
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/* Load A length registers with Big number length in 32 bit words. */
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REG(PKA_ALENGTH) = number_size;
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/* Load B length registers Divisor length in 32-bit words. */
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REG(PKA_BLENGTH) = modulus_size;
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/* Start the PKCP modulo operation by setting the PKA Function register. */
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REG(PKA_FUNCTION) = (PKA_FUNCTION_RUN | PKA_FUNCTION_MODULO);
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/* Enable Interrupt */
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if(process != NULL) {
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pka_register_process_notification(process);
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nvic_interrupt_unpend(NVIC_INT_PKA);
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nvic_interrupt_enable(NVIC_INT_PKA);
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}
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return PKA_STATUS_SUCCESS;
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}
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/*---------------------------------------------------------------------------*/
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uint8_t
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bignum_mod_get_result(uint32_t *buffer,
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const uint8_t buffer_size,
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const uint32_t result_vector)
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{
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uint32_t regMSWVal;
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uint32_t len;
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int i;
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/* Check the arguments. */
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ASSERT(NULL != buffer);
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ASSERT(result_vector > PKA_RAM_BASE);
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ASSERT(result_vector < (PKA_RAM_BASE + PKA_RAM_SIZE));
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/* verify that the operation is complete. */
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if((REG(PKA_FUNCTION) & PKA_FUNCTION_RUN) != 0) {
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return PKA_STATUS_OPERATION_INPRG;
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}
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/* Disable Interrupt */
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nvic_interrupt_disable(NVIC_INT_PKA);
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pka_register_process_notification(NULL);
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/* Get the MSW register value. */
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regMSWVal = REG(PKA_DIVMSW);
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/* Check to make sure that the result vector is not all zeroes. */
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if(regMSWVal & PKA_DIVMSW_RESULT_IS_ZERO) {
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return PKA_STATUS_RESULT_0;
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}
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/* Get the length of the result. */
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len = ((regMSWVal & PKA_DIVMSW_MSW_ADDRESS_M) + 1)
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- ((result_vector - PKA_RAM_BASE) >> 2);
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/* If the size of the buffer provided is less than the result length than
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* return error. */
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if(buffer_size < len) {
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return PKA_STATUS_BUF_UNDERFLOW;
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}
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/* copy the result from vector C into the pResult. */
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for(i = 0; i < len; i++) {
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buffer[i] = REG(result_vector + 4 * i);
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}
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return PKA_STATUS_SUCCESS;
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}
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/*---------------------------------------------------------------------------*/
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uint8_t
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bignum_cmp_start(const uint32_t *number1,
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const uint32_t *number2,
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const uint8_t size,
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struct process *process)
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{
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uint32_t offset;
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int i;
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/* Check the arguments. */
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ASSERT(NULL != number1);
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ASSERT(NULL != number2);
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offset = 0;
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/* Make sure no operation is in progress. */
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if((REG(PKA_FUNCTION) & PKA_FUNCTION_RUN) != 0) {
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return PKA_STATUS_OPERATION_INPRG;
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}
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/* Update the A ptr with the offset address of the PKA RAM location
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* where the first big number will be stored. */
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REG(PKA_APTR) = offset >> 2;
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/* Load the first big number in PKA RAM. */
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for(i = 0; i < size; i++) {
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REG(PKA_RAM_BASE + offset + 4 * i) = number1[i];
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}
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/* Determine the offset in PKA RAM for the next pointer. */
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offset += 4 * (i + size % 2);
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/* Update the B ptr with the offset address of the PKA RAM location
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* where the second big number will be stored. */
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REG(PKA_BPTR) = offset >> 2;
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/* Load the second big number in PKA RAM. */
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for(i = 0; i < size; i++) {
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REG(PKA_RAM_BASE + offset + 4 * i) = number2[i];
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}
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/* Load length registers in 32 bit word size. */
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REG(PKA_ALENGTH) = size;
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/* Set the PKA Function register for the compare operation
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* and start the operation. */
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REG(PKA_FUNCTION) = (PKA_FUNCTION_RUN | PKA_FUNCTION_COMPARE);
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/* Enable Interrupt */
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if(process != NULL) {
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pka_register_process_notification(process);
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nvic_interrupt_unpend(NVIC_INT_PKA);
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nvic_interrupt_enable(NVIC_INT_PKA);
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}
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return PKA_STATUS_SUCCESS;
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}
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/*---------------------------------------------------------------------------*/
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uint8_t
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bignum_cmp_get_result(void)
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{
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uint8_t status;
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/* verify that the operation is complete. */
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if((REG(PKA_FUNCTION) & PKA_FUNCTION_RUN) != 0) {
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status = PKA_STATUS_OPERATION_INPRG;
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return status;
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}
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/* Disable Interrupt */
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nvic_interrupt_disable(NVIC_INT_PKA);
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pka_register_process_notification(NULL);
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/* Check the compare register. */
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switch(REG(PKA_COMPARE)) {
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case PKA_COMPARE_A_EQUALS_B:
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status = PKA_STATUS_SUCCESS;
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break;
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case PKA_COMPARE_A_GREATER_THAN_B:
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status = PKA_STATUS_A_GR_B;
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break;
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case PKA_COMPARE_A_LESS_THAN_B:
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status = PKA_STATUS_A_LT_B;
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break;
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default:
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status = PKA_STATUS_FAILURE;
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break;
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}
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return status;
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}
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/*---------------------------------------------------------------------------*/
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uint8_t
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bignum_inv_mod_start(const uint32_t *number,
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const uint8_t number_size,
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const uint32_t *modulus,
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const uint8_t modulus_size,
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uint32_t *result_vector,
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struct process *process)
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{
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uint32_t offset;
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int i;
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/* Check the arguments. */
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ASSERT(NULL != number);
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ASSERT(NULL != modulus);
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ASSERT(NULL != result_vector);
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offset = 0;
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/* Make sure no operation is in progress. */
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if((REG(PKA_FUNCTION) & PKA_FUNCTION_RUN) != 0) {
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return PKA_STATUS_OPERATION_INPRG;
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}
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/* Update the A ptr with the offset address of the PKA RAM location
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* where the number will be stored. */
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REG(PKA_APTR) = offset >> 2;
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/* Load the \e number number in PKA RAM. */
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for(i = 0; i < number_size; i++) {
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REG(PKA_RAM_BASE + offset + 4 * i) = number[i];
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}
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/* Determine the offset for next data. */
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offset += 4 * (i + number_size % 2);
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/* Update the B ptr with the offset address of the PKA RAM location
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* where the modulus will be stored. */
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REG(PKA_BPTR) = offset >> 2;
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/* Load the \e modulus divisor in PKA RAM. */
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for(i = 0; i < modulus_size; i++) {
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REG(PKA_RAM_BASE + offset + 4 * i) = modulus[i];
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}
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/* Determine the offset for result data. */
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offset += 4 * (i + modulus_size % 2);
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/* Copy the result vector address location. */
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*result_vector = PKA_RAM_BASE + offset;
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/* Load D ptr with the result location in PKA RAM. */
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REG(PKA_DPTR) = offset >> 2;
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/* Load the respective length registers. */
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REG(PKA_ALENGTH) = number_size;
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REG(PKA_BLENGTH) = modulus_size;
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/* set the PKA function to InvMod operation and the start the operation. */
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REG(PKA_FUNCTION) = 0x0000F000;
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/* Enable Interrupt */
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if(process != NULL) {
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pka_register_process_notification(process);
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nvic_interrupt_unpend(NVIC_INT_PKA);
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nvic_interrupt_enable(NVIC_INT_PKA);
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}
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return PKA_STATUS_SUCCESS;
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}
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/*---------------------------------------------------------------------------*/
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uint8_t
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bignum_inv_mod_get_result(uint32_t *buffer,
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const uint8_t buffer_size,
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const uint32_t result_vector)
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{
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|
|
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uint32_t regMSWVal;
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uint32_t len;
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int i;
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/* Check the arguments. */
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ASSERT(NULL != buffer);
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ASSERT(result_vector > PKA_RAM_BASE);
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ASSERT(result_vector < (PKA_RAM_BASE + PKA_RAM_SIZE));
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/* Verify that the operation is complete. */
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if((REG(PKA_FUNCTION) & PKA_FUNCTION_RUN) != 0) {
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return PKA_STATUS_OPERATION_INPRG;
|
||
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}
|
||
|
|
||
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/* Disable Interrupt */
|
||
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nvic_interrupt_disable(NVIC_INT_PKA);
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pka_register_process_notification(NULL);
|
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|
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/* Get the MSW register value. */
|
||
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regMSWVal = REG(PKA_MSW);
|
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|
||
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/* Check to make sure that the result vector is not all zeroes. */
|
||
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if(regMSWVal & PKA_MSW_RESULT_IS_ZERO) {
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return PKA_STATUS_RESULT_0;
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}
|
||
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|
||
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/* Get the length of the result */
|
||
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len = ((regMSWVal & PKA_MSW_MSW_ADDRESS_M) + 1)
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- ((result_vector - PKA_RAM_BASE) >> 2);
|
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|
||
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/* Check if the provided buffer length is adequate to store the result
|
||
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* data. */
|
||
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if(buffer_size < len) {
|
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return PKA_STATUS_BUF_UNDERFLOW;
|
||
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}
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||
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|
||
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/* Copy the result from vector C into the \e buffer. */
|
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for(i = 0; i < len; i++) {
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buffer[i] = REG(result_vector + 4 * i);
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}
|
||
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|
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return PKA_STATUS_SUCCESS;
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}
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/*---------------------------------------------------------------------------*/
|
||
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uint8_t
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bignum_mul_start(const uint32_t *multiplicand,
|
||
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const uint8_t multiplicand_size,
|
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const uint32_t *multiplier,
|
||
|
const uint8_t multiplier_size,
|
||
|
uint32_t *result_vector,
|
||
|
struct process *process)
|
||
|
{
|
||
|
|
||
|
uint32_t offset;
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||
|
int i;
|
||
|
|
||
|
/* Check for the arguments. */
|
||
|
ASSERT(NULL != multiplicand);
|
||
|
ASSERT(NULL != multiplier);
|
||
|
ASSERT(NULL != result_vector);
|
||
|
|
||
|
offset = 0;
|
||
|
|
||
|
/* Make sure no operation is in progress. */
|
||
|
if((REG(PKA_FUNCTION) & PKA_FUNCTION_RUN) != 0) {
|
||
|
return PKA_STATUS_OPERATION_INPRG;
|
||
|
}
|
||
|
|
||
|
/* Update the A ptr with the offset address of the PKA RAM location
|
||
|
* where the multiplicand will be stored. */
|
||
|
REG(PKA_APTR) = offset >> 2;
|
||
|
|
||
|
/* Load the multiplicand in PKA RAM. */
|
||
|
for(i = 0; i < multiplicand_size; i++) {
|
||
|
REG(PKA_RAM_BASE + offset + 4 * i) = *multiplicand;
|
||
|
multiplicand++;
|
||
|
}
|
||
|
|
||
|
/* Determine the offset for the next data. */
|
||
|
offset += 4 * (i + (multiplicand_size % 2));
|
||
|
|
||
|
/* Update the B ptr with the offset address of the PKA RAM location
|
||
|
* where the multiplier will be stored. */
|
||
|
REG(PKA_BPTR) = offset >> 2;
|
||
|
|
||
|
/* Load the multiplier in PKA RAM. */
|
||
|
for(i = 0; i < multiplier_size; i++) {
|
||
|
REG(PKA_RAM_BASE + offset + 4 * i) = *multiplier;
|
||
|
multiplier++;
|
||
|
}
|
||
|
|
||
|
/* Determine the offset for the next data. */
|
||
|
offset += 4 * (i + (multiplier_size % 2));
|
||
|
|
||
|
/* Copy the result vector address location. */
|
||
|
*result_vector = PKA_RAM_BASE + offset;
|
||
|
|
||
|
/* Load C ptr with the result location in PKA RAM. */
|
||
|
REG(PKA_CPTR) = offset >> 2;
|
||
|
|
||
|
/* Load the respective length registers. */
|
||
|
REG(PKA_ALENGTH) = multiplicand_size;
|
||
|
REG(PKA_BLENGTH) = multiplier_size;
|
||
|
|
||
|
/* Set the PKA function to the multiplication and start it. */
|
||
|
REG(PKA_FUNCTION) = (PKA_FUNCTION_RUN | PKA_FUNCTION_MULTIPLY);
|
||
|
|
||
|
/* Enable Interrupt */
|
||
|
if(process != NULL) {
|
||
|
pka_register_process_notification(process);
|
||
|
nvic_interrupt_unpend(NVIC_INT_PKA);
|
||
|
nvic_interrupt_enable(NVIC_INT_PKA);
|
||
|
}
|
||
|
|
||
|
return PKA_STATUS_SUCCESS;
|
||
|
}
|
||
|
/*---------------------------------------------------------------------------*/
|
||
|
uint8_t
|
||
|
bignum_mul_get_result(uint32_t *buffer,
|
||
|
uint32_t *buffer_size,
|
||
|
const uint32_t result_vector)
|
||
|
{
|
||
|
|
||
|
uint32_t regMSWVal;
|
||
|
uint32_t len;
|
||
|
int i;
|
||
|
|
||
|
/* Check for arguments. */
|
||
|
ASSERT(NULL != buffer);
|
||
|
ASSERT(NULL != buffer_size);
|
||
|
ASSERT(result_vector > PKA_RAM_BASE);
|
||
|
ASSERT(result_vector < (PKA_RAM_BASE + PKA_RAM_SIZE));
|
||
|
|
||
|
/* Verify that the operation is complete. */
|
||
|
if((REG(PKA_FUNCTION) & PKA_FUNCTION_RUN) != 0) {
|
||
|
return PKA_STATUS_OPERATION_INPRG;
|
||
|
}
|
||
|
|
||
|
/* Disable Interrupt */
|
||
|
nvic_interrupt_disable(NVIC_INT_PKA);
|
||
|
pka_register_process_notification(NULL);
|
||
|
|
||
|
/* Get the MSW register value. */
|
||
|
regMSWVal = REG(PKA_MSW);
|
||
|
|
||
|
/* Check to make sure that the result vector is not all zeroes. */
|
||
|
if(regMSWVal & PKA_MSW_RESULT_IS_ZERO) {
|
||
|
return PKA_STATUS_RESULT_0;
|
||
|
}
|
||
|
|
||
|
/* Get the length of the result. */
|
||
|
len = ((regMSWVal & PKA_MSW_MSW_ADDRESS_M) + 1)
|
||
|
- ((result_vector - PKA_RAM_BASE) >> 2);
|
||
|
|
||
|
/* Make sure that the length of the supplied result buffer is adequate
|
||
|
* to store the resultant. */
|
||
|
if(*buffer_size < len) {
|
||
|
return PKA_STATUS_BUF_UNDERFLOW;
|
||
|
}
|
||
|
|
||
|
/* Copy the resultant length. */
|
||
|
*buffer_size = len;
|
||
|
|
||
|
/* Copy the result from vector C into the pResult. */
|
||
|
for(i = 0; i < *buffer_size; i++) {
|
||
|
buffer[i] = REG(result_vector + 4 * i);
|
||
|
}
|
||
|
|
||
|
return PKA_STATUS_SUCCESS;
|
||
|
}
|
||
|
/*---------------------------------------------------------------------------*/
|
||
|
uint8_t
|
||
|
bignum_add_start(const uint32_t *number1,
|
||
|
const uint8_t number1_size,
|
||
|
const uint32_t *number2,
|
||
|
const uint8_t number2_size,
|
||
|
uint32_t *result_vector,
|
||
|
struct process *process)
|
||
|
{
|
||
|
|
||
|
uint32_t offset;
|
||
|
int i;
|
||
|
|
||
|
/* Check for arguments. */
|
||
|
ASSERT(NULL != number1);
|
||
|
ASSERT(NULL != number2);
|
||
|
ASSERT(NULL != result_vector);
|
||
|
|
||
|
offset = 0;
|
||
|
|
||
|
/* Make sure no operation is in progress. */
|
||
|
if((REG(PKA_FUNCTION) & PKA_FUNCTION_RUN) != 0) {
|
||
|
return PKA_STATUS_OPERATION_INPRG;
|
||
|
}
|
||
|
|
||
|
/* Update the A ptr with the offset address of the PKA RAM location
|
||
|
* where the big number 1 will be stored. */
|
||
|
REG(PKA_APTR) = offset >> 2;
|
||
|
|
||
|
/* Load the big number 1 in PKA RAM. */
|
||
|
for(i = 0; i < number1_size; i++) {
|
||
|
REG(PKA_RAM_BASE + offset + 4 * i) = number1[i];
|
||
|
}
|
||
|
|
||
|
/* Determine the offset in PKA RAM for the next data. */
|
||
|
offset += 4 * (i + (number1_size % 2));
|
||
|
|
||
|
/* Update the B ptr with the offset address of the PKA RAM location
|
||
|
* where the big number 2 will be stored. */
|
||
|
REG(PKA_BPTR) = offset >> 2;
|
||
|
|
||
|
/* Load the big number 2 in PKA RAM. */
|
||
|
for(i = 0; i < number2_size; i++) {
|
||
|
REG(PKA_RAM_BASE + offset + 4 * i) = number2[i];
|
||
|
}
|
||
|
|
||
|
/* Determine the offset in PKA RAM for the next data. */
|
||
|
offset += 4 * (i + (number2_size % 2));
|
||
|
|
||
|
/* Copy the result vector address location. */
|
||
|
*result_vector = PKA_RAM_BASE + offset;
|
||
|
|
||
|
/* Load C ptr with the result location in PKA RAM. */
|
||
|
REG(PKA_CPTR) = offset >> 2;
|
||
|
|
||
|
/* Load respective length registers. */
|
||
|
REG(PKA_ALENGTH) = number1_size;
|
||
|
REG(PKA_BLENGTH) = number2_size;
|
||
|
|
||
|
/* Set the function for the add operation and start the operation. */
|
||
|
REG(PKA_FUNCTION) = (PKA_FUNCTION_RUN | PKA_FUNCTION_ADD);
|
||
|
|
||
|
/* Enable Interrupt */
|
||
|
if(process != NULL) {
|
||
|
pka_register_process_notification(process);
|
||
|
nvic_interrupt_unpend(NVIC_INT_PKA);
|
||
|
nvic_interrupt_enable(NVIC_INT_PKA);
|
||
|
}
|
||
|
|
||
|
return PKA_STATUS_SUCCESS;
|
||
|
}
|
||
|
/*---------------------------------------------------------------------------*/
|
||
|
uint8_t
|
||
|
bignum_add_get_result(uint32_t *buffer,
|
||
|
uint32_t *buffer_size,
|
||
|
const uint32_t result_vector)
|
||
|
{
|
||
|
|
||
|
uint32_t regMSWVal;
|
||
|
uint32_t len;
|
||
|
int i;
|
||
|
|
||
|
/* Check for the arguments. */
|
||
|
ASSERT(NULL != buffer);
|
||
|
ASSERT(NULL != buffer_size);
|
||
|
ASSERT(result_vector > PKA_RAM_BASE);
|
||
|
ASSERT(result_vector < (PKA_RAM_BASE + PKA_RAM_SIZE));
|
||
|
|
||
|
/* Verify that the operation is complete. */
|
||
|
if((REG(PKA_FUNCTION) & PKA_FUNCTION_RUN) != 0) {
|
||
|
return PKA_STATUS_OPERATION_INPRG;
|
||
|
}
|
||
|
|
||
|
/* Disable Interrupt */
|
||
|
nvic_interrupt_disable(NVIC_INT_PKA);
|
||
|
pka_register_process_notification(NULL);
|
||
|
|
||
|
/* Get the MSW register value. */
|
||
|
regMSWVal = REG(PKA_MSW);
|
||
|
|
||
|
/* Check to make sure that the result vector is not all zeroes. */
|
||
|
if(regMSWVal & PKA_MSW_RESULT_IS_ZERO) {
|
||
|
return PKA_STATUS_RESULT_0;
|
||
|
}
|
||
|
|
||
|
/* Get the length of the result. */
|
||
|
len = ((regMSWVal & PKA_MSW_MSW_ADDRESS_M) + 1)
|
||
|
- ((result_vector - PKA_RAM_BASE) >> 2);
|
||
|
|
||
|
/* Make sure that the supplied result buffer is adequate to store the
|
||
|
* resultant data. */
|
||
|
if(*buffer_size < len) {
|
||
|
return PKA_STATUS_BUF_UNDERFLOW;
|
||
|
}
|
||
|
|
||
|
/* Copy the length. */
|
||
|
*buffer_size = len;
|
||
|
|
||
|
/* Copy the result from vector C into the provided buffer. */
|
||
|
for(i = 0; i < *buffer_size; i++) {
|
||
|
buffer[i] = REG(result_vector + 4 * i);
|
||
|
}
|
||
|
|
||
|
return PKA_STATUS_SUCCESS;
|
||
|
}
|
||
|
/*---------------------------------------------------------------------------*/
|
||
|
/* below functions are added by hu luo */
|
||
|
uint8_t
|
||
|
bignum_subtract_start(const uint32_t *number1,
|
||
|
const uint8_t number1_size,
|
||
|
const uint32_t *number2,
|
||
|
const uint8_t number2_size,
|
||
|
uint32_t *result_vector,
|
||
|
struct process *process)
|
||
|
{
|
||
|
|
||
|
uint32_t offset;
|
||
|
int i;
|
||
|
|
||
|
/* Check for arguments. */
|
||
|
ASSERT(NULL != number1);
|
||
|
ASSERT(NULL != number2);
|
||
|
ASSERT(NULL != result_vector);
|
||
|
|
||
|
offset = 0;
|
||
|
|
||
|
/* Make sure no operation is in progress. */
|
||
|
if((REG(PKA_FUNCTION) & PKA_FUNCTION_RUN) != 0) {
|
||
|
return PKA_STATUS_OPERATION_INPRG;
|
||
|
}
|
||
|
|
||
|
/* Update the A ptr with the offset address of the PKA RAM location
|
||
|
* where the big number 1 will be stored. */
|
||
|
REG(PKA_APTR) = offset >> 2;
|
||
|
|
||
|
/* Load the big number 1 in PKA RAM. */
|
||
|
for(i = 0; i < number1_size; i++) {
|
||
|
REG(PKA_RAM_BASE + offset + 4 * i) = number1[i];
|
||
|
}
|
||
|
|
||
|
/* Determine the offset in PKA RAM for the next data. */
|
||
|
offset += 4 * (i + (number1_size % 2));
|
||
|
|
||
|
/* Update the B ptr with the offset address of the PKA RAM location
|
||
|
* where the big number 2 will be stored. */
|
||
|
REG(PKA_BPTR) = offset >> 2;
|
||
|
|
||
|
/* Load the big number 2 in PKA RAM. */
|
||
|
for(i = 0; i < number2_size; i++) {
|
||
|
REG(PKA_RAM_BASE + offset + 4 * i) = number2[i];
|
||
|
}
|
||
|
|
||
|
/* Determine the offset in PKA RAM for the next data. */
|
||
|
offset += 4 * (i + (number2_size % 2));
|
||
|
|
||
|
/* Copy the result vector address location. */
|
||
|
*result_vector = PKA_RAM_BASE + offset;
|
||
|
|
||
|
/* Load C ptr with the result location in PKA RAM. */
|
||
|
REG(PKA_CPTR) = offset >> 2;
|
||
|
|
||
|
/* Load respective length registers. */
|
||
|
REG(PKA_ALENGTH) = number1_size;
|
||
|
REG(PKA_BLENGTH) = number2_size;
|
||
|
|
||
|
/* Set the function for the add operation and start the operation. */
|
||
|
REG(PKA_FUNCTION) = (PKA_FUNCTION_RUN | PKA_FUNCTION_SUBTRACT);
|
||
|
|
||
|
/* Enable Interrupt */
|
||
|
if(process != NULL) {
|
||
|
pka_register_process_notification(process);
|
||
|
nvic_interrupt_unpend(NVIC_INT_PKA);
|
||
|
nvic_interrupt_enable(NVIC_INT_PKA);
|
||
|
}
|
||
|
|
||
|
return PKA_STATUS_SUCCESS;
|
||
|
}
|
||
|
/*---------------------------------------------------------------------------*/
|
||
|
uint8_t
|
||
|
bignum_subtract_get_result(uint32_t *buffer,
|
||
|
uint32_t *buffer_size,
|
||
|
const uint32_t result_vector)
|
||
|
{
|
||
|
|
||
|
uint32_t regMSWVal;
|
||
|
uint32_t len;
|
||
|
int i;
|
||
|
|
||
|
/* Check for the arguments. */
|
||
|
ASSERT(NULL != buffer);
|
||
|
ASSERT(NULL != buffer_size);
|
||
|
ASSERT(result_vector > PKA_RAM_BASE);
|
||
|
ASSERT(result_vector < (PKA_RAM_BASE + PKA_RAM_SIZE));
|
||
|
|
||
|
/* Verify that the operation is complete. */
|
||
|
if((REG(PKA_FUNCTION) & PKA_FUNCTION_RUN) != 0) {
|
||
|
return PKA_STATUS_OPERATION_INPRG;
|
||
|
}
|
||
|
|
||
|
/* Disable Interrupt */
|
||
|
nvic_interrupt_disable(NVIC_INT_PKA);
|
||
|
pka_register_process_notification(NULL);
|
||
|
|
||
|
/* Get the MSW register value. */
|
||
|
regMSWVal = REG(PKA_MSW);
|
||
|
|
||
|
/* Check to make sure that the result vector is not all zeroes. */
|
||
|
if(regMSWVal & PKA_MSW_RESULT_IS_ZERO) {
|
||
|
return PKA_STATUS_RESULT_0;
|
||
|
}
|
||
|
|
||
|
/* Get the length of the result. */
|
||
|
len = ((regMSWVal & PKA_MSW_MSW_ADDRESS_M) + 1)
|
||
|
- ((result_vector - PKA_RAM_BASE) >> 2);
|
||
|
|
||
|
/* Make sure that the supplied result buffer is adequate to store the
|
||
|
* resultant data. */
|
||
|
if(*buffer_size < len) {
|
||
|
return PKA_STATUS_BUF_UNDERFLOW;
|
||
|
}
|
||
|
|
||
|
/* Copy the length. */
|
||
|
*buffer_size = len;
|
||
|
|
||
|
/* Copy the result from vector C into the provided buffer. */
|
||
|
for(i = 0; i < *buffer_size; i++) {
|
||
|
buffer[i] = REG(result_vector + 4 * i);
|
||
|
}
|
||
|
|
||
|
return PKA_STATUS_SUCCESS;
|
||
|
}
|
||
|
/*---------------------------------------------------------------------------*/
|
||
|
uint8_t
|
||
|
bignum_exp_mod_start(const uint32_t *number,
|
||
|
const uint8_t number_size,
|
||
|
const uint32_t *modulus,
|
||
|
const uint8_t modulus_size,
|
||
|
const uint32_t *base,
|
||
|
const uint8_t base_size,
|
||
|
uint32_t *result_vector,
|
||
|
struct process *process)
|
||
|
{
|
||
|
uint32_t offset;
|
||
|
int i;
|
||
|
|
||
|
/* Check for the arguments. */
|
||
|
ASSERT(NULL != number);
|
||
|
ASSERT(NULL != modulus);
|
||
|
ASSERT(NULL != base);
|
||
|
ASSERT(NULL != result_vector);
|
||
|
ASSERT(modulus != base);
|
||
|
|
||
|
offset = 0;
|
||
|
|
||
|
/* Make sure no PKA operation is in progress. */
|
||
|
if((REG(PKA_FUNCTION) & PKA_FUNCTION_RUN) != 0) {
|
||
|
return PKA_STATUS_OPERATION_INPRG;
|
||
|
}
|
||
|
|
||
|
/* Update the A ptr with the offset address of the PKA RAM location
|
||
|
* where the exponent will be stored. */
|
||
|
REG(PKA_APTR) = offset >> 2;
|
||
|
|
||
|
/* Load the Exponent in PKA RAM. */
|
||
|
for(i = 0; i < number_size; i++) {
|
||
|
REG(PKA_RAM_BASE + offset + 4 * i) = number[i];
|
||
|
}
|
||
|
|
||
|
/* Determine the offset for the next data(BPTR). */
|
||
|
offset += 4 * (i + number_size % 2);
|
||
|
/* Update the B ptr with the offset address of the PKA RAM location
|
||
|
* where the divisor will be stored. */
|
||
|
REG(PKA_BPTR) = offset >> 2;
|
||
|
|
||
|
/* Load the Modulus in PKA RAM. */
|
||
|
for(i = 0; i < modulus_size; i++) {
|
||
|
REG(PKA_RAM_BASE + offset + 4 * i) = modulus[i];
|
||
|
}
|
||
|
|
||
|
/* Determine the offset for the next data(CPTR). */
|
||
|
offset += 4 * (i + modulus_size % 2 + 2);
|
||
|
/* Update the C ptr with the offset address of the PKA RAM location
|
||
|
* where the Base will be stored. */
|
||
|
REG(PKA_CPTR) = offset >> 2;
|
||
|
|
||
|
/* Write Base to the Vector C in PKA RAM */
|
||
|
|
||
|
for(i = 0; i < base_size; i++) {
|
||
|
REG(PKA_RAM_BASE + offset + 4 * i) = base[i];
|
||
|
}
|
||
|
|
||
|
/* Determine the offset for the next data.
|
||
|
* INFO D and B can share the same memory area!
|
||
|
* offset += 4 * (i + extraBuf + 2); */
|
||
|
|
||
|
/* Copy the result vector address location. */
|
||
|
*result_vector = PKA_RAM_BASE + offset;
|
||
|
|
||
|
/* Load D ptr with the result location in PKA RAM */
|
||
|
REG(PKA_DPTR) = offset >> 2;
|
||
|
|
||
|
/* Load A length registers with Big number length in 32 bit words. */
|
||
|
REG(PKA_ALENGTH) = number_size;
|
||
|
|
||
|
/* Load B length registers Divisor length in 32-bit words. */
|
||
|
REG(PKA_BLENGTH) = modulus_size;
|
||
|
/* REG(PKA_SHIFT) = 0x00000001;
|
||
|
* Required for (EXPMod-variable): 0x0000A000
|
||
|
* Start the PKCP modulo exponentiation operation(EXPMod-ACT2)
|
||
|
* by setting the PKA Function register. */
|
||
|
REG(PKA_FUNCTION) = 0x0000C000;
|
||
|
|
||
|
/* Enable Interrupt */
|
||
|
if(process != NULL) {
|
||
|
pka_register_process_notification(process);
|
||
|
nvic_interrupt_unpend(NVIC_INT_PKA);
|
||
|
nvic_interrupt_enable(NVIC_INT_PKA);
|
||
|
}
|
||
|
|
||
|
return PKA_STATUS_SUCCESS;
|
||
|
}
|
||
|
/*---------------------------------------------------------------------------*/
|
||
|
uint8_t
|
||
|
bignum_exp_mod_get_result(uint32_t *buffer,
|
||
|
const uint8_t buffer_size,
|
||
|
const uint32_t result_vector)
|
||
|
{
|
||
|
|
||
|
uint32_t regMSWVal;
|
||
|
uint32_t len;
|
||
|
int i;
|
||
|
|
||
|
/* Check the arguments. */
|
||
|
ASSERT(NULL != buffer);
|
||
|
ASSERT(result_vector > PKA_RAM_BASE);
|
||
|
ASSERT(result_vector < (PKA_RAM_BASE + PKA_RAM_SIZE));
|
||
|
|
||
|
/* verify that the operation is complete. */
|
||
|
if((REG(PKA_FUNCTION) & PKA_FUNCTION_RUN) != 0) {
|
||
|
return PKA_STATUS_OPERATION_INPRG;
|
||
|
}
|
||
|
|
||
|
/* Disable Interrupt */
|
||
|
nvic_interrupt_disable(NVIC_INT_PKA);
|
||
|
pka_register_process_notification(NULL);
|
||
|
|
||
|
/* Get the MSW register value. */
|
||
|
regMSWVal = REG(PKA_MSW);
|
||
|
|
||
|
/* Check to make sure that the result vector is not all zeroes. */
|
||
|
if(regMSWVal & PKA_MSW_RESULT_IS_ZERO) {
|
||
|
return PKA_STATUS_RESULT_0;
|
||
|
}
|
||
|
|
||
|
/* Get the length of the result */
|
||
|
len = ((regMSWVal & PKA_MSW_MSW_ADDRESS_M) + 1)
|
||
|
- ((result_vector - PKA_RAM_BASE) >> 2);
|
||
|
/* If the size of the buffer provided is less than the result length than
|
||
|
* return error. */
|
||
|
if(buffer_size < len) {
|
||
|
return PKA_STATUS_BUF_UNDERFLOW;
|
||
|
}
|
||
|
|
||
|
/* copy the result from vector C into the pResult. */
|
||
|
for(i = 0; i < len; i++) {
|
||
|
buffer[i] = REG(result_vector + 4 * i);
|
||
|
}
|
||
|
|
||
|
return PKA_STATUS_SUCCESS;
|
||
|
}
|
||
|
/*---------------------------------------------------------------------------*/
|
||
|
uint8_t
|
||
|
bignum_divide_start(const uint32_t *dividend,
|
||
|
const uint8_t dividend_size,
|
||
|
const uint32_t *divisor,
|
||
|
const uint8_t divisor_size,
|
||
|
uint32_t *result_vector,
|
||
|
struct process *process)
|
||
|
{
|
||
|
|
||
|
uint32_t offset;
|
||
|
uint32_t spacing;
|
||
|
int i;
|
||
|
|
||
|
/* We use largest len for spacing */
|
||
|
if(dividend_size > divisor_size) {
|
||
|
spacing = dividend_size;
|
||
|
} else {
|
||
|
spacing = divisor_size;
|
||
|
}
|
||
|
spacing += 2 + spacing % 2;
|
||
|
|
||
|
/* Check for the arguments. */
|
||
|
ASSERT(NULL != dividend);
|
||
|
ASSERT(NULL != divisor);
|
||
|
ASSERT(NULL != result_vector);
|
||
|
|
||
|
/* Make sure no operation is in progress. */
|
||
|
if((REG(PKA_FUNCTION) & PKA_FUNCTION_RUN) != 0) {
|
||
|
return PKA_STATUS_OPERATION_INPRG;
|
||
|
}
|
||
|
|
||
|
/* Update the A ptr with the offset address of the PKA RAM location
|
||
|
* where the multiplicand will be stored. */
|
||
|
offset = 0;
|
||
|
REG(PKA_APTR) = offset >> 2;
|
||
|
|
||
|
/* Load the multiplicand in PKA RAM. */
|
||
|
for(i = 0; i < dividend_size; i++) {
|
||
|
REG(PKA_RAM_BASE + offset + 4 * i) = *dividend;
|
||
|
dividend++;
|
||
|
}
|
||
|
|
||
|
/* Determine the offset for the next data. */
|
||
|
offset += 4 * spacing;
|
||
|
|
||
|
/* Update the B ptr with the offset address of the PKA RAM location
|
||
|
* where the multiplier will be stored. */
|
||
|
REG(PKA_BPTR) = offset >> 2;
|
||
|
|
||
|
/* Load the multiplier in PKA RAM. */
|
||
|
for(i = 0; i < divisor_size; i++) {
|
||
|
REG(PKA_RAM_BASE + offset + 4 * i) = *divisor;
|
||
|
divisor++;
|
||
|
}
|
||
|
|
||
|
/* Determine the offset for the reminder. */
|
||
|
offset += 4 * spacing;
|
||
|
|
||
|
/* Load C ptr with the result location in PKA RAM. */
|
||
|
REG(PKA_CPTR) = offset >> 2;
|
||
|
|
||
|
/* Determine the offset for the quotient. */
|
||
|
offset += 4 * spacing;
|
||
|
|
||
|
/* Copy the quotient vector address location. */
|
||
|
*result_vector = PKA_RAM_BASE + offset;
|
||
|
|
||
|
/* Load D ptr with the result location in PKA RAM. */
|
||
|
REG(PKA_DPTR) = offset >> 2;
|
||
|
|
||
|
/* Load the respective length registers. */
|
||
|
REG(PKA_ALENGTH) = dividend_size;
|
||
|
REG(PKA_BLENGTH) = divisor_size;
|
||
|
|
||
|
/* Set the PKA function to the multiplication and start it. */
|
||
|
REG(PKA_FUNCTION) = (PKA_FUNCTION_RUN | PKA_FUNCTION_DIVIDE);
|
||
|
|
||
|
/* Enable Interrupt */
|
||
|
if(process != NULL) {
|
||
|
pka_register_process_notification(process);
|
||
|
nvic_interrupt_unpend(NVIC_INT_PKA);
|
||
|
nvic_interrupt_enable(NVIC_INT_PKA);
|
||
|
}
|
||
|
|
||
|
return PKA_STATUS_SUCCESS;
|
||
|
}
|
||
|
/*---------------------------------------------------------------------------*/
|
||
|
uint8_t
|
||
|
bignum_divide_get_result(uint32_t *buffer,
|
||
|
uint32_t *buffer_size,
|
||
|
const uint32_t result_vector)
|
||
|
{
|
||
|
|
||
|
uint32_t regMSWVal;
|
||
|
uint32_t len;
|
||
|
int i;
|
||
|
|
||
|
/* Check for arguments. */
|
||
|
ASSERT(NULL != buffer);
|
||
|
ASSERT(NULL != buffer_size);
|
||
|
ASSERT(result_vector > PKA_RAM_BASE);
|
||
|
ASSERT(result_vector < (PKA_RAM_BASE + PKA_RAM_SIZE));
|
||
|
|
||
|
/* Verify that the operation is complete. */
|
||
|
if((REG(PKA_FUNCTION) & PKA_FUNCTION_RUN) != 0) {
|
||
|
return PKA_STATUS_OPERATION_INPRG;
|
||
|
}
|
||
|
|
||
|
/* Disable Interrupt */
|
||
|
nvic_interrupt_disable(NVIC_INT_PKA);
|
||
|
pka_register_process_notification(NULL);
|
||
|
|
||
|
/* Get the MSW register value. */
|
||
|
regMSWVal = REG(PKA_MSW);
|
||
|
|
||
|
/* Check to make sure that the result vector is not all zeroes. */
|
||
|
if(regMSWVal & PKA_MSW_RESULT_IS_ZERO) {
|
||
|
return PKA_STATUS_RESULT_0;
|
||
|
}
|
||
|
|
||
|
/* Get the length of the result. */
|
||
|
len = ((regMSWVal & PKA_MSW_MSW_ADDRESS_M) + 1)
|
||
|
- ((result_vector - PKA_RAM_BASE) >> 2);
|
||
|
|
||
|
/* Make sure that the length of the supplied result buffer is adequate
|
||
|
* to store the resultant. */
|
||
|
if(*buffer_size < len) {
|
||
|
return PKA_STATUS_BUF_UNDERFLOW;
|
||
|
}
|
||
|
|
||
|
/* Copy the resultant length. */
|
||
|
*buffer_size = len;
|
||
|
|
||
|
/* Copy the result from vector C into the pResult. */
|
||
|
for(i = 0; i < *buffer_size; i++) {
|
||
|
buffer[i] = REG(result_vector + 4 * i);
|
||
|
}
|
||
|
|
||
|
return PKA_STATUS_SUCCESS;
|
||
|
}
|
||
|
/** @} */
|
||
|
|