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CC2420: CC2420_WRITE_RAM with parameterizable ordering + resulting
simplifications
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b89d37d301
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@ -44,20 +44,6 @@
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#define KEYLEN 16
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#define MAX_DATALEN 16
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#define CC2420_WRITE_RAM_REV(buffer,adr,count) \
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do { \
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uint8_t i; \
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CC2420_SPI_ENABLE(); \
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SPI_WRITE_FAST(0x80 | (adr & 0x7f)); \
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SPI_WRITE_FAST((adr >> 1) & 0xc0); \
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for(i = (count); i > 0; i--) { \
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SPI_WRITE_FAST(((uint8_t*)(buffer))[i - 1]); \
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} \
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SPI_WAITFORTx_ENDED(); \
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CC2420_SPI_DISABLE(); \
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} while(0)
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#define MIN(a,b) ((a) < (b)? (a): (b))
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/*---------------------------------------------------------------------------*/
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@ -66,10 +52,10 @@ cc2420_aes_set_key(const uint8_t *key, int index)
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{
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switch(index) {
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case 0:
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CC2420_WRITE_RAM_REV(key, CC2420RAM_KEY0, KEYLEN);
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CC2420_WRITE_RAM(key, CC2420RAM_KEY0, KEYLEN, CC2420_WRITE_RAM_REVERSE);
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break;
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case 1:
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CC2420_WRITE_RAM_REV(key, CC2420RAM_KEY1, KEYLEN);
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CC2420_WRITE_RAM(key, CC2420RAM_KEY1, KEYLEN, CC2420_WRITE_RAM_REVERSE);
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break;
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}
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}
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@ -82,7 +68,7 @@ cipher16(uint8_t *data, int len)
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len = MIN(len, MAX_DATALEN);
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CC2420_WRITE_RAM(data, CC2420RAM_SABUF, len);
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CC2420_WRITE_RAM(data, CC2420RAM_SABUF, len, CC2420_WRITE_RAM_IN_ORDER);
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CC2420_STROBE(CC2420_SAES);
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/* Wait for the encryption to finish */
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do {
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@ -300,9 +300,12 @@ read_ram(uint8_t *buffer, uint16_t adr, uint16_t count)
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}
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/*---------------------------------------------------------------------------*/
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static void
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write_ram(uint8_t *buffer, uint16_t adr, uint16_t count)
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write_ram(const uint8_t *buffer,
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uint16_t adr,
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uint16_t count,
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enum cc2420_write_ram_order order)
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{
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CC2420_WRITE_RAM(buffer, adr, count);
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CC2420_WRITE_RAM(buffer, adr, count, order);
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}
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/*---------------------------------------------------------------------------*/
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static void
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@ -541,7 +544,7 @@ cc2420_transmit(unsigned short payload_len)
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if(packetbuf_attr(PACKETBUF_ATTR_PACKET_TYPE) ==
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PACKETBUF_ATTR_PACKET_TYPE_TIMESTAMP) {
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/* Write timestamp to last two bytes of packet in TXFIFO. */
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write_ram((uint8_t *) &sfd_timestamp, CC2420RAM_TXFIFO + payload_len - 1, 2);
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write_ram((uint8_t *) &sfd_timestamp, CC2420RAM_TXFIFO + payload_len - 1, 2, CC2420_WRITE_RAM_IN_ORDER);
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}
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}
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@ -719,9 +722,6 @@ cc2420_set_pan_addr(unsigned pan,
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unsigned addr,
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const uint8_t *ieee_addr)
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{
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uint16_t f = 0;
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uint8_t tmp[2];
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GET_LOCK();
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/*
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@ -729,20 +729,11 @@ cc2420_set_pan_addr(unsigned pan,
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*/
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wait_for_status(BV(CC2420_XOSC16M_STABLE));
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tmp[0] = pan & 0xff;
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tmp[1] = pan >> 8;
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write_ram((uint8_t *) &tmp, CC2420RAM_PANID, 2);
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tmp[0] = addr & 0xff;
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tmp[1] = addr >> 8;
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write_ram((uint8_t *) &tmp, CC2420RAM_SHORTADDR, 2);
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write_ram((uint8_t *) &pan, CC2420RAM_PANID, 2, CC2420_WRITE_RAM_IN_ORDER);
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write_ram((uint8_t *) &addr, CC2420RAM_SHORTADDR, 2, CC2420_WRITE_RAM_IN_ORDER);
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if(ieee_addr != NULL) {
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uint8_t tmp_addr[8];
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/* LSB first, MSB last for 802.15.4 addresses in CC2420 */
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for (f = 0; f < 8; f++) {
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tmp_addr[7 - f] = ieee_addr[f];
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}
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write_ram(tmp_addr, CC2420RAM_IEEEADDR, 8);
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write_ram(ieee_addr, CC2420RAM_IEEEADDR, 8, CC2420_WRITE_RAM_REVERSE);
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}
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RELEASE_LOCK();
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}
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@ -163,15 +163,28 @@ void cc2420_set_cca_threshold(int value);
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CC2420_SPI_DISABLE(); \
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} while(0)
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enum cc2420_write_ram_order {
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/* Begin with writing the first given byte */
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CC2420_WRITE_RAM_IN_ORDER,
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/* Begin with writing the last given byte */
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CC2420_WRITE_RAM_REVERSE
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};
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/* Write to RAM in the CC2420 */
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#define CC2420_WRITE_RAM(buffer,adr,count) \
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#define CC2420_WRITE_RAM(buffer,adr,count,order) \
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do { \
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uint8_t i; \
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CC2420_SPI_ENABLE(); \
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SPI_WRITE_FAST(0x80 | ((adr) & 0x7f)); \
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SPI_WRITE_FAST(((adr) >> 1) & 0xc0); \
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for(i = 0; i < (count); i++) { \
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SPI_WRITE_FAST(((uint8_t*)(buffer))[i]); \
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if(order == CC2420_WRITE_RAM_IN_ORDER) { \
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for(i = 0; i < (count); i++) { \
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SPI_WRITE_FAST(((uint8_t*)(buffer))[i]); \
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} \
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} else { \
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for(i = (count); i > 0; i--) { \
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SPI_WRITE_FAST(((uint8_t*)(buffer))[i - 1]); \
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} \
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} \
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SPI_WAITFORTx_ENDED(); \
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CC2420_SPI_DISABLE(); \
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