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initial commit of src files
This commit is contained in:
maralvira
parent
bf9f960bbe
commit
285f508cc9
72
cpu/mc1322x/src/default_lowlevel.c
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72
cpu/mc1322x/src/default_lowlevel.c
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@ -0,0 +1,72 @@
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/*
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* Copyright (c) 2010, Mariano Alvira <mar@devl.org> and other contributors
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* to the MC1322x project (http://mc1322x.devl.org)
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Institute nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* This file is part of libmc1322x: see http://mc1322x.devl.org
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* for details.
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*
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* $Id: default_lowlevel.c,v 1.1 2010/06/10 14:49:31 maralvira Exp $
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*/
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#include <mc1322x.h>
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#include <types.h>
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void default_vreg_init(void) {
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volatile uint32_t i;
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*CRM_SYS_CNTL = 0x00000018; /* set default state */
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*CRM_VREG_CNTL = 0x00000f04; /* bypass the buck */
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for(i=0; i<0x161a8; i++) { continue; } /* wait for the bypass to take */
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// while((((*(volatile uint32_t *)(0x80003018))>>17) & 1) !=1) { continue; } /* wait for the bypass to take */
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*CRM_VREG_CNTL = 0x00000ff8; /* start the regulators */
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}
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void uart1_init(uint16_t inc, uint16_t mod, uint8_t samp) {
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/* UART must be disabled to set the baudrate */
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*UART1_UCON = 0;
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*UART1_UBRCNT = ( inc << 16 ) | mod;
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/* see Section 11.5.1.2 Alternate Modes */
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/* you must enable the peripheral first BEFORE setting the function in GPIO_FUNC_SEL */
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/* From the datasheet: "The peripheral function will control operation of the pad IF */
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/* THE PERIPHERAL IS ENABLED. */
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*UART1_UCON = (1 << 0) | (1 << 1); /* enable receive, transmit */
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if(samp == UCON_SAMP_16X)
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set_bit(*UART1_UCON,UCON_SAMP);
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*GPIO_FUNC_SEL0 = ( (0x01 << (14*2)) | (0x01 << (15*2)) ); /* set GPIO15-14 to UART (UART1 TX and RX)*/
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/* interrupt when there are this number or more bytes free in the TX buffer*/
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*UART1_UTXCON = 16;
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u1_head = 0; u1_tail = 0;
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/* tx and rx interrupts are enabled in the UART by default */
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/* see status register bits 13 and 14 */
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/* enable UART1 interrupts in the interrupt controller */
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enable_irq(UART1);
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}
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45
cpu/mc1322x/src/default_lowlevel.h
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45
cpu/mc1322x/src/default_lowlevel.h
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/*
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* Copyright (c) 2010, Mariano Alvira <mar@devl.org> and other contributors
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* to the MC1322x project (http://mc1322x.devl.org)
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Institute nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* This file is part of libmc1322x: see http://mc1322x.devl.org
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* for details.
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*
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* $Id: default_lowlevel.h,v 1.1 2010/06/10 14:49:31 maralvira Exp $
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*/
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#ifndef LOWLEVEL_H
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#define LOWLEVEL_H
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#include "types.h"
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#define trim_xtal() pack_XTAL_CNTL(CTUNE_4PF, CTUNE, FTUNE, IBIAS)
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void default_vreg_init(void);
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void uart1_init(uint16_t inc, uint16_t mod, uint8_t samp);
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#endif
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74
cpu/mc1322x/src/isr.c
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74
cpu/mc1322x/src/isr.c
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/*
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* Copyright (c) 2010, Mariano Alvira <mar@devl.org> and other contributors
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* to the MC1322x project (http://mc1322x.devl.org)
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Institute nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* This file is part of libmc1322x: see http://mc1322x.devl.org
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* for details.
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*
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* $Id: isr.c,v 1.1 2010/06/10 14:49:31 maralvira Exp $
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*/
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#include <mc1322x.h>
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#include <types.h>
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__attribute__ ((section (".irq")))
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__attribute__ ((interrupt("IRQ")))
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void irq(void)
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{
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uint32_t pending;
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while ((pending = *NIPEND)) {
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if(bit_is_set(pending, INT_NUM_TMR)) {
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/* dispatch to individual timer isrs if they exist */
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/* timer isrs are responsible for determining if they
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* caused an interrupt */
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/* and clearing their own interrupt flags */
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if(tmr0_isr != 0) { tmr0_isr(); }
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if(tmr1_isr != 0) { tmr1_isr(); }
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if(tmr2_isr != 0) { tmr2_isr(); }
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if(tmr3_isr != 0) { tmr3_isr(); }
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}
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if(bit_is_set(pending, INT_NUM_MACA)) {
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if(maca_isr != 0) { maca_isr(); }
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}
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if(bit_is_set(pending, INT_NUM_UART1)) {
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if(uart1_isr != 0) { uart1_isr(); }
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}
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if(bit_is_set(pending, INT_NUM_CRM)) {
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if(rtc_wu_evt() && (rtc_isr != 0)) { rtc_isr(); }
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if(kbi_evnt(4) && (kbi4_isr != 0)) { kbi4_isr(); }
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if(kbi_evnt(5) && (kbi5_isr != 0)) { kbi5_isr(); }
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if(kbi_evnt(6) && (kbi6_isr != 0)) { kbi6_isr(); }
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if(kbi_evnt(7) && (kbi7_isr != 0)) { kbi7_isr(); }
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}
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*INTFRC = 0; /* stop forcing interrupts */
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}
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}
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182
cpu/mc1322x/src/start.S
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182
cpu/mc1322x/src/start.S
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@ -0,0 +1,182 @@
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/*
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* Copyright (c) 2010, Mariano Alvira <mar@devl.org> and other contributors
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* to the MC1322x project (http://mc1322x.devl.org) and Contiki.
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
|
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* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
|
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Institute nor the names of its contributors
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* may be used to endorse or promote products derived from this software
|
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* This file is part of the Contiki OS.
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*
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* $Id: start.S,v 1.1 2010/06/10 14:49:31 maralvira Exp $
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*/
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/*
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The following lincence is for all parts of this code done by
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Martin Thomas. Code from others used here may have other license terms.
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Copyright (C) 2004 Martin THOMAS
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Permission is hereby granted, free of charge, to any person obtaining a copy of
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this software and associated documentation files (the "Software"), to deal in
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the Software without restriction, including without limitation the rights to
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use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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the Software, and to permit persons to whom the Software is furnished to do so,
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subject to the following conditions:
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! The above copyright notice and this permission notice shall be included in all
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! copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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.global main // int main(void)
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.global _etext // -> .data initial values in ROM
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.global _data // -> .data area in RAM
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.global _edata // end of .data area
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.global __bss_start // -> .bss area in RAM
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.global __bss_end__ // end of .bss area
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.global _stack // top of stack
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// Stack Sizes
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.set UND_STACK_SIZE, 0x00000004
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.set ABT_STACK_SIZE, 0x00000004
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.set FIQ_STACK_SIZE, 0x00000004
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.set IRQ_STACK_SIZE, 0X00000080
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.set SVC_STACK_SIZE, 0x00000004
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// Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs
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.set MODE_USR, 0x10 // User Mode
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.set MODE_FIQ, 0x11 // FIQ Mode
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.set MODE_IRQ, 0x12 // IRQ Mode
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.set MODE_SVC, 0x13 // Supervisor Mode
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.set MODE_ABT, 0x17 // Abort Mode
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.set MODE_UND, 0x1B // Undefined Mode
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.set MODE_SYS, 0x1F // System Mode
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.equ I_BIT, 0x80 // when I bit is set, IRQ is disabled
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.equ F_BIT, 0x40 // when F bit is set, FIQ is disabled
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.text
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.code 32
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.align 2
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.set _rom_data_init, 0x108d0
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.global _start
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.func _start
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_start:
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b _begin // reset - _start
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ldr pc,_undf // undefined
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ldr pc,_swi // SWI
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ldr pc,_pabt // program abort
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ldr pc,_dabt // data abort
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nop // reserved
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ldr pc,_irq // IRQ
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ldr pc,_fiq // FIQ
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/* these vectors are used for rom patching */
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.org 0x20
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.code 16
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_RPTV_0_START:
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bx lr /* do nothing */
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.org 0x60
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_RPTV_1_START:
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bx lr /* do nothing */
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.org 0xa0
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_RPTV_2_START:
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bx lr /* do nothing */
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.org 0xe0
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_RPTV_3_START:
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bx lr /* do nothing */
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.org 0x120
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ROM_var_start: .word 0
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.org 0x7ff
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ROM_var_end: .word 0
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.code 32
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.align
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_begin:
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/* FIQ mode stack */
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msr CPSR_c, #(MODE_FIQ | I_BIT | F_BIT)
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ldr sp, =__fiq_stack_top__ /* set the FIQ stack pointer */
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/* IRQ mode stack */
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msr CPSR_c, #(MODE_IRQ | I_BIT | F_BIT)
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ldr sp, =__irq_stack_top__ /* set the IRQ stack pointer */
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/* Supervisor mode stack */
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msr CPSR_c, #(MODE_SVC | I_BIT | F_BIT)
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ldr sp, =__svc_stack_top__ /* set the SVC stack pointer */
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/* Undefined mode stack */
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msr CPSR_c, #(MODE_UND | I_BIT | F_BIT)
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ldr sp, =__und_stack_top__ /* set the UND stack pointer */
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/* Abort mode stack */
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msr CPSR_c, #(MODE_ABT | I_BIT | F_BIT)
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ldr sp, =__abt_stack_top__ /* set the ABT stack pointer */
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/* System mode stack */
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msr CPSR_c, #(MODE_SYS | I_BIT | F_BIT)
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ldr sp, =__sys_stack_top__ /* set the SYS stack pointer */
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/* call the rom_data_init function in ROM */
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/* initializes ROM_var space defined by ROM_var_start and ROM_var_end */
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/* this area is used by ROM functions (e.g. nvm_read) */
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ldr r12,=_rom_data_init
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mov lr,pc
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bx r12
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msr CPSR_c, #(MODE_SYS)
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b main
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_undf: .word __undf // undefined
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_swi: .word __swi // SWI
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_pabt: .word __pabt // program abort
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_dabt: .word __dabt // data abort
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_irq: .word irq // IRQ
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_fiq: .word __fiq // FIQ
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__undf: b . // undefined
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__swi: b . // SWI
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__pabt: b . // program abort
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__dabt: b . // data abort
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/* IRQ handler set in isr.c */
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//__irq: b . // IRQ
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__fiq: b . // FIQ
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