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Make sure SSI0 is powered and clocked before accessing it
* Fail all SSI0 operations if the module is not powered and clocked * Make sure SERIAL is powered before trying to enable run mode clock
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parent
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commit
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@ -40,12 +40,35 @@
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#include "ti-lib.h"
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#include "board-spi.h"
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#include "board.h"
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#include <stdbool.h>
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/*---------------------------------------------------------------------------*/
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#define CPU_FREQ 48000000ul
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/*---------------------------------------------------------------------------*/
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static bool
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accessible(void)
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{
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/* First, check the PD */
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if(ti_lib_prcm_power_domain_status(PRCM_DOMAIN_SERIAL)
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!= PRCM_DOMAIN_POWER_ON) {
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return false;
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}
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/* Then check the 'run mode' clock gate */
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if(!(HWREG(PRCM_BASE + PRCM_O_SSICLKGR) & PRCM_SSICLKGR_CLK_EN_SSI0)) {
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return false;
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}
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return true;
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}
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/*---------------------------------------------------------------------------*/
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int
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board_spi_write(const uint8_t *buf, size_t len)
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{
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if(accessible() == false) {
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return 0;
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}
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while(len > 0) {
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uint32_t ul;
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@ -61,6 +84,10 @@ board_spi_write(const uint8_t *buf, size_t len)
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int
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board_spi_read(uint8_t *buf, size_t len)
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{
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if(accessible() == false) {
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return 0;
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}
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while(len > 0) {
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uint32_t ul;
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@ -79,6 +106,10 @@ board_spi_read(uint8_t *buf, size_t len)
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void
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board_spi_flush()
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{
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if(accessible() == false) {
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return;
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}
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uint32_t ul;
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while(ti_lib_rom_ssi_data_get_non_blocking(SSI0_BASE, &ul));
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}
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@ -88,7 +119,12 @@ board_spi_open(uint32_t bit_rate, uint32_t clk_pin)
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{
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uint32_t buf;
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/* SPI power */
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/* First, make sure the SERIAL PD is on */
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ti_lib_prcm_power_domain_on(PRCM_DOMAIN_SERIAL);
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while((ti_lib_prcm_power_domain_status(PRCM_DOMAIN_SERIAL)
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!= PRCM_DOMAIN_POWER_ON));
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/* Enable clock in active mode */
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ti_lib_rom_prcm_peripheral_run_enable(PRCM_PERIPH_SSI0);
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ti_lib_prcm_load_set();
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while(!ti_lib_prcm_load_get());
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