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Code style fixes: cc2430
This commit is contained in:
parent
b4bb51e811
commit
874bec26a5
@ -44,7 +44,7 @@
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/*---------------------------------------------------------------------------*/
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void
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bus_init (void)
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bus_init(void)
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{
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CLKCON = (0x00 | OSC32K); /* 32k internal */
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while(CLKCON != (0x00 | OSC32K));
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@ -263,7 +263,7 @@ cc2430_rf_set_addr(unsigned pan, unsigned addr, const uint8_t *ieee_addr)
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if(ieee_addr != NULL) {
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ptr = &IEEE_ADDR7;
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/* LSB first, MSB last for 802.15.4 addresses in CC2420 */
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for (f = 0; f < 8; f++) {
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for(f = 0; f < 8; f++) {
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*ptr-- = ieee_addr[f];
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}
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}
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@ -396,10 +396,10 @@ prepare(const void *payload, unsigned short payload_len)
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PRINTF("cc2430_rf: data = ");
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/* Send the phy length byte first */
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RFD = payload_len + CHECKSUM_LEN; /* Payload plus FCS */
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PRINTF("(%d)", payload_len+CHECKSUM_LEN);
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PRINTF("(%d)", payload_len + CHECKSUM_LEN);
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for(i = 0; i < payload_len; i++) {
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RFD = ((unsigned char*) (payload))[i];
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PRINTF("%02X", ((unsigned char*)(payload))[i]);
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RFD = ((unsigned char *)(payload))[i];
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PRINTF("%02X", ((unsigned char *)(payload))[i]);
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}
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PRINTF("\n");
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@ -460,7 +460,7 @@ transmit(unsigned short transmit_len)
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ENERGEST_OFF(ENERGEST_TYPE_TRANSMIT);
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ENERGEST_ON(ENERGEST_TYPE_LISTEN);
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if(rf_flags & WAS_OFF){
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if(rf_flags & WAS_OFF) {
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off();
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}
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@ -510,7 +510,7 @@ read(void *buf, unsigned short bufsize)
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}
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if(len <= CC2430_MIN_PACKET_LEN) {
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PRINTF("error: too short\n");
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PRINTF("error: too short\n");
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RIMESTATS_ADD(tooshort);
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flush_rx();
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@ -518,7 +518,7 @@ read(void *buf, unsigned short bufsize)
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}
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if(len - CHECKSUM_LEN > bufsize) {
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PRINTF("error: too long\n");
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PRINTF("error: too long\n");
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RIMESTATS_ADD(toolong);
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flush_rx();
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@ -538,11 +538,11 @@ read(void *buf, unsigned short bufsize)
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PRINTF("(%d)", len);
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len -= CHECKSUM_LEN;
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for(i = 0; i < len; ++i) {
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((unsigned char*)(buf))[i] = RFD;
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((unsigned char *)(buf))[i] = RFD;
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#if CC2430_RF_CONF_HEXDUMP
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uart1_writeb(((unsigned char*)(buf))[i]);
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uart1_writeb(((unsigned char *)(buf))[i]);
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#endif
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PRINTF("%02X", ((unsigned char*)(buf))[i]);
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PRINTF("%02X", ((unsigned char *)(buf))[i]);
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}
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PRINTF("\n");
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@ -570,17 +570,17 @@ read(void *buf, unsigned short bufsize)
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RIMESTATS_ADD(badcrc);
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flush_rx();
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return 0;
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}
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}
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/* If FIFOP==1 and FIFO==0 then we had a FIFO overflow at some point. */
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if((RFSTATUS & (FIFO | FIFOP)) == FIFOP) {
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/*
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* If we reach here means that there might be more intact packets in the
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* FIFO despite the overflow. This can happen with bursts of small packets.
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*
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*
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* Only flush if the FIFO is actually empty. If not, then next pass we will
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* pick up one more packet or flush due to an error.
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*/
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*/
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if(!RXFIFOCNT) {
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flush_rx();
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}
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@ -646,14 +646,14 @@ on(void)
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RSSIH = 0xd2; /* -84dbm = 0xd2 default, 0xe0 -70 dbm */
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RFPWR &= ~RREG_RADIO_PD; /* make sure it's powered */
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while ((RFIF & IRQ_RREG_ON) == 0); /* wait for power up */
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while((RFIF & IRQ_RREG_ON) == 0); /* wait for power up */
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/* Make sure the RREG On Interrupt Flag is 0 next time we get called */
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RFIF &= ~IRQ_RREG_ON;
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cc2430_rf_command(ISRXON);
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cc2430_rf_command(ISFLUSHRX);
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while (RTIMER_CLOCK_LT(RTIMER_NOW(), t0 + ONOFF_TIME));
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while(RTIMER_CLOCK_LT(RTIMER_NOW(), t0 + ONOFF_TIME));
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}
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PRINTF("cc2430_rf_rx_enable done\n");
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@ -686,18 +686,17 @@ off(void)
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return 1;
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}
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/*---------------------------------------------------------------------------*/
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const struct radio_driver cc2430_rf_driver =
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{
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init,
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prepare,
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transmit,
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send,
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read,
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channel_clear,
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receiving_packet,
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pending_packet,
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on,
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off,
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const struct radio_driver cc2430_rf_driver = {
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init,
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prepare,
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transmit,
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send,
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read,
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channel_clear,
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receiving_packet,
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pending_packet,
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on,
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off,
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};
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/*---------------------------------------------------------------------------*/
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#if !NETSTACK_CONF_SHORTCUTS
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@ -16,15 +16,14 @@
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#endif
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/* Constants */
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typedef enum rf_address_mode_t
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{
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RF_DECODER_NONE = 0,
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RF_DECODER_COORDINATOR,
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RF_SOFTACK_MONITOR,
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RF_MONITOR,
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RF_SOFTACK_CLIENT,
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RF_DECODER_ON
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}rf_address_mode_t;
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typedef enum rf_address_mode_t {
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RF_DECODER_NONE = 0,
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RF_DECODER_COORDINATOR,
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RF_SOFTACK_MONITOR,
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RF_MONITOR,
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RF_SOFTACK_CLIENT,
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RF_DECODER_ON
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} rf_address_mode_t;
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/*CSP command set*/
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#define SSTOP 0xDF
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@ -79,10 +78,10 @@ uint8_t cc2430_rf_power_set(uint8_t new_power);
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void cc2430_rf_set_addr(unsigned pan, unsigned addr, const uint8_t *ieee_addr);
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#if !NETSTACK_CONF_SHORTCUTS
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extern void cc2430_rf_ISR( void ) __interrupt (RF_VECTOR);
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extern void cc2430_rf_ISR(void) __interrupt(RF_VECTOR);
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#endif
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#if CC2430_RFERR_INTERRUPT
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extern void cc2430_rf_error_ISR( void ) __interrupt (RFERR_VECTOR);
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extern void cc2430_rf_error_ISR(void) __interrupt(RFERR_VECTOR);
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#endif
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#ifdef HAVE_RF_DMA
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@ -61,7 +61,7 @@ PROCESS_NAME(cc2430_rf_process);
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#pragma exclude bits
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#endif
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void
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cc2430_rf_ISR( void ) __interrupt (RF_VECTOR)
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cc2430_rf_ISR(void) __interrupt(RF_VECTOR)
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{
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EA = 0;
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ENERGEST_ON(ENERGEST_TYPE_IRQ);
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@ -70,9 +70,9 @@ cc2430_rf_ISR( void ) __interrupt (RF_VECTOR)
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* Just double check the flag.
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*/
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if(RFIF & IRQ_FIFOP) {
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RF_RX_LED_ON();
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/* Poll the RF process which calls cc2430_rf_read() */
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process_poll(&cc2430_rf_process);
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RF_RX_LED_ON();
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/* Poll the RF process which calls cc2430_rf_read() */
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process_poll(&cc2430_rf_process);
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}
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S1CON &= ~(RFIF_0 | RFIF_1);
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@ -92,7 +92,7 @@ cc2430_rf_ISR( void ) __interrupt (RF_VECTOR)
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#pragma exclude bits
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#endif
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void
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cc2430_rf_error_ISR( void ) __interrupt (RFERR_VECTOR)
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cc2430_rf_error_ISR(void) __interrupt(RFERR_VECTOR)
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{
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EA = 0;
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TCON_RFERRIF = 0;
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@ -98,14 +98,14 @@ clock_init(void)
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CLKCON = OSC32K | TICKSPD2 | TICKSPD1; /* tickspeed 500 kHz for timers[1-4] */
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/* Initialize tick value */
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timer_value = ST0; /* ST low bits [7:0] */
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timer_value += ((unsigned long int) ST1) << 8; /* middle bits [15:8] */
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timer_value += ((unsigned long int) ST2) << 16; /* high bits [23:16] */
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timer_value += TICK_VAL; /* Init value 256 */
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ST2 = (unsigned char) (timer_value >> 16);
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ST1 = (unsigned char) (timer_value >> 8);
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ST0 = (unsigned char) timer_value;
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timer_value = ST0; /* ST low bits [7:0] */
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timer_value += ((unsigned long int)ST1) << 8; /* middle bits [15:8] */
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timer_value += ((unsigned long int)ST2) << 16; /* high bits [23:16] */
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timer_value += TICK_VAL; /* Init value 256 */
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ST2 = (unsigned char)(timer_value >> 16);
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ST1 = (unsigned char)(timer_value >> 8);
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ST0 = (unsigned char)timer_value;
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IEN0_STIE = 1; /* IEN0.STIE acknowledge Sleep Timer Interrupt */
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}
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/*---------------------------------------------------------------------------*/
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@ -131,15 +131,15 @@ clock_ISR(void) __interrupt(ST_VECTOR)
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* Next interrupt occurs after the current time + TICK_VAL
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*/
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timer_value = ST0;
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timer_value += ((unsigned long int) ST1) << 8;
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timer_value += ((unsigned long int) ST2) << 16;
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timer_value += ((unsigned long int)ST1) << 8;
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timer_value += ((unsigned long int)ST2) << 16;
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timer_value += TICK_VAL;
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ST2 = (unsigned char) (timer_value >> 16);
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ST1 = (unsigned char) (timer_value >> 8);
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ST0 = (unsigned char) timer_value;
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ST2 = (unsigned char)(timer_value >> 16);
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ST1 = (unsigned char)(timer_value >> 8);
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ST0 = (unsigned char)timer_value;
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++count;
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/* Make sure the CLOCK_CONF_SECOND is a power of two, to ensure
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that the modulo operation below becomes a logical and and not
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an expensive divide. Algorithm from Wikipedia:
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@ -160,7 +160,7 @@ clock_ISR(void) __interrupt(ST_VECTOR)
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etimer_request_poll();
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}
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#endif
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IRCON_STIF = 0;
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ENERGEST_OFF(ENERGEST_TYPE_IRQ);
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ENABLE_INTERRUPTS();
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@ -16,7 +16,7 @@
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#if DMA_ON
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struct dma_config dma_conf[DMA_CHANNEL_COUNT]; /* DMA Descriptors */
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struct process * dma_callback[DMA_CHANNEL_COUNT];
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struct process *dma_callback[DMA_CHANNEL_COUNT];
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/*---------------------------------------------------------------------------*/
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void
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dma_init(void)
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@ -30,7 +30,7 @@ dma_init(void)
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}
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/* The address of the descriptor for Channel 0 is configured separately */
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tmp_ptr = (uint16_t) &(dma_conf[0]);
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tmp_ptr = (uint16_t)&(dma_conf[0]);
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DMA0CFGH = tmp_ptr >> 8;
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DMA0CFGL = tmp_ptr;
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@ -40,7 +40,7 @@ dma_init(void)
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* derived by the SoC
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*/
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#if (DMA_CHANNEL_COUNT > 1)
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tmp_ptr = (uint16_t) &(dma_conf[1]);
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tmp_ptr = (uint16_t)&(dma_conf[1]);
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DMA1CFGH = tmp_ptr >> 8;
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DMA1CFGL = tmp_ptr;
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#endif
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@ -53,7 +53,7 @@ dma_init(void)
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* completes, the ISR will poll this process.
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*/
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void
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dma_associate_process(struct process * p, uint8_t c)
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dma_associate_process(struct process *p, uint8_t c)
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{
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if((!c) || (c >= DMA_CHANNEL_COUNT)) {
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return;
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@ -138,11 +138,11 @@ extern dma_config_t dma_conf[DMA_CHANNEL_COUNT];
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/* Functions Declarations */
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void dma_init(void);
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void dma_associate_process (struct process * p, uint8_t c);
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void dma_associate_process(struct process *p, uint8_t c);
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/* Only link the ISR when DMA_ON is .... on */
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#if DMA_ON
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void dma_ISR( void ) __interrupt (DMA_VECTOR);
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void dma_ISR(void) __interrupt(DMA_VECTOR);
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#endif
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#endif /*__DMA_H*/
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@ -16,7 +16,7 @@
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#include "cc2430_sfr.h"
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#if DMA_ON
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extern struct process * dma_callback[DMA_CHANNEL_COUNT];
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extern struct process *dma_callback[DMA_CHANNEL_COUNT];
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#endif
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/*---------------------------------------------------------------------------*/
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@ -37,17 +37,17 @@ extern void spi_rx_dma_callback(void);
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#pragma exclude bits
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#endif
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void
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dma_ISR(void) __interrupt (DMA_VECTOR)
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dma_ISR(void) __interrupt(DMA_VECTOR)
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{
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#if DMA_ON
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uint8_t i;
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#endif
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EA=0;
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EA = 0;
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IRCON_DMAIF = 0;
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#ifdef HAVE_RF_DMA
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if((DMAIRQ & 1) != 0) {
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DMAIRQ &= ~1;
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DMAARM=0x81;
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DMAARM = 0x81;
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rf_dma_callback_isr();
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}
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#endif
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@ -20,12 +20,12 @@
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void uart0_init();
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void uart0_writeb(uint8_t byte);
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void uart0_set_input(int (*input)(unsigned char c));
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void uart0_set_input(int (* input)(unsigned char c));
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void uart0_rx_ISR( void ) __interrupt (URX0_VECTOR);
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void uart0_tx_ISR( void ) __interrupt (UTX0_VECTOR);
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void uart0_rx_ISR(void) __interrupt(URX0_VECTOR);
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void uart0_tx_ISR(void) __interrupt(UTX0_VECTOR);
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/* Macro to turn on / off UART RX Interrupt */
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#define UART0_RX_INT(v) IEN0_URX0IE = v
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#define UART0_RX_INT(v) do { IEN0_URX0IE = v; } while(0)
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#endif
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#endif /* UART_0_H */
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@ -22,10 +22,10 @@ void uart1_writeb(uint8_t byte);
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void uart1_set_input(int (*input)(unsigned char c));
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#if UART_ONE_CONF_WITH_INPUT
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void uart1_rx_ISR( void ) __interrupt (URX1_VECTOR);
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void uart1_tx_ISR( void ) __interrupt (UTX1_VECTOR);
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void uart1_rx_ISR(void) __interrupt(URX1_VECTOR);
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void uart1_tx_ISR(void) __interrupt(UTX1_VECTOR);
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/* Macro to turn on / off UART RX Interrupt */
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#define UART1_RX_INT(v) IEN0_URX1IE = v
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#define UART1_RX_INT(v) do { IEN0_URX1IE = v; } while(0)
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#else
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#define UART1_RX_INT(v)
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#endif /* UART_ONE_CONF_WITH_INPUT */
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@ -21,16 +21,16 @@
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#include "sys/energest.h"
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#if UART_ZERO_ENABLE
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static int (*uart0_input_handler)(unsigned char c);
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static int (* uart0_input_handler)(unsigned char c);
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#endif
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#if UART_ONE_ENABLE
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static int (*uart1_input_handler)(unsigned char c);
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static int (* uart1_input_handler)(unsigned char c);
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#endif
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#if UART_ZERO_ENABLE
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/*---------------------------------------------------------------------------*/
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void
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uart0_set_input(int (*input)(unsigned char c))
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uart0_set_input(int (* input)(unsigned char c))
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{
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uart0_input_handler = input;
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}
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@ -41,7 +41,7 @@ uart0_set_input(int (*input)(unsigned char c))
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#pragma exclude bits
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#endif
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void
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uart0_rx_ISR(void) __interrupt (URX0_VECTOR)
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uart0_rx_ISR(void) __interrupt(URX0_VECTOR)
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{
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ENERGEST_ON(ENERGEST_TYPE_IRQ);
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TCON_URX0IF = 0;
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@ -52,7 +52,7 @@ uart0_rx_ISR(void) __interrupt (URX0_VECTOR)
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}
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/*---------------------------------------------------------------------------*/
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void
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uart0_tx_ISR( void ) __interrupt (UTX0_VECTOR)
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uart0_tx_ISR(void) __interrupt(UTX0_VECTOR)
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{
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}
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#pragma restore
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@ -60,7 +60,7 @@ uart0_tx_ISR( void ) __interrupt (UTX0_VECTOR)
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#if UART_ONE_ENABLE
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/*---------------------------------------------------------------------------*/
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void
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uart1_set_input(int (*input)(unsigned char c))
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uart1_set_input(int (* input)(unsigned char c))
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{
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uart1_input_handler = input;
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}
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@ -71,7 +71,7 @@ uart1_set_input(int (*input)(unsigned char c))
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#pragma exclude bits
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#endif
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void
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uart1_rx_ISR(void) __interrupt (URX1_VECTOR)
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uart1_rx_ISR(void) __interrupt(URX1_VECTOR)
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{
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ENERGEST_ON(ENERGEST_TYPE_IRQ);
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TCON_URX1IF = 0;
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@ -82,7 +82,7 @@ uart1_rx_ISR(void) __interrupt (URX1_VECTOR)
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}
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||||
/*---------------------------------------------------------------------------*/
|
||||
void
|
||||
uart1_tx_ISR( void ) __interrupt (UTX1_VECTOR)
|
||||
uart1_tx_ISR(void) __interrupt(UTX1_VECTOR)
|
||||
{
|
||||
}
|
||||
#pragma restore
|
||||
|
@ -52,7 +52,7 @@
|
||||
#pragma exclude bits
|
||||
#endif
|
||||
void
|
||||
cc4230_watchdog_ISR(void) __interrupt (WDT_VECTOR)
|
||||
cc4230_watchdog_ISR(void) __interrupt(WDT_VECTOR)
|
||||
{
|
||||
EA = 0;
|
||||
ENERGEST_ON(ENERGEST_TYPE_IRQ);
|
||||
|
@ -29,16 +29,16 @@
|
||||
*
|
||||
*/
|
||||
|
||||
/*
|
||||
* \file
|
||||
* Stub header file for cc2430 multi-threading. It doesn't do anything, it
|
||||
* just exists so that mt.c can compile cleanly.
|
||||
*
|
||||
* This is based on the original mtarch.h for z80 by Takahide Matsutsuka
|
||||
*
|
||||
* \author
|
||||
* George Oikonomou - <oikonomou@users.sourceforge.net>
|
||||
*/
|
||||
/*
|
||||
* \file
|
||||
* Stub header file for cc2430 multi-threading. It doesn't do anything, it
|
||||
* just exists so that mt.c can compile cleanly.
|
||||
*
|
||||
* This is based on the original mtarch.h for z80 by Takahide Matsutsuka
|
||||
*
|
||||
* \author
|
||||
* George Oikonomou - <oikonomou@users.sourceforge.net>
|
||||
*/
|
||||
#ifndef __MTARCH_H__
|
||||
#define __MTARCH_H__
|
||||
|
||||
@ -47,4 +47,3 @@ struct mtarch_thread {
|
||||
};
|
||||
|
||||
#endif /* __MTARCH_H__ */
|
||||
|
||||
|
@ -95,8 +95,8 @@ rtimer_arch_schedule(rtimer_clock_t t)
|
||||
PRINTF("rtimer_arch_schedule(%u)\n", t);
|
||||
|
||||
/* set the compare mode values so we can get an interrupt after t */
|
||||
T1CC1L = (unsigned char) t;
|
||||
T1CC1H = (unsigned char) (t >> 8);
|
||||
T1CC1L = (unsigned char)t;
|
||||
T1CC1H = (unsigned char)(t >> 8);
|
||||
PRINTF("T1CC1=%u, t=%u\n", (T1CC1L + (T1CC1H << 8)), t);
|
||||
|
||||
/* Turn on compare mode interrupt */
|
||||
@ -109,7 +109,7 @@ rtimer_arch_schedule(rtimer_clock_t t)
|
||||
#pragma exclude bits
|
||||
#endif
|
||||
void
|
||||
cc2430_timer_1_ISR(void) __interrupt (T1_VECTOR)
|
||||
cc2430_timer_1_ISR(void) __interrupt(T1_VECTOR)
|
||||
{
|
||||
IEN1_T1IE = 0; /* Ignore Timer 1 Interrupts */
|
||||
ENERGEST_ON(ENERGEST_TYPE_IRQ);
|
||||
|
@ -57,6 +57,6 @@
|
||||
|
||||
#define rtimer_arch_now() ((rtimer_clock_t)(T1CNTL + (T1CNTH << 8)))
|
||||
|
||||
void cc2430_timer_1_ISR(void) __interrupt (T1_VECTOR);
|
||||
void cc2430_timer_1_ISR(void) __interrupt(T1_VECTOR);
|
||||
|
||||
#endif /* __RTIMER_ARCH_H__ */
|
||||
|
@ -60,7 +60,7 @@ poison_loop:
|
||||
uint8_t
|
||||
stack_get_max(void)
|
||||
{
|
||||
__data uint8_t * sp = (__data uint8_t *) 0xff;
|
||||
__data uint8_t *sp = (__data uint8_t *)0xff;
|
||||
uint8_t free = 0;
|
||||
|
||||
while(*sp-- == STACK_POISON) {
|
||||
|
Loading…
Reference in New Issue
Block a user