From b134e35450f97a946650b7daeb67ea95ab130f29 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Beno=C3=AEt=20Th=C3=A9baudeau?= Date: Mon, 4 Nov 2013 18:39:52 +0100 Subject: [PATCH] cc2538: spi: Add format configuration options MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Benoît Thébaudeau --- cpu/cc2538/dev/spi.c | 24 +++++++++++++++++++++--- 1 file changed, 21 insertions(+), 3 deletions(-) diff --git a/cpu/cc2538/dev/spi.c b/cpu/cc2538/dev/spi.c index 77a02ceec..42cf76999 100644 --- a/cpu/cc2538/dev/spi.c +++ b/cpu/cc2538/dev/spi.c @@ -42,6 +42,21 @@ #include "dev/ssi.h" #include "dev/gpio.h" +/* Default: Motorola mode 3 with 8-bit data words */ +#ifndef SPI_CONF_PHASE +#define SPI_CONF_PHASE SSI_CR0_SPH +#endif +#ifndef SPI_CONF_POLARITY +#define SPI_CONF_POLARITY SSI_CR0_SPO +#endif +#ifndef SPI_CONF_DATA_SIZE +#define SPI_CONF_DATA_SIZE 8 +#endif + +#if SPI_CONF_DATA_SIZE < 4 || SPI_CONF_DATA_SIZE > 16 +#error SPI_CONF_DATA_SIZE must be set between 4 and 16 inclusive. +#endif + /** * \brief Initialize the SPI bus. * @@ -51,7 +66,10 @@ * CC2538_SPI_MISO_PORT_NUM CC2538_SPI_MISO_PIN_NUM * CC2538_SPI_SEL_PORT_NUM CC2538_SPI_SEL_PIN_NUM * - * This sets the SPI data width to 8 bits and the mode to Freescale mode 3. + * This sets the mode to Motorola SPI with the following format options: + * SPI_CONF_PHASE: 0 or SSI_CR0_SPH + * SPI_CONF_POLARITY: 0 or SSI_CR0_SPO + * SPI_CONF_DATA_SIZE: 4 to 16 bits */ void spi_init(void) @@ -86,8 +104,8 @@ spi_init(void) /* Configure the clock */ REG(SSI0_BASE + SSI_CPSR) = 2; - /* Put the ssi in motorola SPI mode with 8 bit data */ - REG(SSI0_BASE + SSI_CR0) = SSI_CR0_SPH_M | SSI_CR0_SPO_M | (7); + /* Put the ssi in Motorola SPI mode using the provided format options */ + REG(SSI0_BASE + SSI_CR0) = SPI_CONF_PHASE | SPI_CONF_POLARITY | (SPI_CONF_DATA_SIZE - 1); /* Enable the SSI */ REG(SSI0_BASE + SSI_CR1) |= SSI_CR1_SSE;