WISMOTE external flash driver support

This commit is contained in:
sumanpanchal 2015-04-20 20:40:14 +05:30 committed by suman_panchal
parent 6ac939bc58
commit fd5b03b767
4 changed files with 48 additions and 40 deletions

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@ -7,7 +7,7 @@ CONTIKI_TARGET_SOURCEFILES += contiki-wismote-platform.c \
sky-sensors.c uip-ipchksum.c \ sky-sensors.c uip-ipchksum.c \
uart1.c slip_uart1.c uart1-putchar.c uart1.c slip_uart1.c uart1-putchar.c
ARCH=spi.c i2c.c node-id.c sensors.c cfs-coffee.c sht15.c \ ARCH=spi.c xmem.c i2c.c node-id.c sensors.c cfs-coffee.c sht15.c \
cc2520.c cc2520-arch.c cc2520-arch-sfd.c \ cc2520.c cc2520-arch.c cc2520-arch-sfd.c \
sky-sensors.c uip-ipchksum.c \ sky-sensors.c uip-ipchksum.c \
uart1.c slip_uart1.c uart1-putchar.c uart1.c slip_uart1.c uart1-putchar.c

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@ -221,7 +221,7 @@ main(int argc, char **argv)
//ds2411_id[2] &= 0xfe; //ds2411_id[2] &= 0xfe;
leds_on(LEDS_BLUE); leds_on(LEDS_BLUE);
//xmem_init(); xmem_init();
leds_off(LEDS_RED); leds_off(LEDS_RED);
rtimer_init(); rtimer_init();

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@ -32,13 +32,17 @@
* \file * \file
* Device driver for the ST M25P80 40MHz 1Mbyte external memory. * Device driver for the ST M25P80 40MHz 1Mbyte external memory.
* \author * \author
* Björn Grönvall <bg@sics.se> * Björn Grönvall <bg@sics.se>
* Sumankumar Panchal <suman@ece.iisc.ernet.in>
*
* *
* Data is written bit inverted (~-operator) to flash so that * Data is written bit inverted (~-operator) to flash so that
* unwritten data will read as zeros (UNIX style). * unwritten data will read as zeros (UNIX style).
*/ */
#include "contiki.h" #include "contiki.h"
#include <stdio.h>
#include <string.h> #include <string.h>
#include "dev/spi.h" #include "dev/spi.h"
@ -46,7 +50,6 @@
#include "dev/watchdog.h" #include "dev/watchdog.h"
#if 0 #if 0
#include <stdio.h>
#define PRINTF(...) printf(__VA_ARGS__) #define PRINTF(...) printf(__VA_ARGS__)
#else #else
#define PRINTF(...) do {} while (0) #define PRINTF(...) do {} while (0)
@ -72,8 +75,7 @@ write_enable(void)
s = splhigh(); s = splhigh();
SPI_FLASH_ENABLE(); SPI_FLASH_ENABLE();
//FASTSPI_TX(SPI_FLASH_INS_WREN); SPI_WRITE(SPI_FLASH_INS_WREN);
//SPI_WAITFORTx_ENDED();
SPI_FLASH_DISABLE(); SPI_FLASH_DISABLE();
splx(s); splx(s);
@ -89,11 +91,10 @@ read_status_register(void)
s = splhigh(); s = splhigh();
SPI_FLASH_ENABLE(); SPI_FLASH_ENABLE();
//FASTSPI_TX(SPI_FLASH_INS_RDSR); SPI_WRITE(SPI_FLASH_INS_RDSR);
//SPI_WAITFORTx_ENDED();
//FASTSPI_CLEAR_RX(); SPI_FLUSH();
//FASTSPI_RX(u); SPI_READ(u);
SPI_FLASH_DISABLE(); SPI_FLASH_DISABLE();
splx(s); splx(s);
@ -110,6 +111,7 @@ wait_ready(void)
unsigned u; unsigned u;
do { do {
u = read_status_register(); u = read_status_register();
watchdog_periodic();
} while(u & 0x01); /* WIP=1, write in progress */ } while(u & 0x01); /* WIP=1, write in progress */
return u; return u;
} }
@ -121,18 +123,18 @@ static void
erase_sector(unsigned long offset) erase_sector(unsigned long offset)
{ {
int s; int s;
wait_ready();
wait_ready();
write_enable(); write_enable();
s = splhigh(); s = splhigh();
SPI_FLASH_ENABLE(); SPI_FLASH_ENABLE();
//FASTSPI_TX(SPI_FLASH_INS_SE); SPI_WRITE_FAST(SPI_FLASH_INS_SE);
//FASTSPI_TX(offset >> 16); /* MSB */ SPI_WRITE_FAST(offset >> 16); /* MSB */
//FASTSPI_TX(offset >> 8); SPI_WRITE_FAST(offset >> 8);
//FASTSPI_TX(offset >> 0); /* LSB */ SPI_WRITE_FAST(offset >> 0); /* LSB */
//SPI_WAITFORTx_ENDED(); SPI_WAITFORTx_ENDED();
SPI_FLASH_DISABLE(); SPI_FLASH_DISABLE();
splx(s); splx(s);
@ -144,12 +146,20 @@ erase_sector(unsigned long offset)
void void
xmem_init(void) xmem_init(void)
{ {
int s;
spi_init(); spi_init();
P4DIR |= BV(FLASH_CS) | BV(FLASH_HOLD) | BV(FLASH_PWR);
P4OUT |= BV(FLASH_PWR); /* P4.3 Output, turn on power! */
P4DIR |= BIT0;
/* Release from Deep Power-down */
s = splhigh();
SPI_FLASH_ENABLE();
SPI_WRITE_FAST(SPI_FLASH_INS_RES);
SPI_WAITFORTx_ENDED();
SPI_FLASH_DISABLE(); /* Unselect flash. */ SPI_FLASH_DISABLE(); /* Unselect flash. */
splx(s);
SPI_FLASH_UNHOLD(); SPI_FLASH_UNHOLD();
} }
/*---------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------*/
@ -159,6 +169,7 @@ xmem_pread(void *_p, int size, unsigned long offset)
unsigned char *p = _p; unsigned char *p = _p;
const unsigned char *end = p + size; const unsigned char *end = p + size;
int s; int s;
wait_ready(); wait_ready();
ENERGEST_ON(ENERGEST_TYPE_FLASH_READ); ENERGEST_ON(ENERGEST_TYPE_FLASH_READ);
@ -166,16 +177,16 @@ xmem_pread(void *_p, int size, unsigned long offset)
s = splhigh(); s = splhigh();
SPI_FLASH_ENABLE(); SPI_FLASH_ENABLE();
//FASTSPI_TX(SPI_FLASH_INS_READ); SPI_WRITE_FAST(SPI_FLASH_INS_READ);
//FASTSPI_TX(offset >> 16); /* MSB */ SPI_WRITE_FAST(offset >> 16); /* MSB */
//FASTSPI_TX(offset >> 8); SPI_WRITE_FAST(offset >> 8);
//FASTSPI_TX(offset >> 0); /* LSB */ SPI_WRITE_FAST(offset >> 0); /* LSB */
//SPI_WAITFORTx_ENDED(); SPI_WAITFORTx_ENDED();
//FASTSPI_CLEAR_RX(); SPI_FLUSH();
for(; p < end; p++) { for(; p < end; p++) {
unsigned char u; unsigned char u;
//FASTSPI_RX(u); SPI_READ(u);
*p = ~u; *p = ~u;
} }
@ -187,28 +198,27 @@ xmem_pread(void *_p, int size, unsigned long offset)
return size; return size;
} }
/*---------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------*/
static const char * static const unsigned char *
program_page(unsigned long offset, const unsigned char *p, int nbytes) program_page(unsigned long offset, const unsigned char *p, int nbytes)
{ {
const unsigned char *end = p + nbytes; const unsigned char *end = p + nbytes;
int s; int s;
wait_ready(); wait_ready();
write_enable(); write_enable();
s = splhigh(); s = splhigh();
SPI_FLASH_ENABLE(); SPI_FLASH_ENABLE();
// FASTSPI_TX(SPI_FLASH_INS_PP); SPI_WRITE_FAST(SPI_FLASH_INS_PP);
//FASTSPI_TX(offset >> 16); /* MSB */ SPI_WRITE_FAST(offset >> 16); /* MSB */
//FASTSPI_TX(offset >> 8); SPI_WRITE_FAST(offset >> 8);
//FASTSPI_TX(offset >> 0); /* LSB */ SPI_WRITE_FAST(offset >> 0); /* LSB */
for(; p < end; p++) { for(; p < end; p++) {
//FASTSPI_TX(~*p); SPI_WRITE_FAST(~*p);
} }
//SPI_WAITFORTx_ENDED(); SPI_WAITFORTx_ENDED();
SPI_FLASH_DISABLE(); SPI_FLASH_DISABLE();
splx(s); splx(s);
@ -254,14 +264,10 @@ xmem_erase(long size, unsigned long addr)
return -1; return -1;
} }
watchdog_stop();
for (; addr < end; addr += XMEM_ERASE_UNIT_SIZE) { for (; addr < end; addr += XMEM_ERASE_UNIT_SIZE) {
erase_sector(addr); erase_sector(addr);
} }
watchdog_start();
return size; return size;
} }
/*---------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------*/

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@ -124,8 +124,10 @@ typedef unsigned long off_t;
/* Enable/disable flash access to the SPI bus (active low). */ /* Enable/disable flash access to the SPI bus (active low). */
#define SPI_FLASH_ENABLE() //( P4OUT &= ~BV(FLASH_CS) ) /* ENABLE CSn (active low) */
#define SPI_FLASH_DISABLE() //( P4OUT |= BV(FLASH_CS) ) #define SPI_FLASH_ENABLE() do{ UCB0CTL1 &= ~UCSWRST; clock_delay(5); P4OUT &= ~BIT0;clock_delay(5);}while(0)
/* DISABLE CSn (active low) */
#define SPI_FLASH_DISABLE() do{clock_delay(5);UCB0CTL1 |= UCSWRST;clock_delay(1); P4OUT |= BIT0;clock_delay(5);}while(0)
#define SPI_FLASH_HOLD() // ( P4OUT &= ~BV(FLASH_HOLD) ) #define SPI_FLASH_HOLD() // ( P4OUT &= ~BV(FLASH_HOLD) )
#define SPI_FLASH_UNHOLD() //( P4OUT |= BV(FLASH_HOLD) ) #define SPI_FLASH_UNHOLD() //( P4OUT |= BV(FLASH_HOLD) )