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https://github.com/oliverschmidt/contiki.git
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WISMOTE external flash driver support
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parent
6ac939bc58
commit
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@ -7,7 +7,7 @@ CONTIKI_TARGET_SOURCEFILES += contiki-wismote-platform.c \
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sky-sensors.c uip-ipchksum.c \
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sky-sensors.c uip-ipchksum.c \
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uart1.c slip_uart1.c uart1-putchar.c
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uart1.c slip_uart1.c uart1-putchar.c
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ARCH=spi.c i2c.c node-id.c sensors.c cfs-coffee.c sht15.c \
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ARCH=spi.c xmem.c i2c.c node-id.c sensors.c cfs-coffee.c sht15.c \
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cc2520.c cc2520-arch.c cc2520-arch-sfd.c \
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cc2520.c cc2520-arch.c cc2520-arch-sfd.c \
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sky-sensors.c uip-ipchksum.c \
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sky-sensors.c uip-ipchksum.c \
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uart1.c slip_uart1.c uart1-putchar.c
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uart1.c slip_uart1.c uart1-putchar.c
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@ -221,7 +221,7 @@ main(int argc, char **argv)
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//ds2411_id[2] &= 0xfe;
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//ds2411_id[2] &= 0xfe;
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leds_on(LEDS_BLUE);
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leds_on(LEDS_BLUE);
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//xmem_init();
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xmem_init();
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leds_off(LEDS_RED);
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leds_off(LEDS_RED);
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rtimer_init();
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rtimer_init();
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@ -32,13 +32,17 @@
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* \file
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* \file
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* Device driver for the ST M25P80 40MHz 1Mbyte external memory.
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* Device driver for the ST M25P80 40MHz 1Mbyte external memory.
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* \author
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* \author
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* Björn Grönvall <bg@sics.se>
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* Björn Grönvall <bg@sics.se>
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* Sumankumar Panchal <suman@ece.iisc.ernet.in>
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*
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*
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*
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* Data is written bit inverted (~-operator) to flash so that
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* Data is written bit inverted (~-operator) to flash so that
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* unwritten data will read as zeros (UNIX style).
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* unwritten data will read as zeros (UNIX style).
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*/
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*/
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#include "contiki.h"
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#include "contiki.h"
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#include <stdio.h>
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#include <string.h>
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#include <string.h>
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#include "dev/spi.h"
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#include "dev/spi.h"
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@ -46,7 +50,6 @@
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#include "dev/watchdog.h"
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#include "dev/watchdog.h"
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#if 0
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#if 0
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#include <stdio.h>
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#define PRINTF(...) printf(__VA_ARGS__)
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#define PRINTF(...) printf(__VA_ARGS__)
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#else
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#else
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#define PRINTF(...) do {} while (0)
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#define PRINTF(...) do {} while (0)
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@ -72,8 +75,7 @@ write_enable(void)
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s = splhigh();
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s = splhigh();
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SPI_FLASH_ENABLE();
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SPI_FLASH_ENABLE();
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//FASTSPI_TX(SPI_FLASH_INS_WREN);
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SPI_WRITE(SPI_FLASH_INS_WREN);
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//SPI_WAITFORTx_ENDED();
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SPI_FLASH_DISABLE();
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SPI_FLASH_DISABLE();
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splx(s);
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splx(s);
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@ -89,11 +91,10 @@ read_status_register(void)
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s = splhigh();
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s = splhigh();
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SPI_FLASH_ENABLE();
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SPI_FLASH_ENABLE();
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//FASTSPI_TX(SPI_FLASH_INS_RDSR);
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SPI_WRITE(SPI_FLASH_INS_RDSR);
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//SPI_WAITFORTx_ENDED();
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//FASTSPI_CLEAR_RX();
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SPI_FLUSH();
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//FASTSPI_RX(u);
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SPI_READ(u);
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SPI_FLASH_DISABLE();
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SPI_FLASH_DISABLE();
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splx(s);
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splx(s);
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@ -110,6 +111,7 @@ wait_ready(void)
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unsigned u;
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unsigned u;
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do {
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do {
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u = read_status_register();
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u = read_status_register();
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watchdog_periodic();
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} while(u & 0x01); /* WIP=1, write in progress */
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} while(u & 0x01); /* WIP=1, write in progress */
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return u;
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return u;
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}
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}
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@ -121,18 +123,18 @@ static void
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erase_sector(unsigned long offset)
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erase_sector(unsigned long offset)
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{
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{
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int s;
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int s;
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wait_ready();
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wait_ready();
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write_enable();
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write_enable();
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s = splhigh();
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s = splhigh();
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SPI_FLASH_ENABLE();
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SPI_FLASH_ENABLE();
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//FASTSPI_TX(SPI_FLASH_INS_SE);
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SPI_WRITE_FAST(SPI_FLASH_INS_SE);
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//FASTSPI_TX(offset >> 16); /* MSB */
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SPI_WRITE_FAST(offset >> 16); /* MSB */
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//FASTSPI_TX(offset >> 8);
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SPI_WRITE_FAST(offset >> 8);
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//FASTSPI_TX(offset >> 0); /* LSB */
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SPI_WRITE_FAST(offset >> 0); /* LSB */
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//SPI_WAITFORTx_ENDED();
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SPI_WAITFORTx_ENDED();
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SPI_FLASH_DISABLE();
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SPI_FLASH_DISABLE();
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splx(s);
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splx(s);
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@ -144,12 +146,20 @@ erase_sector(unsigned long offset)
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void
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void
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xmem_init(void)
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xmem_init(void)
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{
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{
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int s;
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spi_init();
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spi_init();
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P4DIR |= BV(FLASH_CS) | BV(FLASH_HOLD) | BV(FLASH_PWR);
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P4OUT |= BV(FLASH_PWR); /* P4.3 Output, turn on power! */
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P4DIR |= BIT0;
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/* Release from Deep Power-down */
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s = splhigh();
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SPI_FLASH_ENABLE();
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SPI_WRITE_FAST(SPI_FLASH_INS_RES);
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SPI_WAITFORTx_ENDED();
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SPI_FLASH_DISABLE(); /* Unselect flash. */
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SPI_FLASH_DISABLE(); /* Unselect flash. */
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splx(s);
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SPI_FLASH_UNHOLD();
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SPI_FLASH_UNHOLD();
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}
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}
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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@ -159,6 +169,7 @@ xmem_pread(void *_p, int size, unsigned long offset)
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unsigned char *p = _p;
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unsigned char *p = _p;
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const unsigned char *end = p + size;
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const unsigned char *end = p + size;
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int s;
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int s;
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wait_ready();
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wait_ready();
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ENERGEST_ON(ENERGEST_TYPE_FLASH_READ);
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ENERGEST_ON(ENERGEST_TYPE_FLASH_READ);
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@ -166,16 +177,16 @@ xmem_pread(void *_p, int size, unsigned long offset)
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s = splhigh();
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s = splhigh();
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SPI_FLASH_ENABLE();
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SPI_FLASH_ENABLE();
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//FASTSPI_TX(SPI_FLASH_INS_READ);
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SPI_WRITE_FAST(SPI_FLASH_INS_READ);
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//FASTSPI_TX(offset >> 16); /* MSB */
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SPI_WRITE_FAST(offset >> 16); /* MSB */
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//FASTSPI_TX(offset >> 8);
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SPI_WRITE_FAST(offset >> 8);
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//FASTSPI_TX(offset >> 0); /* LSB */
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SPI_WRITE_FAST(offset >> 0); /* LSB */
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//SPI_WAITFORTx_ENDED();
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SPI_WAITFORTx_ENDED();
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//FASTSPI_CLEAR_RX();
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SPI_FLUSH();
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for(; p < end; p++) {
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for(; p < end; p++) {
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unsigned char u;
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unsigned char u;
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//FASTSPI_RX(u);
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SPI_READ(u);
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*p = ~u;
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*p = ~u;
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}
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}
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@ -187,28 +198,27 @@ xmem_pread(void *_p, int size, unsigned long offset)
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return size;
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return size;
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}
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}
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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static const char *
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static const unsigned char *
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program_page(unsigned long offset, const unsigned char *p, int nbytes)
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program_page(unsigned long offset, const unsigned char *p, int nbytes)
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{
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{
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const unsigned char *end = p + nbytes;
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const unsigned char *end = p + nbytes;
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int s;
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int s;
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wait_ready();
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wait_ready();
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write_enable();
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write_enable();
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s = splhigh();
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s = splhigh();
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SPI_FLASH_ENABLE();
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SPI_FLASH_ENABLE();
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// FASTSPI_TX(SPI_FLASH_INS_PP);
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SPI_WRITE_FAST(SPI_FLASH_INS_PP);
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//FASTSPI_TX(offset >> 16); /* MSB */
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SPI_WRITE_FAST(offset >> 16); /* MSB */
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//FASTSPI_TX(offset >> 8);
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SPI_WRITE_FAST(offset >> 8);
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//FASTSPI_TX(offset >> 0); /* LSB */
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SPI_WRITE_FAST(offset >> 0); /* LSB */
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for(; p < end; p++) {
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for(; p < end; p++) {
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//FASTSPI_TX(~*p);
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SPI_WRITE_FAST(~*p);
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}
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}
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//SPI_WAITFORTx_ENDED();
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SPI_WAITFORTx_ENDED();
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SPI_FLASH_DISABLE();
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SPI_FLASH_DISABLE();
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splx(s);
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splx(s);
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@ -224,7 +234,7 @@ xmem_pwrite(const void *_buf, int size, unsigned long addr)
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unsigned long i, next_page;
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unsigned long i, next_page;
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ENERGEST_ON(ENERGEST_TYPE_FLASH_WRITE);
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ENERGEST_ON(ENERGEST_TYPE_FLASH_WRITE);
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for(i = addr; i < end;) {
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for(i = addr; i < end;) {
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next_page = (i | 0xff) + 1;
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next_page = (i | 0xff) + 1;
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if(next_page > end) {
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if(next_page > end) {
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@ -254,14 +264,10 @@ xmem_erase(long size, unsigned long addr)
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return -1;
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return -1;
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}
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}
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watchdog_stop();
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for (; addr < end; addr += XMEM_ERASE_UNIT_SIZE) {
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for (; addr < end; addr += XMEM_ERASE_UNIT_SIZE) {
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erase_sector(addr);
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erase_sector(addr);
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}
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}
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watchdog_start();
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return size;
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return size;
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}
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}
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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@ -124,8 +124,10 @@ typedef unsigned long off_t;
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/* Enable/disable flash access to the SPI bus (active low). */
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/* Enable/disable flash access to the SPI bus (active low). */
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#define SPI_FLASH_ENABLE() //( P4OUT &= ~BV(FLASH_CS) )
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/* ENABLE CSn (active low) */
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#define SPI_FLASH_DISABLE() //( P4OUT |= BV(FLASH_CS) )
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#define SPI_FLASH_ENABLE() do{ UCB0CTL1 &= ~UCSWRST; clock_delay(5); P4OUT &= ~BIT0;clock_delay(5);}while(0)
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/* DISABLE CSn (active low) */
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#define SPI_FLASH_DISABLE() do{clock_delay(5);UCB0CTL1 |= UCSWRST;clock_delay(1); P4OUT |= BIT0;clock_delay(5);}while(0)
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#define SPI_FLASH_HOLD() // ( P4OUT &= ~BV(FLASH_HOLD) )
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#define SPI_FLASH_HOLD() // ( P4OUT &= ~BV(FLASH_HOLD) )
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#define SPI_FLASH_UNHOLD() //( P4OUT |= BV(FLASH_HOLD) )
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#define SPI_FLASH_UNHOLD() //( P4OUT |= BV(FLASH_HOLD) )
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