mirror of
https://github.com/oliverschmidt/contiki.git
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177 lines
5.3 KiB
C
177 lines
5.3 KiB
C
/*
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* Copyright (c) 2011, Swedish Institute of Computer Science
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Institute nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* Yet another machine dependent MSP430X UART0 code.
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* IF2, etc. can not be used here... need to abstract to some macros
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* later.
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*/
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#include "contiki.h"
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#include <stdlib.h>
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#include "sys/energest.h"
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#include "dev/uart1.h"
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#include "dev/watchdog.h"
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#include "isr_compat.h"
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static int (*uart1_input_handler)(unsigned char c);
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static volatile uint8_t transmitting;
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#ifdef UART1_CONF_RX_WITH_DMA
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#define RX_WITH_DMA UART1_CONF_RX_WITH_DMA
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#else /* UART1_CONF_RX_WITH_DMA */
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#define RX_WITH_DMA 1
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#endif /* UART1_CONF_RX_WITH_DMA */
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#if RX_WITH_DMA
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#define RXBUFSIZE 128
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static uint8_t rxbuf[RXBUFSIZE];
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static uint16_t last_size;
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static struct ctimer rxdma_timer;
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static void
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handle_rxdma_timer(void *ptr)
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{
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uint16_t size;
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size = DMA0SZ; /* Note: loop requires that size is less or eq to RXBUFSIZE */
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while(last_size != size) {
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uart1_input_handler((unsigned char)rxbuf[RXBUFSIZE - last_size]);
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last_size--;
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if(last_size == 0) {
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last_size = RXBUFSIZE;
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}
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}
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ctimer_reset(&rxdma_timer);
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}
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#endif /* RX_WITH_DMA */
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/*---------------------------------------------------------------------------*/
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uint8_t
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uart1_active(void)
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{
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return (UCA1STAT & UCBUSY) | transmitting;
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}
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/*---------------------------------------------------------------------------*/
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void
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uart1_set_input(int (*input)(unsigned char c))
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{
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#if RX_WITH_DMA /* This needs to be called after ctimer process is started */
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ctimer_set(&rxdma_timer, CLOCK_SECOND / 64, handle_rxdma_timer, NULL);
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#endif
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uart1_input_handler = input;
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}
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/*---------------------------------------------------------------------------*/
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void
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uart1_writeb(unsigned char c)
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{
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watchdog_periodic();
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/* Loop until the transmission buffer is available. */
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while((UCA1STAT & UCBUSY));
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/* Transmit the data. */
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UCA1TXBUF = c;
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}
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/*---------------------------------------------------------------------------*/
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/**
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* Initalize the RS232 port.
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*
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*/
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void
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uart1_init(unsigned long ubr)
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{
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/* RS232 */
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UCA1CTL1 |= UCSWRST; /* Hold peripheral in reset state */
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UCA1CTL1 |= UCSSEL_2; /* CLK = SMCLK */
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ubr = (MSP430_CPU_SPEED / ubr);
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UCA1BR0 = ubr & 0xff;
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UCA1BR1 = (ubr >> 8) & 0xff;
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/* UCA1MCTL |= UCBRS_2 + UCBRF_0; // Modulation UCBRFx=0 */
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UCA1MCTL = UCBRS_3; /* Modulation UCBRSx = 3 */
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P4DIR |= BIT5;
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P4OUT |= BIT5;
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P5SEL |= BIT6 | BIT7; /* P5.6,7 = USCI_A1 TXD/RXD */
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P4SEL |= BIT7;
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P4DIR |= BIT7;
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/*UCA1CTL1 &= ~UCSWRST;*/ /* Initialize USCI state machine */
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transmitting = 0;
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/* XXX Clear pending interrupts before enable */
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UCA1IE &= ~UCRXIFG;
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UCA1IE &= ~UCTXIFG;
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UCA1CTL1 &= ~UCSWRST; /* Initialize USCI state machine **before** enabling interrupts */
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UCA1IE |= UCRXIE; /* Enable UCA1 RX interrupt */
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#if RX_WITH_DMA
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UCA1IE &= ~UCRXIE; /* disable USART1 RX interrupt */
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/* UART1_RX trigger */
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DMACTL0 = DMA0TSEL_20;
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/* source address = RXBUF1 */
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DMA0SA = (unsigned int)&UCA1RXBUF;
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DMA0DA = (unsigned int)&rxbuf;
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DMA0SZ = RXBUFSIZE;
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last_size = RXBUFSIZE;
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DMA0CTL = DMADT_4 + DMASBDB + DMADSTINCR_3 + DMAEN + DMAREQ;
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msp430_add_lpm_req(MSP430_REQUIRE_LPM1);
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#endif /* RX_WITH_DMA */
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}
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/*---------------------------------------------------------------------------*/
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#if !RX_WITH_DMA
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ISR(USCI_A1, uart1_rx_interrupt)
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{
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uint8_t c;
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ENERGEST_ON(ENERGEST_TYPE_IRQ);
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if(UCA1IV == 2) {
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if(UCA1STAT & UCRXERR) {
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c = UCA1RXBUF; /* Clear error flags by forcing a dummy read. */
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} else {
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c = UCA1RXBUF;
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if(uart1_input_handler != NULL) {
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if(uart1_input_handler(c)) {
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LPM4_EXIT;
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}
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}
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}
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}
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ENERGEST_OFF(ENERGEST_TYPE_IRQ);
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}
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#endif /* !RX_WITH_DMA */
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/*---------------------------------------------------------------------------*/
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