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OR-ing an offset to a base address instead of adding it is dangerous because it can only work if the base address is aligned enough for the offset. Moreover, if the base address or the offset has a value unknown at compile time, then the assembly instructions dedicated to 'base + offset' addressing on most CPUs can't be emitted by the compiler because this would require the alignment of the base address against the offset to be known in order to optimize 'base | offset' into 'base + offset'. In that case, the compiler has to emit more instructions in order to compute 'base | offset' on most CPUs, e.g. on ARM, which means larger binary size and slower execution. Hence, replace all occurrences of 'base | offset' with 'base + offset'. This must become a coding rule. Here are the results for the cc2538-demo example: - Compilation of uart_init(): * before: REG(regs->base | UART_CC) = 0; 200b78: f446 637c orr.w r3, r6, #4032 ; 0xfc0 200b7c: f043 0308 orr.w r3, r3, #8 200b80: 2200 movs r2, #0 200b82: 601a str r2, [r3, #0] * now: REG(regs->base + UART_CC) = 0; 200b7a: 2300 movs r3, #0 200b7c: f8c4 3fc8 str.w r3, [r4, #4040] ; 0xfc8 - Size of the .text section: * before: 0x4c7c * now: 0x4c28 * saved: 84 bytes Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
112 lines
3.8 KiB
C
112 lines
3.8 KiB
C
/*
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* Copyright (c) 2012, Texas Instruments Incorporated - http://www.ti.com/
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/**
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* \addtogroup cc2538-nvic
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* @{
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*
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* \file
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* Driver for the cc2538 NVIC
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* All interrupt-related functionality is implemented here
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*/
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#include "contiki.h"
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#include "dev/nvic.h"
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#include "dev/scb.h"
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#include "reg.h"
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#include <stdint.h>
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static uint32_t *interrupt_enable;
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static uint32_t *interrupt_disable;
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static uint32_t *interrupt_pend;
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static uint32_t *interrupt_unpend;
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/*---------------------------------------------------------------------------*/
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void
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nvic_init()
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{
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interrupt_enable = (uint32_t *)NVIC_EN0;
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interrupt_disable = (uint32_t *)NVIC_DIS0;
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interrupt_pend = (uint32_t *)NVIC_PEND0;
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interrupt_unpend = (uint32_t *)NVIC_UNPEND0;
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/* Provide our interrupt table to the NVIC */
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REG(SCB_VTABLE) = (NVIC_CONF_VTABLE_BASE + NVIC_CONF_VTABLE_OFFSET);
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}
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/*---------------------------------------------------------------------------*/
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void
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nvic_interrupt_enable(uint32_t intr)
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{
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/* Writes of 0 are ignored, which is why we can simply use = */
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interrupt_enable[intr >> 5] = 1 << (intr & 0x1F);
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}
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/*---------------------------------------------------------------------------*/
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void
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nvic_interrupt_disable(uint32_t intr)
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{
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/* Writes of 0 are ignored, which is why we can simply use = */
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interrupt_disable[intr >> 5] = 1 << (intr & 0x1F);
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}
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/*---------------------------------------------------------------------------*/
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void
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nvic_interrupt_en_restore(uint32_t intr, uint8_t v)
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{
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if(v != 1) {
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return;
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}
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interrupt_enable[intr >> 5] = 1 << (intr & 0x1F);
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}
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/*---------------------------------------------------------------------------*/
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uint8_t
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nvic_interrupt_en_save(uint32_t intr)
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{
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uint8_t rv = ((interrupt_enable[intr >> 5] & (1 << (intr & 0x1F)))
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> NVIC_INTERRUPT_DISABLED);
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nvic_interrupt_disable(intr);
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return rv;
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}
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/*---------------------------------------------------------------------------*/
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void
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nvic_interrupt_pend(uint32_t intr)
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{
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/* Writes of 0 are ignored, which is why we can simply use = */
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interrupt_pend[intr >> 5] = 1 << (intr & 0x1F);
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}
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/*---------------------------------------------------------------------------*/
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void
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nvic_interrupt_unpend(uint32_t intr)
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{
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/* Writes of 0 are ignored, which is why we can simply use = */
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interrupt_unpend[intr >> 5] = 1 << (intr & 0x1F);
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}
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/** @} */
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