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77 lines
3.2 KiB
C
77 lines
3.2 KiB
C
#define GPIO_PAD_DIR0 0x80000000
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#define GPIO_DATA0 0x80000008
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#define GPIO_PAD_PU_EN0 0x80000010
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#define GPIO_PAD_PU_EN1 0x80000014
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#define ADC_CONTROL 0x80000018
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#define CRM_WU_CNTL 0x80003004
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#define CRM_WU_TIMEOUT 0x80003024
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#define CRM_SLEEP_CNTL 0x80003008
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#define CRM_STATUS 0x80003018
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#define CRM_XTAL_CNTL 0x80000040
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#define DELAY 400000
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#include "embedded_types.h"
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#include "isr.h"
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#include "utils.h"
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__attribute__ ((section ("startup"))) void main(void) {
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reg32(GPIO_PAD_DIR0) = 0x00000100;
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reg32(GPIO_DATA0) = 0x00000100;
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/* disable all pullups */
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/* seems to make a slight difference (2.0uA vs 1.95uA)*/
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// reg32(GPIO_PAD_PU_EN0) = 0;
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// reg32(GPIO_PAD_PU_EN1) = 0;
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// reg16(ADC_CONTROL) = 0; /* internal Vref2 */
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// reg16(CRM_XTAL_CNTL) = 0x052; /* default is 0xf52 */ /* doesn't anything w.r.t. power */
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/* go to sleep */
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// reg32(CRM_WU_CNTL) = 0; /* don't wake up */
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reg32(CRM_WU_CNTL) = 0x1; /* enable wakeup from wakeup timer */
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reg32(CRM_WU_TIMEOUT) = 1875000; /* wake 10 sec later if doze */
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// reg32(CRM_WU_TIMEOUT) = 20000; /* wake 10 sec later if hibernate w/2kHz*/
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// reg32(CRM_SLEEP_CNTL) = 1; /* hibernate, RAM page 0 only, don't retain state, don't power GPIO */ /* approx. 2.0uA */
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// reg32(CRM_SLEEP_CNTL) = 0x41; /* hibernate, RAM page 0 only, retain state, don't power GPIO */ /* approx. 10.0uA */
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// reg32(CRM_SLEEP_CNTL) = 0x51; /* hibernate, RAM page 0&1 only, retain state, don't power GPIO */ /* approx. 11.7uA */
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// reg32(CRM_SLEEP_CNTL) = 0x61; /* hibernate, RAM page 0&1 only, retain state, don't power GPIO */ /* approx. 13.9uA */
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// reg32(CRM_SLEEP_CNTL) = 0x71; /* hibernate, RAM page 0&1 only, retain state, don't power GPIO */ /* approx. 16.1uA - possibly with periodic refresh*/
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// reg32(CRM_SLEEP_CNTL) = 0xf1; /* hibernate, RAM page 0&1 only, retain state, power GPIO */ /* approx. 16.1uA - possibly with periodic refresh*/
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// reg32(CRM_SLEEP_CNTL) = 2; /* doze , RAM page 0 only, don't retain state, don't power GPIO */ /* approx. 69.2 uA */
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reg32(CRM_SLEEP_CNTL) = 0x42; /* doze , RAM page 0 only, retain state, don't power GPIO */ /* approx. 77.3uA */
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// reg32(CRM_SLEEP_CNTL) = 0x52; /* doze , RAM page 0&1 only, retain state, don't power GPIO */ /* approx. 78.9uA */
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// reg32(CRM_SLEEP_CNTL) = 0x62; /* doze , RAM page 0&1 only, retain state, don't power GPIO */ /* approx. 81.2uA */
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// reg32(CRM_SLEEP_CNTL) = 0x72; /* doze , RAM page 0&1 only, retain state, don't power GPIO */ /* approx. 83.4uA - possibly with periodic refresh*/
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// reg32(CRM_SLEEP_CNTL) = 0xf2; /* doze , RAM page 0&1 only, retain state, power GPIO */ /* approx. 82.8uA - possibly with periodic refresh*/
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while((reg32(CRM_STATUS) & 0x1) == 0) { continue; }
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reg32(CRM_STATUS) = 1; /* write 1 to sleep_sync --- this clears the bit (it's a r1wc bit) and powers down */
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/* asleep */
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while((reg32(CRM_STATUS) & 0x1) == 0) { continue; }
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reg32(CRM_STATUS) = 1; /* write 1 to sleep_sync --- this clears the bit (it's a r1wc bit) and finishes wakeup */
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volatile uint32_t i;
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while(1) {
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reg32(GPIO_DATA0) = 0x00000100;
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for(i=0; i<DELAY; i++) { continue; }
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reg32(GPIO_DATA0) = 0x00000000;
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for(i=0; i<DELAY; i++) { continue; }
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};
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}
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