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This patch extends the protection domain framework with an additional plugin to use Task-State Segment (TSS) structures to offload much of the work of switching protection domains to the CPU. This can save space compared to paging, since paging requires two 4KiB page tables and one 32-byte page table plus one whole-system TSS and an additional 32-byte data structure for each protection domain, whereas the approach implemented by this patch just requires a 128-byte data structure for each protection domain. Only a small number of protection domains will typically be used, so n * 128 < 8328 + (n * 32). For additional information, please refer to cpu/x86/mm/README.md. GCC 6 is introducing named address spaces for the FS and GS segments [1]. LLVM Clang also provides address spaces for the FS and GS segments [2]. This patch also adds support to the multi-segment X86 memory management subsystem for using these features instead of inline assembly blocks, which enables type checking to detect some address space mismatches. [1] https://gcc.gnu.org/onlinedocs/gcc/Named-Address-Spaces.html [2] http://llvm.org/releases/3.3/tools/clang/docs/LanguageExtensions.html#target-specific-extensions
134 lines
5.0 KiB
C
134 lines
5.0 KiB
C
/*
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* Copyright (C) 2015-2016, Intel Corporation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef CPU_X86_MM_GDT_LAYOUT_H_
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#define CPU_X86_MM_GDT_LAYOUT_H_
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#include "prot-domains.h"
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#if X86_CONF_PROT_DOMAINS == X86_CONF_PROT_DOMAINS__PAGING
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/**
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* Number of fixed GDT descriptors. Additional descriptors may be defined
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* outside of gdt.c.
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*/
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#define GDT_NUM_FIXED_DESC 7
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#elif X86_CONF_PROT_DOMAINS_MULTI_SEG
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#define GDT_NUM_FIXED_DESC 11
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#else
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#define GDT_NUM_FIXED_DESC 3
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#endif
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#define GDT_IDX_NULL 0
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/**
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* Flat code segment, used at boot and also for the rest of the system's
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* runtime when protection domains are disabled
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*/
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#define GDT_IDX_CODE_FLAT 1
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/**
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* Flat data segment, used at boot and also for the rest of the system's
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* runtime when protection domains are disabled
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*/
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#define GDT_IDX_DATA_FLAT 2
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#if X86_CONF_PROT_DOMAINS != X86_CONF_PROT_DOMAINS__NONE
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/** Default (post-boot) code segment */
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#define GDT_IDX_CODE 3
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/**
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* Same bounds and permissions as default code segment, but at the interrupt
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* handler privilege level
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*/
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#define GDT_IDX_CODE_INT 4
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/** Stack segment for interrupt handlers */
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#define GDT_IDX_STK_INT 5
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#if X86_CONF_PROT_DOMAINS == X86_CONF_PROT_DOMAINS__PAGING
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#define GDT_IDX_CODE_EXC GDT_IDX_CODE_FLAT
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/** Default data segment used by code at all privilege levels */
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#define GDT_IDX_DATA 6
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#define GDT_IDX_STK GDT_IDX_DATA
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#define GDT_IDX_STK_EXC GDT_IDX_DATA_FLAT
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#else
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/**
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* Same bounds and permissions as default code segment, but at the exception
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* handler privilege level
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*/
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#define GDT_IDX_CODE_EXC 6
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/** R/W kernel data descriptor used during boot stage 1 */
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#define GDT_IDX_DATA_KERN_EXC 7
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/** Default data segment used by code at all privilege levels */
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#define GDT_IDX_DATA 8
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/**
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* Default stack segment, which overlaps with the beginning of the default data
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* segment
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*/
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#define GDT_IDX_STK 9
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/** Stack segment for exception handlers */
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#define GDT_IDX_STK_EXC 10
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#define GDT_IDX_TSS(dom_id) (GDT_NUM_FIXED_DESC + (2 * (dom_id)))
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#define GDT_IDX_LDT(dom_id) (GDT_NUM_FIXED_DESC + (2 * (dom_id)) + 1)
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#endif
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#else
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#define GDT_IDX_CODE GDT_IDX_CODE_FLAT
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#define GDT_IDX_CODE_INT GDT_IDX_CODE_FLAT
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#define GDT_IDX_CODE_EXC GDT_IDX_CODE_FLAT
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#define GDT_IDX_DATA GDT_IDX_DATA_FLAT
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#define GDT_IDX_STK GDT_IDX_DATA_FLAT
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#define GDT_IDX_STK_INT GDT_IDX_DATA_FLAT
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#define GDT_IDX_STK_EXC GDT_IDX_DATA_FLAT
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#endif
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#define GDT_SEL(idx, rpl) (((idx) << 3) | (rpl))
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#define DT_SEL_GET_IDX(sel) ((sel) >> 3)
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#define DT_SEL_GET_RPL(sel) ((sel) & 3)
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#define GDT_SEL_NULL GDT_SEL(GDT_IDX_NULL, 0)
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#define GDT_SEL_CODE_FLAT GDT_SEL(GDT_IDX_CODE_FLAT, PRIV_LVL_EXC)
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#define GDT_SEL_DATA_FLAT GDT_SEL(GDT_IDX_DATA_FLAT, PRIV_LVL_EXC)
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#define GDT_SEL_CODE GDT_SEL(GDT_IDX_CODE, PRIV_LVL_USER)
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#define GDT_SEL_CODE_INT GDT_SEL(GDT_IDX_CODE_INT, PRIV_LVL_INT)
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#define GDT_SEL_CODE_EXC GDT_SEL(GDT_IDX_CODE_EXC, PRIV_LVL_EXC)
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#define GDT_SEL_DATA GDT_SEL(GDT_IDX_DATA, PRIV_LVL_EXC)
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#define GDT_SEL_DATA_KERN_EXC GDT_SEL(GDT_IDX_DATA_KERN_EXC, PRIV_LVL_EXC)
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#define GDT_SEL_STK GDT_SEL(GDT_IDX_STK, PRIV_LVL_USER)
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#define GDT_SEL_STK_INT GDT_SEL(GDT_IDX_STK_INT, PRIV_LVL_INT)
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#define GDT_SEL_STK_EXC GDT_SEL(GDT_IDX_STK_EXC, PRIV_LVL_EXC)
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#define GDT_SEL_TSS(dom_id) GDT_SEL(GDT_IDX_TSS(dom_id), PRIV_LVL_USER)
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#define GDT_SEL_LDT(dom_id) GDT_SEL(GDT_IDX_LDT(dom_id), PRIV_LVL_USER)
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#endif /* CPU_X86_MM_GDT_LAYOUT_H_ */
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