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https://github.com/oliverschmidt/contiki.git
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bump libmc1322x to 7bee48243c
Conflicts:
cpu/mc1322x/board/Makefile.board
cpu/mc1322x/lib/include/uart.h
cpu/mc1322x/lib/uart1.c
cpu/mc1322x/lib/uart2.c
cpu/mc1322x/src/default_lowlevel.c
179 lines
6.0 KiB
C
179 lines
6.0 KiB
C
/*
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* Copyright (c) 2010, Mariano Alvira <mar@devl.org> and other contributors
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* to the MC1322x project (http://mc1322x.devl.org)
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Institute nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* This file is part of libmc1322x: see http://mc1322x.devl.org
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* for details.
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*
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*
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*/
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#include <mc1322x.h>
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#include <stdint.h>
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#define MOD 9999
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#define CLK 24000000
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#define DIV 16 /* uart->CON.XTIM = 0 is 16x oversample (datasheet is incorrect) */
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void uart_setbaud(volatile struct UART_struct * uart, uint32_t baud) {
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uint64_t inc;
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/* baud rate eqn from reference manual */
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/* multiply by an additional 10 to do a fixed point round later */
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inc = ((uint64_t) baud * DIV * MOD * 10 / CLK ) - 10 ;
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/* add 5 and divide by 10 to get a rounding */
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inc = (inc + 5) / 10;
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/* UART must be disabled to set the baudrate */
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uart->CONbits.TXE = 0;
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uart->CONbits.RXE = 0;
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uart->BR = ( (uint16_t)inc << 16 ) | MOD;
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uart->CONbits.XTIM = 0;
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uart->CONbits.TXE = 1;
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uart->CONbits.RXE = 1;
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}
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void uart_flowctl(volatile struct UART_struct * uart, uint8_t on) {
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if (on) {
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if( uart == UART1 ) {
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/* CTS and RTS directions */
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GPIO->PAD_DIR_SET.U1CTS = 1;
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GPIO->PAD_DIR_RESET.U1RTS = 1;
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/* function select to uart */
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GPIO->FUNC_SEL.U1CTS = 1;
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GPIO->FUNC_SEL.U1RTS = 1;
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} else {
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/* UART 2 */
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/* CTS and RTS directions */
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GPIO->PAD_DIR_SET.U2CTS = 1;
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GPIO->PAD_DIR_RESET.U2RTS = 1;
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/* function select to uart */
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GPIO->FUNC_SEL.U2CTS = 1;
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GPIO->FUNC_SEL.U2RTS = 1;
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}
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/* enable flow control */
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uart->CONbits.FCE = 1;
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} else {
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/* off */
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/* disable flow control */
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uart->CONbits.FCE = 0;
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if( uart == UART1 ) {
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/* CTS and RTS to inputs */
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GPIO->PAD_DIR_RESET.U1CTS = 1;
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GPIO->PAD_DIR_RESET.U1RTS = 1;
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/* function select to gpio */
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GPIO->FUNC_SEL.U1CTS = 3;
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GPIO->FUNC_SEL.U1RTS = 3;
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} else {
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/* UART 2 */
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/* CTS and RTS to inputs */
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GPIO->PAD_DIR_RESET.U2CTS = 1;
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GPIO->PAD_DIR_RESET.U2RTS = 1;
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/* function select to gpio */
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GPIO->FUNC_SEL.U2CTS = 3;
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GPIO->FUNC_SEL.U2RTS = 3;
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}
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}
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}
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void uart_init(volatile struct UART_struct * uart, uint32_t baud) {
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/* enable the uart so we can set the gpio mode */
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/* see Section 11.5.1.2 Alternate Modes */
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/* you must enable the peripheral first BEFORE setting the function in GPIO_FUNC_SEL */
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/* From the datasheet: "The peripheral function will control operation of the pad IF */
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/* THE PERIPHERAL IS ENABLED. */
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uart->CONbits = (struct UART_CON) {
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.TXE = 1,
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.RXE = 1,
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};
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/* interrupt when there are this number or more bytes free in the TX buffer*/
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uart->TXCON = 16;
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if( uart == UART1 ) {
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/* TX and RX directions */
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GPIO->PAD_DIR_SET.U1TX = 1;
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GPIO->PAD_DIR_RESET.U1RX = 1;
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/* set func sel to UART */
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GPIO->FUNC_SEL.U1TX = 1;
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GPIO->FUNC_SEL.U1RX = 1;
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#if UART1_RX_BUFFERSIZE > 32
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*UART1_UCON = (1 << 0) | (1 << 1) ; /* enable receive, transmit, and both interrupts */
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*UART1_URXCON = 30; /* interrupt when fifo is nearly full */
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u1_rx_head = 0; u1_rx_tail = 0;
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#elif UART1_RX_BUFFERSIZE < 32 /* enable receive, transmit, flow control, disable rx interrupt */
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*UART1_UCON = (1 << 0) | (1 << 1) | (1 << 12) | (1 << 14);
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*UART1_UCTS = UART1_RX_BUFFERSIZE; /* drop cts when tx buffer at trigger level */
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*GPIO_FUNC_SEL1 = ( (0x01 << (0*2)) | (0x01 << (1*2)) ); /* set GPIO17-16 to UART1 CTS and RTS */
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#else
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*UART1_UCON = (1 << 0) | (1 << 1) | (1 << 14); /* enable receive, transmit, disable rx interrupt */
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#endif
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u1_tx_head = 0; u1_tx_tail = 0;
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/* tx and rx interrupts are enabled in the UART by default */
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/* see status register bits 13 and 14 */
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/* enable UART1 interrupts in the interrupt controller */
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enable_irq(UART1);
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} else {
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/* UART2 */
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/* TX and RX directions */
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GPIO->PAD_DIR_SET.U2TX = 1;
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GPIO->PAD_DIR_RESET.U1RX = 1;
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/* set func sel to UART */
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GPIO->FUNC_SEL.U2TX = 1;
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GPIO->FUNC_SEL.U2RX = 1;
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#if UART2_RX_BUFFERSIZE > 32
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*UART2_UCON = (1 << 0) | (1 << 1) ; /* enable receive, transmit, and both interrupts */
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*UART2_URXCON = 30; /* interrupt when fifo is nearly full */
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u2_rx_head = 0; u2_rx_tail = 0;
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#elif UART2_RX_BUFFERSIZE < 32 /* enable receive, transmit, disable flow control, disable rx interrupt */
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*UART2_UCON = (1 << 0) | (1 << 1) | (0 << 12) | (1 << 14);
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*UART2_UCTS = UART2_RX_BUFFERSIZE; /* drop cts when tx buffer at trigger level */
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*GPIO_FUNC_SEL1 = ( (0x01 << (0*2)) | (0x01 << (1*2)) ); /* set GPIO17-16 to UART2 CTS and RTS */
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#else
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*UART2_UCON = (1 << 0) | (1 << 1) | (1 << 14); /* enable receive, transmit, disable rx interrupt */
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#endif
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u2_tx_head = 0; u2_tx_tail = 0;
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enable_irq(UART2);
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}
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uart_setbaud(uart, baud);
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}
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