David Kopf 58298f59db Add F_CPU=0x800000 option with phase lock to external 32768 Hz crystal ... Add MCU_CONF_LOW_WEAR option to avoid eeprom writes during development.		2012-01-10 12:42:27 -05:00
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dev	Add F_CPU=0x800000 option with phase lock to external 32768 Hz crystal	2012-01-10 12:42:27 -05:00
radio	Add F_CPU=0x800000 option with phase lock to external 32768 Hz crystal	2012-01-10 12:42:27 -05:00
avr.c
avrdef.h
bootloader.c
bootloader.h	Merge CDC-ECM, RNG, DFU bootloader, watchdog, settings manager, energy scan routines of Robert Quattlebaum	2010-09-17 21:59:09 +00:00
cc2420_spi.c
leds-arch.c
Makefile.avr
minileds.c
mtarch.c
mtarch.h
rtimer-arch.c	Add rtimer_arch_sleep function, enabled with RDC_CONF_MCU_SLEEP	2011-11-14 11:10:35 -05:00
rtimer-arch.h	Add F_CPU=0x800000 option with phase lock to external 32768 Hz crystal	2012-01-10 12:42:27 -05:00
settings.c
settings.h
slip_uart1.c	SLIP for AVR on UART1	2007-02-02 13:13:16 +00:00
spi.c
watchdog.c