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OR-ing an offset to a base address instead of adding it is dangerous because it can only work if the base address is aligned enough for the offset. Moreover, if the base address or the offset has a value unknown at compile time, then the assembly instructions dedicated to 'base + offset' addressing on most CPUs can't be emitted by the compiler because this would require the alignment of the base address against the offset to be known in order to optimize 'base | offset' into 'base + offset'. In that case, the compiler has to emit more instructions in order to compute 'base | offset' on most CPUs, e.g. on ARM, which means larger binary size and slower execution. Hence, replace all occurrences of 'base | offset' with 'base + offset'. This must become a coding rule. Here are the results for the cc2538-demo example: - Compilation of uart_init(): * before: REG(regs->base | UART_CC) = 0; 200b78: f446 637c orr.w r3, r6, #4032 ; 0xfc0 200b7c: f043 0308 orr.w r3, r3, #8 200b80: 2200 movs r2, #0 200b82: 601a str r2, [r3, #0] * now: REG(regs->base + UART_CC) = 0; 200b7a: 2300 movs r3, #0 200b7c: f8c4 3fc8 str.w r3, [r4, #4040] ; 0xfc8 - Size of the .text section: * before: 0x4c7c * now: 0x4c28 * saved: 84 bytes Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
251 lines
8.0 KiB
C
251 lines
8.0 KiB
C
/*
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* Copyright (c) 2012, Texas Instruments Incorporated - http://www.ti.com/
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/**
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* \addtogroup cc2538
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* @{
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*
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* \defgroup cc2538-clock cc2538 Clock
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*
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* Implementation of the clock module for the cc2538
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*
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* To implement the clock functionality, we use the SysTick peripheral on the
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* cortex-M3. We run the system clock at 16 MHz and we set the SysTick to give
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* us 128 interrupts / sec. However, the Sleep Timer counter value is used for
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* the number of elapsed ticks in order to avoid a significant time drift caused
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* by PM1/2. Contrary to the Sleep Timer, the SysTick peripheral is indeed
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* frozen during PM1/2, so adjusting upon wake-up a tick counter based on this
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* peripheral would hardly be accurate.
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* @{
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*
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* \file
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* Clock driver implementation for the TI cc2538
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*/
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#include "contiki.h"
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#include "systick.h"
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#include "reg.h"
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#include "cpu.h"
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#include "dev/gptimer.h"
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#include "dev/sys-ctrl.h"
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#include "sys/energest.h"
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#include "sys/etimer.h"
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#include "sys/rtimer.h"
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#include <stdint.h>
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/*---------------------------------------------------------------------------*/
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#define RTIMER_CLOCK_TICK_RATIO (RTIMER_SECOND / CLOCK_SECOND)
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#define RELOAD_VALUE (125000 - 1) /** Fire 128 times / sec */
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static volatile uint64_t rt_ticks_startup = 0, rt_ticks_epoch = 0;
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/*---------------------------------------------------------------------------*/
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/**
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* \brief Arch-specific implementation of clock_init for the cc2538
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*
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* We initialise the SysTick to fire 128 interrupts per second, giving us a
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* value of 128 for CLOCK_SECOND
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*
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* We also initialise GPT0:Timer A, which is used by clock_delay_usec().
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* We use 16-bit range (individual), count-down, one-shot, no interrupts.
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* The system clock is at 16MHz giving us 62.5 nano sec ticks for Timer A.
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* Prescaled by 16 gives us a very convenient 1 tick per usec
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*/
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void
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clock_init(void)
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{
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REG(SYSTICK_STRELOAD) = RELOAD_VALUE;
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/* System clock source, Enable */
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REG(SYSTICK_STCTRL) |= SYSTICK_STCTRL_CLK_SRC | SYSTICK_STCTRL_ENABLE;
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/* Enable the SysTick Interrupt */
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REG(SYSTICK_STCTRL) |= SYSTICK_STCTRL_INTEN;
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/*
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* Remove the clock gate to enable GPT0 and then initialise it
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* We only use GPT0 for clock_delay_usec. We initialise it here so we can
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* have it ready when it's needed
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*/
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REG(SYS_CTRL_RCGCGPT) |= SYS_CTRL_RCGCGPT_GPT0;
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/* Make sure GPT0 is off */
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REG(GPT_0_BASE + GPTIMER_CTL) = 0;
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/* 16-bit */
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REG(GPT_0_BASE + GPTIMER_CFG) = 0x04;
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/* One-Shot, Count Down, No Interrupts */
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REG(GPT_0_BASE + GPTIMER_TAMR) = GPTIMER_TAMR_TAMR_ONE_SHOT;
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/* Prescale by 16 (thus, value 15 in TAPR) */
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REG(GPT_0_BASE + GPTIMER_TAPR) = 0x0F;
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}
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/*---------------------------------------------------------------------------*/
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CCIF clock_time_t
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clock_time(void)
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{
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return rt_ticks_startup / RTIMER_CLOCK_TICK_RATIO;
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}
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/*---------------------------------------------------------------------------*/
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void
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clock_set_seconds(unsigned long sec)
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{
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rt_ticks_epoch = (uint64_t)sec * RTIMER_SECOND;
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}
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/*---------------------------------------------------------------------------*/
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CCIF unsigned long
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clock_seconds(void)
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{
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return rt_ticks_epoch / RTIMER_SECOND;
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}
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/*---------------------------------------------------------------------------*/
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void
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clock_wait(clock_time_t i)
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{
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clock_time_t start;
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start = clock_time();
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while(clock_time() - start < (clock_time_t)i);
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}
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/*---------------------------------------------------------------------------*/
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/*
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* Arch-specific implementation of clock_delay_usec for the cc2538
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*
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* See clock_init() for GPT0 Timer A's configuration
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*/
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void
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clock_delay_usec(uint16_t dt)
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{
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REG(GPT_0_BASE + GPTIMER_TAILR) = dt;
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REG(GPT_0_BASE + GPTIMER_CTL) |= GPTIMER_CTL_TAEN;
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/* One-Shot mode: TAEN will be cleared when the timer reaches 0 */
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while(REG(GPT_0_BASE + GPTIMER_CTL) & GPTIMER_CTL_TAEN);
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}
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/*---------------------------------------------------------------------------*/
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/**
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* \brief Obsolete delay function but we implement it here since some code
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* still uses it
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*/
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void
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clock_delay(unsigned int i)
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{
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clock_delay_usec(i);
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}
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/*---------------------------------------------------------------------------*/
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/**
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* \brief Update the software clock ticks and seconds
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*
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* This function is used to update the software tick counters whenever the
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* system clock might have changed, which can occur upon a SysTick ISR or upon
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* wake-up from PM1/2.
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*
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* For the software clock ticks counter, the Sleep Timer counter value is used
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* as the base tick value, and extended to a 64-bit value thanks to a detection
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* of wraparounds.
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*
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* For the seconds counter, the changes of the Sleep Timer counter value are
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* added to the reference time, which is either the startup time or the value
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* passed to clock_set_seconds().
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*
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* This function polls the etimer process if an etimer has expired.
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*/
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static void
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update_ticks(void)
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{
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rtimer_clock_t now;
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uint64_t prev_rt_ticks_startup, cur_rt_ticks_startup;
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uint32_t cur_rt_ticks_startup_hi;
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now = RTIMER_NOW();
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prev_rt_ticks_startup = rt_ticks_startup;
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cur_rt_ticks_startup_hi = prev_rt_ticks_startup >> 32;
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if(now < (rtimer_clock_t)prev_rt_ticks_startup) {
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cur_rt_ticks_startup_hi++;
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}
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cur_rt_ticks_startup = (uint64_t)cur_rt_ticks_startup_hi << 32 | now;
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rt_ticks_startup = cur_rt_ticks_startup;
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rt_ticks_epoch += cur_rt_ticks_startup - prev_rt_ticks_startup;
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/*
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* Inform the etimer library that the system clock has changed and that an
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* etimer might have expired.
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*/
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if(etimer_pending()) {
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etimer_request_poll();
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}
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}
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/*---------------------------------------------------------------------------*/
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/**
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* \brief Adjust the clock following missed SysTick ISRs
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*
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* This function is useful when coming out of PM1/2, during which the system
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* clock is stopped. We adjust the clock counters like after any SysTick ISR.
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*
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* \note This function is only meant to be used by lpm_exit(). Applications
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* should really avoid calling this
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*/
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void
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clock_adjust(void)
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{
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/* Halt the SysTick while adjusting */
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REG(SYSTICK_STCTRL) &= ~SYSTICK_STCTRL_ENABLE;
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update_ticks();
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/* Re-Start the SysTick */
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REG(SYSTICK_STCTRL) |= SYSTICK_STCTRL_ENABLE;
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}
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/*---------------------------------------------------------------------------*/
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/**
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* \brief The clock Interrupt Service Routine
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*
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* It polls the etimer process if an etimer has expired. It also updates the
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* software clock tick and seconds counter.
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*/
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void
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clock_isr(void)
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{
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ENERGEST_ON(ENERGEST_TYPE_IRQ);
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update_ticks();
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ENERGEST_OFF(ENERGEST_TYPE_IRQ);
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}
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/*---------------------------------------------------------------------------*/
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/**
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* @}
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* @}
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*/
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