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https://github.com/oliverschmidt/contiki.git
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This commit: * Moves all cpu files from cpu/cc26xx to cpu/cc26xx-cc13xx * Bumps the CC26xxware submodule to the latest TI release * Adds CC13xxware as a submodule * Adds support for sub-ghz mode / IEEE 802.15.4g * Splits the driver into multiple files for clarity. We now have the following structure: * A common module that handles access to the RF core, interrupts etc * A module that takes care of BLE functionality * A netstack radio driver for IEEE mode (2.4GHz) * A netstack radio driver for PROP mode (sub-ghz - multiple bands) This commit also adds tick suppression functionality, applicable to all chips of the CC26xx and CC13xx families. Instead waking up on every clock tick simply to increment our software counter, we now only wake up just in time to service the next scheduled etimer. ContikiMAC-triggered wakeups are unaffected. Laslty, this commit also applies a number of minor changes: * Addition of missing includes * Removal of stub functions * Removal of a woraround for a CC26xxware bug that has now been fixed
486 lines
15 KiB
C
486 lines
15 KiB
C
/*
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* Copyright (c) 2014, Texas Instruments Incorporated - http://www.ti.com/
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*---------------------------------------------------------------------------*/
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/**
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* \addtogroup cc26xx-lpm
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* @{
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*
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* Implementation of CC13xx/CC26xx low-power operation functionality
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*
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* @{
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*
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* \file
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* Driver for CC13xx/CC26xx low-power operation
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*/
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/*---------------------------------------------------------------------------*/
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#include "prcm.h"
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#include "contiki-conf.h"
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#include "ti-lib.h"
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#include "lpm.h"
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#include "sys/energest.h"
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#include "lib/list.h"
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#include "dev/leds.h"
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#include "dev/watchdog.h"
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#include "dev/soc-rtc.h"
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#include "dev/oscillators.h"
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#include <stdint.h>
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#include <string.h>
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/*---------------------------------------------------------------------------*/
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#if ENERGEST_CONF_ON
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static unsigned long irq_energest = 0;
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#define ENERGEST_IRQ_SAVE(a) do { \
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a = energest_type_time(ENERGEST_TYPE_IRQ); } while(0)
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#define ENERGEST_IRQ_RESTORE(a) do { \
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energest_type_set(ENERGEST_TYPE_IRQ, a); } while(0)
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#else
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#define ENERGEST_IRQ_SAVE(a) do {} while(0)
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#define ENERGEST_IRQ_RESTORE(a) do {} while(0)
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#endif
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/*---------------------------------------------------------------------------*/
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LIST(modules_list);
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/*---------------------------------------------------------------------------*/
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/* PDs that may stay on in deep sleep */
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#define LOCKABLE_DOMAINS ((uint32_t)(PRCM_DOMAIN_SERIAL | PRCM_DOMAIN_PERIPH))
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/*---------------------------------------------------------------------------*/
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/*
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* Don't consider standby mode if the next AON RTC event is scheduled to fire
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* in less than STANDBY_MIN_DURATION rtimer ticks
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*/
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#define STANDBY_MIN_DURATION (RTIMER_SECOND >> 11)
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/*---------------------------------------------------------------------------*/
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/* Prototype of a function in clock.c. Called every time we come out of DS */
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void clock_update(void);
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/*---------------------------------------------------------------------------*/
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void
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lpm_shutdown(uint32_t wakeup_pin, uint32_t io_pull, uint32_t wake_on)
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{
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lpm_registered_module_t *module;
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int i, j;
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uint32_t io_cfg = (IOC_STD_INPUT & ~IOC_IOPULL_M) | io_pull |
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wake_on;
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/* This procedure may not be interrupted */
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ti_lib_int_master_disable();
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/* Disable the RTC */
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ti_lib_aon_rtc_disable();
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ti_lib_aon_rtc_event_clear(AON_RTC_CH0);
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ti_lib_aon_rtc_event_clear(AON_RTC_CH1);
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ti_lib_aon_rtc_event_clear(AON_RTC_CH2);
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/* Reset AON even fabric to default wakeup sources */
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for(i = AON_EVENT_MCU_WU0; i <= AON_EVENT_MCU_WU3; i++) {
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ti_lib_aon_event_mcu_wake_up_set(i, AON_EVENT_NONE);
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}
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for(i = AON_EVENT_AUX_WU0; i <= AON_EVENT_AUX_WU2; i++) {
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ti_lib_aon_event_aux_wake_up_set(i, AON_EVENT_NONE);
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}
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ti_lib_sys_ctrl_aon_sync();
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watchdog_periodic();
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/* fade away....... */
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j = 1000;
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for(i = j; i > 0; --i) {
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leds_on(LEDS_ALL);
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clock_delay_usec(i);
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leds_off(LEDS_ALL);
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clock_delay_usec(j - i);
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}
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leds_off(LEDS_ALL);
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/* Notify all modules that we're shutting down */
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for(module = list_head(modules_list); module != NULL;
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module = module->next) {
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if(module->shutdown) {
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module->shutdown(LPM_MODE_SHUTDOWN);
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}
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}
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/* Configure the wakeup trigger */
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ti_lib_gpio_dir_mode_set((1 << wakeup_pin), GPIO_DIR_MODE_IN);
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ti_lib_ioc_port_configure_set(wakeup_pin, IOC_PORT_GPIO, io_cfg);
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/* Freeze I/O latches in AON */
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ti_lib_aon_ioc_freeze_enable();
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/* Turn off RFCORE, SERIAL and PERIPH PDs. This will happen immediately */
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ti_lib_prcm_power_domain_off(PRCM_DOMAIN_RFCORE | PRCM_DOMAIN_SERIAL |
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PRCM_DOMAIN_PERIPH);
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oscillators_switch_to_hf_rc();
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oscillators_select_lf_rcosc();
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/* Configure clock sources for MCU and AUX: No clock */
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ti_lib_aon_wuc_mcu_power_down_config(AONWUC_NO_CLOCK);
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ti_lib_aon_wuc_aux_power_down_config(AONWUC_NO_CLOCK);
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/* Disable SRAM and AUX retentions */
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ti_lib_aon_wuc_mcu_sram_config(0);
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ti_lib_aon_wuc_aux_sram_config(false);
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/*
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* Request CPU, SYSBYS and VIMS PD off.
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* This will only happen when the CM3 enters deep sleep
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*/
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ti_lib_prcm_power_domain_off(PRCM_DOMAIN_CPU | PRCM_DOMAIN_VIMS |
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PRCM_DOMAIN_SYSBUS);
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/* Request JTAG domain power off */
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ti_lib_aon_wuc_jtag_power_off();
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/* Turn off AUX */
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ti_lib_aux_wuc_power_ctrl(AUX_WUC_POWER_OFF);
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ti_lib_aon_wuc_domain_power_down_enable();
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while(ti_lib_aon_wuc_power_status_get() & AONWUC_AUX_POWER_ON);
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/*
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* Request MCU VD power off.
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* This will only happen when the CM3 enters deep sleep
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*/
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ti_lib_prcm_mcu_power_off();
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/* Set MCU wakeup to immediate and disable virtual power off */
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ti_lib_aon_wuc_mcu_wake_up_config(MCU_IMM_WAKE_UP);
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ti_lib_aon_wuc_mcu_power_off_config(MCU_VIRT_PWOFF_DISABLE);
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/* Latch the IOs in the padring and enable I/O pad sleep mode */
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ti_lib_pwr_ctrl_io_freeze_enable();
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/* Turn off VIMS cache, CRAM and TRAM - possibly not required */
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ti_lib_prcm_cache_retention_disable();
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ti_lib_vims_mode_set(VIMS_BASE, VIMS_MODE_OFF);
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/* Enable shutdown and sync AON */
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ti_lib_aon_wuc_shut_down_enable();
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ti_lib_sys_ctrl_aon_sync();
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/* Deep Sleep */
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ti_lib_prcm_deep_sleep();
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}
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/*---------------------------------------------------------------------------*/
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/*
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* Notify all modules that we're back on and rely on them to restore clocks
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* and power domains as required.
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*/
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static void
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wake_up(void)
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{
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lpm_registered_module_t *module;
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/* Remember IRQ energest for next pass */
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ENERGEST_IRQ_SAVE(irq_energest);
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ENERGEST_ON(ENERGEST_TYPE_CPU);
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ENERGEST_OFF(ENERGEST_TYPE_LPM);
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/* Sync so that we get the latest values before adjusting recharge settings */
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ti_lib_sys_ctrl_aon_sync();
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/* Adjust recharge settings */
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ti_lib_sys_ctrl_adjust_recharge_after_power_down();
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/*
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* Release the request to the uLDO
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* This is likely not required, since the switch to GLDO/DCDC is automatic
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* when coming back from deep sleep
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*/
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ti_lib_prcm_mcu_uldo_configure(false);
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/* Turn on cache again */
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ti_lib_vims_mode_set(VIMS_BASE, VIMS_MODE_ENABLED);
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ti_lib_prcm_cache_retention_enable();
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ti_lib_aon_ioc_freeze_disable();
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ti_lib_sys_ctrl_aon_sync();
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/* Check operating conditions, optimally choose DCDC versus GLDO */
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ti_lib_sys_ctrl_dcdc_voltage_conditional_control();
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/*
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* We may or may not have been woken up by an AON RTC tick. If not, we need
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* to adjust our software tick counter
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*/
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clock_update();
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watchdog_periodic();
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/* Notify all registered modules that we've just woken up */
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for(module = list_head(modules_list); module != NULL;
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module = module->next) {
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if(module->wakeup) {
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module->wakeup();
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}
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}
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}
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/*---------------------------------------------------------------------------*/
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void
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lpm_drop()
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{
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lpm_registered_module_t *module;
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uint8_t max_pm = LPM_MODE_MAX_SUPPORTED;
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uint8_t module_pm;
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clock_time_t next_event;
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uint32_t domains = LOCKABLE_DOMAINS;
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if(RTIMER_CLOCK_LT(soc_rtc_get_next_trigger(),
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RTIMER_NOW() + STANDBY_MIN_DURATION)) {
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lpm_sleep();
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return;
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}
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/* Collect max allowed PM permission from interested modules */
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for(module = list_head(modules_list); module != NULL;
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module = module->next) {
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if(module->request_max_pm) {
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module_pm = module->request_max_pm();
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if(module_pm < max_pm) {
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max_pm = module_pm;
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}
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}
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}
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/* Check if any events fired during this process. Last chance to abort */
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if(process_nevents()) {
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return;
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}
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/* Drop */
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if(max_pm == LPM_MODE_SLEEP) {
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lpm_sleep();
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} else {
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/* Critical. Don't get interrupted! */
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ti_lib_int_master_disable();
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/*
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* Reschedule AON RTC CH1 to fire an event N ticks before the next etimer
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* event
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*/
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next_event = etimer_next_expiration_time();
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if(next_event) {
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next_event = next_event - clock_time();
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soc_rtc_schedule_one_shot(AON_RTC_CH1, RTIMER_NOW() +
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(next_event * (RTIMER_SECOND / CLOCK_SECOND)));
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}
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/*
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* Notify all registered modules that we are dropping to mode X. We do not
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* need to do this for simple sleep.
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*
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* This is a chance for modules to delay us a little bit until an ongoing
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* operation has finished (e.g. uart TX) or to configure themselves for
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* deep sleep.
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*
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* At this stage, we also collect power domain locks, if any.
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* The argument to PRCMPowerDomainOff() is a bitwise OR, so every time
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* we encounter a lock we just clear the respective bits in the 'domains'
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* variable as required by the lock. In the end the domains variable will
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* just hold whatever has not been cleared
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*/
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for(module = list_head(modules_list); module != NULL;
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module = module->next) {
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if(module->shutdown) {
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module->shutdown(max_pm);
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}
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/* Clear the bits specified in the lock */
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domains &= ~module->domain_lock;
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}
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/* Pat the dog: We don't want it to shout right after we wake up */
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watchdog_periodic();
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/* Clear unacceptable bits, just in case a lock provided a bad value */
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domains &= LOCKABLE_DOMAINS;
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/*
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* Freeze the IOs on the boundary between MCU and AON. We only do this if
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* PERIPH is not needed
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*/
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if(domains & PRCM_DOMAIN_PERIPH) {
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ti_lib_aon_ioc_freeze_enable();
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}
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/*
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* Among LOCKABLE_DOMAINS, turn off those that are not locked
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*
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* If domains is != 0, pass it as-is
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*/
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if(domains) {
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ti_lib_prcm_power_domain_off(domains);
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}
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/*
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* Before entering Deep Sleep, we must switch off the HF XOSC. The HF XOSC
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* is predominantly controlled by the RF driver. In a build with radio
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* cycling (e.g. ContikiMAC), the RF driver will request the XOSC before
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* using the Freq. Synth, and switch back to the RC when it is about to
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* turn back off.
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*
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* If the radio is on, we won't even reach here, and if it's off the HF
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* clock source should already be the HF RC.
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*
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* Nevertheless, request the switch to the HF RC explicitly here.
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*/
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oscillators_switch_to_hf_rc();
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/* Configure clock sources for MCU and AUX: No clock */
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ti_lib_aon_wuc_mcu_power_down_config(AONWUC_NO_CLOCK);
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ti_lib_aon_wuc_aux_power_down_config(AONWUC_NO_CLOCK);
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/* Full RAM retention. */
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ti_lib_aon_wuc_mcu_sram_config(MCU_RAM0_RETENTION | MCU_RAM1_RETENTION |
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MCU_RAM2_RETENTION | MCU_RAM3_RETENTION);
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/* Disable retention of AUX RAM */
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ti_lib_aon_wuc_aux_sram_config(false);
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/*
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* Always turn off RFCORE, CPU, SYSBUS and VIMS. RFCORE should be off
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* already
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*/
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ti_lib_prcm_power_domain_off(PRCM_DOMAIN_RFCORE | PRCM_DOMAIN_CPU |
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PRCM_DOMAIN_VIMS | PRCM_DOMAIN_SYSBUS);
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/* Request JTAG domain power off */
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ti_lib_aon_wuc_jtag_power_off();
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/* Turn off AUX */
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ti_lib_aux_wuc_power_ctrl(AUX_WUC_POWER_OFF);
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ti_lib_aon_wuc_domain_power_down_enable();
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while(ti_lib_aon_wuc_power_status_get() & AONWUC_AUX_POWER_ON);
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/* Configure the recharge controller */
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ti_lib_sys_ctrl_set_recharge_before_power_down(XOSC_IN_HIGH_POWER_MODE);
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/*
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* If both PERIPH and SERIAL PDs are off, request the uLDO as the power
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* source while in deep sleep.
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*/
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if(domains == LOCKABLE_DOMAINS) {
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ti_lib_pwr_ctrl_source_set(PWRCTRL_PWRSRC_ULDO);
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}
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/* We are only interested in IRQ energest while idle or in LPM */
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ENERGEST_IRQ_RESTORE(irq_energest);
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ENERGEST_OFF(ENERGEST_TYPE_CPU);
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ENERGEST_ON(ENERGEST_TYPE_LPM);
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/* Sync the AON interface to ensure all writes have gone through. */
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ti_lib_sys_ctrl_aon_sync();
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/*
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* Explicitly turn off VIMS cache, CRAM and TRAM. Needed because of
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* retention mismatch between VIMS logic and cache. We wait to do this
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* until right before deep sleep to be able to use the cache for as long
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* as possible.
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*/
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ti_lib_prcm_cache_retention_disable();
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ti_lib_vims_mode_set(VIMS_BASE, VIMS_MODE_OFF);
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/* Deep Sleep */
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ti_lib_prcm_deep_sleep();
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/*
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* When we reach here, some interrupt woke us up. The global interrupt
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* flag is off, hence we have a chance to run things here. We will wake up
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* the chip properly, and then we will enable the global interrupt without
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* unpending events so the handlers can fire
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*/
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wake_up();
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ti_lib_int_master_enable();
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}
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}
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/*---------------------------------------------------------------------------*/
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void
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lpm_sleep(void)
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{
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ENERGEST_OFF(ENERGEST_TYPE_CPU);
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ENERGEST_ON(ENERGEST_TYPE_LPM);
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/* We are only interested in IRQ energest while idle or in LPM */
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ENERGEST_IRQ_RESTORE(irq_energest);
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/* Just to be on the safe side, explicitly disable Deep Sleep */
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HWREG(NVIC_SYS_CTRL) &= ~(NVIC_SYS_CTRL_SLEEPDEEP);
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ti_lib_prcm_sleep();
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/* Remember IRQ energest for next pass */
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ENERGEST_IRQ_SAVE(irq_energest);
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ENERGEST_ON(ENERGEST_TYPE_CPU);
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ENERGEST_OFF(ENERGEST_TYPE_LPM);
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}
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/*---------------------------------------------------------------------------*/
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void
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lpm_register_module(lpm_registered_module_t *module)
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{
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list_add(modules_list, module);
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}
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/*---------------------------------------------------------------------------*/
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void
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lpm_unregister_module(lpm_registered_module_t *module)
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{
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list_remove(modules_list, module);
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}
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/*---------------------------------------------------------------------------*/
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void
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lpm_init()
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{
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list_init(modules_list);
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|
|
/* Always wake up on any DIO edge detection */
|
|
ti_lib_aon_event_mcu_wake_up_set(AON_EVENT_MCU_WU2, AON_EVENT_IO);
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
void
|
|
lpm_pin_set_default_state(uint32_t ioid)
|
|
{
|
|
if(ioid == IOID_UNUSED) {
|
|
return;
|
|
}
|
|
|
|
ti_lib_ioc_port_configure_set(ioid, IOC_PORT_GPIO, IOC_STD_OUTPUT);
|
|
ti_lib_gpio_dir_mode_set((1 << ioid), GPIO_DIR_MODE_IN);
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
/**
|
|
* @}
|
|
* @}
|
|
*/
|