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bump libmc1322x to 7bee48243c
Conflicts:
cpu/mc1322x/board/Makefile.board
cpu/mc1322x/lib/include/uart.h
cpu/mc1322x/lib/uart1.c
cpu/mc1322x/lib/uart2.c
cpu/mc1322x/src/default_lowlevel.c
186 lines
4.9 KiB
C
186 lines
4.9 KiB
C
/*
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* Copyright (c) 2010, Mariano Alvira <mar@devl.org> and other contributors
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* to the MC1322x project (http://mc1322x.devl.org)
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Institute nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* This file is part of libmc1322x: see http://mc1322x.devl.org
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* for details.
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*
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*
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*/
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#ifndef ADC_H
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#define ADC_H
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#include <stdint.h>
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#include "utils.h"
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/* the Vbatt measurment reads about 200mV low --- trim by ADC_VBATT_TRIM */
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/* correction tracks well --- within 50mV over 2.1V to 3.6V */
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/* offset from correct for tags running from 3.29 vreg */
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/* trim = 146 */
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/* tag 1: -90mV */
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/* tag 2: -30mV */
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/* tag 3: -30mV */
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/* tag 4: -40mV */
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/* tag 5: +10mV */
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/* tag 6: -40mV */
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/* new trim 183 */
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/* without per unit calibration, vbatt is probably +/- 75mV */
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#define ADC_VBATT_TRIM 183
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/* ADC registers are all 16-bit wide with 16-bit access only */
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#define ADC_BASE (0x8000D000)
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/* Structure-based register definitions */
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struct ADC_struct {
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union {
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uint16_t COMP[8];
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struct {
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uint16_t COMP_0;
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uint16_t COMP_1;
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uint16_t COMP_2;
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uint16_t COMP_3;
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uint16_t COMP_4;
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uint16_t COMP_5;
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uint16_t COMP_6;
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uint16_t COMP_7;
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};
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};
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uint16_t BAT_COMP_OVER;
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uint16_t BAT_COMP_UNDER;
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union {
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uint16_t SEQ_1;
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struct ADC_SEQ_1 {
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uint16_t CH0:1;
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uint16_t CH1:1;
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uint16_t CH2:1;
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uint16_t CH3:1;
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uint16_t CH4:1;
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uint16_t CH5:1;
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uint16_t CH6:1;
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uint16_t CH7:1;
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uint16_t BATT:1;
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uint16_t :6;
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uint16_t SEQ_MODE:1;
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} SEQ_1bits;
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};
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union {
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uint16_t SEQ_2;
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struct ADC_SEQ_2 {
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uint16_t CH0:1;
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uint16_t CH1:1;
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uint16_t CH2:1;
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uint16_t CH3:1;
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uint16_t CH4:1;
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uint16_t CH5:1;
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uint16_t CH6:1;
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uint16_t CH7:1;
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uint16_t :7;
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uint16_t SEQ_MODE:1;
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} SEQ_2bits;
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};
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union {
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uint16_t CONTROL;
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struct ADC_CONTROL {
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uint16_t ON:1;
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uint16_t TIMER1_ON:1;
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uint16_t TIMER2_ON:1;
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uint16_t SOFT_RESET:1;
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uint16_t AD1_VREFHL_EN:1;
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uint16_t AD2_VREFHL_EN:1;
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uint16_t :6;
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uint16_t COMPARE_IRQ_MASK:1;
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uint16_t SEQ1_IRQ_MASK:1;
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uint16_t SEQ2_IRQ_MASK:1;
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uint16_t FIFO_IRQ_MASK:1;
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} CONTROLbits;
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};
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uint16_t TRIGGERS;
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uint16_t PRESCALE;
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uint16_t reserved1;
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uint16_t FIFO_READ;
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uint16_t FIFO_CONTROL;
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union {
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uint16_t FIFO_STATUS;
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struct ADC_FIFO_STATUS {
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uint16_t LEVEL:4;
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uint16_t FULL:1;
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uint16_t EMPTY:1;
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uint16_t :10;
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} FIFO_STATUSbits;
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};
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uint16_t reserved2[5];
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uint16_t SR_1_HIGH;
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uint16_t SR_1_LOW;
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uint16_t SR_2_HIGH;
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uint16_t SR_2_LOW;
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uint16_t ON_TIME;
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uint16_t CONVERT_TIME;
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uint16_t CLOCK_DIVIDER;
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uint16_t reserved3;
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union {
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uint16_t OVERRIDE;
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struct ADC_OVERRIDE {
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uint16_t MUX1:4;
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uint16_t MUX2:4;
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uint16_t AD1_ON:1;
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uint16_t AD2_ON:1;
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uint16_t :6;
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} OVERRIDEbits;
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};
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uint16_t IRQ;
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uint16_t MODE;
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uint16_t RESULT_1;
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uint16_t RESULT_2;
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};
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static volatile struct ADC_struct * const ADC = (void *) (ADC_BASE);
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#define NUM_ADC_CHAN 9
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#define adc_enable() (ADC->CONTROLbits.ON = 1)
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#define adc_disable() (ADC->CONTROLbits.ON = 0)
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#define adc_select_channels(chans) (ADC->SEQ_1 = (ADC->SEQ_1 & 0xFE00) | chans)
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void adc_setup_chan(uint8_t channel);
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extern uint16_t adc_reading[NUM_ADC_CHAN];
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/* use the internal reference to return adc_readings in mV */
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#define adc_voltage(x) (adc_reading[x] * 1200/adc_reading[8])
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/* return vbatt voltage in mV */
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#define adc_vbatt 4095 * 1200/adc_reading[8] + ADC_VBATT_TRIM
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void ADC_flush(void);
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uint16_t ADC_READ(void);
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void read_scanners(void);
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void adc_init(void);
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void adc_service(void);
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#endif
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