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577215deca
Generalize DEBUGFLOW macro for use in multiple routines.
228 lines
6.3 KiB
C
228 lines
6.3 KiB
C
/*
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* Copyright (c) 2007, Swedish Institute of Computer Science.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Institute nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* This file is part of the Contiki operating system.
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*
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* $Id: rtimer-arch.c,v 1.10 2010/02/28 21:29:19 dak664 Exp $
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*/
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/**
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* \file
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* AVR-specific rtimer code
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* Defaults to Timer3 for those ATMEGAs that have it.
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* If Timer3 not present Timer1 will be used.
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* \author
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* Fredrik Osterlind <fros@sics.se>
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* Joakim Eriksson <joakime@sics.se>
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*/
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/* OBS: 8 seconds maximum time! */
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#include <avr/io.h>
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#include <avr/interrupt.h>
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#include <stdio.h>
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#include "sys/energest.h"
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#include "sys/rtimer.h"
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#include "rtimer-arch.h"
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#if defined(__AVR_ATmega1281__) || defined(__AVR_ATmega1284P__)
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#define ETIMSK TIMSK3
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#define ETIFR TIFR3
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#define TICIE3 ICIE3
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//Has no 'C', so we just set it to B. The code doesn't really use C so this
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//is safe to do but lets it compile. Probably should enable the warning if
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//it is ever used on other platforms.
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//#warning no OCIE3C in timer3 architecture, hopefully it won't be needed!
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#define OCIE3C OCIE3B
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#define OCF3C OCF3B
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#endif
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#if defined(__AVR_AT90USB1287__) || defined(__AVR_ATmega128RFA1__)
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#define ETIMSK TIMSK3
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#define ETIFR TIFR3
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#define TICIE3 ICIE3
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#endif
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#if defined(__AVR_ATmega328P__) || defined(__AVR_ATmega644__)
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#define TIMSK TIMSK1
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#define TICIE1 ICIE1
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#define TIFR TIFR1
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#endif
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/* Track flow through rtimer interrupts*/
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#if DEBUGFLOWSIZE&&0
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extern uint8_t debugflowsize,debugflow[DEBUGFLOWSIZE];
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#define DEBUGFLOW(c) if (debugflowsize<(DEBUGFLOWSIZE-1)) debugflow[debugflowsize++]=c
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#else
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#define DEBUGFLOW(c)
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#endif
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/*---------------------------------------------------------------------------*/
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#if defined(TCNT3) && RTIMER_ARCH_PRESCALER
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ISR (TIMER3_COMPA_vect) {
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DEBUGFLOW('/');
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ENERGEST_ON(ENERGEST_TYPE_IRQ);
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/* Disable rtimer interrupts */
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ETIMSK &= ~((1 << OCIE3A) | (1 << OCIE3B) | (1 << TOIE3) |
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(1 << TICIE3) | (1 << OCIE3C));
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#if RTIMER_CONF_NESTED_INTERRUPTS
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/* Enable nested interrupts. Allows radio interrupt during rtimer interrupt. */
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/* All interrupts are enabled including recursive rtimer, so use with caution */
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sei();
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#endif
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/* Call rtimer callback */
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rtimer_run_next();
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ENERGEST_OFF(ENERGEST_TYPE_IRQ);
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DEBUGFLOW('\\');
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}
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#elif RTIMER_ARCH_PRESCALER
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#warning "No Timer3 in rtimer-arch.c - using Timer1 instead"
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ISR (TIMER1_COMPA_vect) {
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DEBUGFLOW('/');
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TIMSK &= ~((1<<TICIE1)|(1<<OCIE1A)|(1<<OCIE1B)|(1<<TOIE1));
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rtimer_run_next();
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DEBUGFLOW('\\');
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}
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#endif
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/*---------------------------------------------------------------------------*/
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void
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rtimer_arch_init(void)
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{
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#if RTIMER_ARCH_PRESCALER
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/* Disable interrupts (store old state) */
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uint8_t sreg;
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sreg = SREG;
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cli ();
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#ifdef TCNT3
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/* Disable all timer functions */
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ETIMSK &= ~((1 << OCIE3A) | (1 << OCIE3B) | (1 << TOIE3) |
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(1 << TICIE3) | (1 << OCIE3C));
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/* Write 1s to clear existing timer function flags */
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ETIFR |= (1 << ICF3) | (1 << OCF3A) | (1 << OCF3B) | (1 << TOV3) |
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(1 << OCF3C);
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/* Default timer behaviour */
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TCCR3A = 0;
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TCCR3B = 0;
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TCCR3C = 0;
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/* Reset counter */
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TCNT3 = 0;
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#if RTIMER_ARCH_PRESCALER==1024
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TCCR3B |= 5;
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#elif RTIMER_ARCH_PRESCALER==256
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TCCR3B |= 4;
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#elif RTIMER_ARCH_PRESCALER==64
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TCCR3B |= 3;
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#elif RTIMER_ARCH_PRESCALER==8
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TCCR3B |= 2;
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#elif RTIMER_ARCH_PRESCALER==1
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TCCR3B |= 1;
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#else
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#error Timer3 PRESCALER factor not supported.
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#endif
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#elif RTIMER_ARCH_PRESCALER
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/* Leave timer1 alone if PRESCALER set to zero */
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/* Obviously you can not then use rtimers */
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TIMSK &= ~((1<<TICIE1)|(1<<OCIE1A)|(1<<OCIE1B)|(1<<TOIE1));
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TIFR |= (1 << ICF1) | (1 << OCF1A) | (1 << OCF1B) | (1 << TOV1);
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/* Default timer behaviour */
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TCCR1A = 0;
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TCCR1B = 0;
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/* Reset counter */
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TCNT1 = 0;
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/* Start clock */
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#if RTIMER_ARCH_PRESCALER==1024
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TCCR1B |= 5;
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#elif RTIMER_ARCH_PRESCALER==256
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TCCR1B |= 4;
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#elif RTIMER_ARCH_PRESCALER==64
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TCCR1B |= 3;
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#elif RTIMER_ARCH_PRESCALER==8
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TCCR1B |= 2;
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#elif RTIMER_ARCH_PRESCALER==1
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TCCR1B |= 1;
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#else
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#error Timer1 PRESCALER factor not supported.
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#endif
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#endif /* TCNT3 */
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/* Restore interrupt state */
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SREG = sreg;
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#endif /* RTIMER_ARCH_PRESCALER */
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}
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/*---------------------------------------------------------------------------*/
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void
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rtimer_arch_schedule(rtimer_clock_t t)
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{
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#if RTIMER_ARCH_PRESCALER
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/* Disable interrupts (store old state) */
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uint8_t sreg;
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sreg = SREG;
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cli ();
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DEBUGFLOW(':');
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#ifdef TCNT3
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/* Set compare register */
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OCR3A = t;
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/* Write 1s to clear all timer function flags */
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ETIFR |= (1 << ICF3) | (1 << OCF3A) | (1 << OCF3B) | (1 << TOV3) |
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(1 << OCF3C);
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/* Enable interrupt on OCR3A match */
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ETIMSK |= (1 << OCIE3A);
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#elif RTIMER_ARCH_PRESCALER
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/* Set compare register */
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OCR1A = t;
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TIFR |= (1 << ICF1) | (1 << OCF1A) | (1 << OCF1B) | (1 << TOV1);
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TIMSK |= (1 << OCIE1A);
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#endif
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/* Restore interrupt state */
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SREG = sreg;
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#endif /* RTIMER_ARCH_PRESCALER */
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}
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