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759 lines
21 KiB
C
759 lines
21 KiB
C
/*
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* Copyright (c) 2012, Texas Instruments Incorporated - http://www.ti.com/
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/**
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* \addtogroup cc2538-rf
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* @{
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*
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* \file
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* Implementation of the cc2538 RF driver
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*/
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#include "contiki.h"
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#include "dev/radio.h"
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#include "sys/clock.h"
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#include "sys/rtimer.h"
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#include "net/packetbuf.h"
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#include "net/rime/rimestats.h"
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#include "net/linkaddr.h"
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#include "net/netstack.h"
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#include "sys/energest.h"
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#include "dev/cc2538-rf.h"
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#include "dev/rfcore.h"
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#include "dev/sys-ctrl.h"
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#include "dev/udma.h"
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#include "reg.h"
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#include <string.h>
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/*---------------------------------------------------------------------------*/
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#define CHECKSUM_LEN 2
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/* uDMA channel control persistent flags */
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#define UDMA_TX_FLAGS (UDMA_CHCTL_ARBSIZE_128 | UDMA_CHCTL_XFERMODE_AUTO \
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| UDMA_CHCTL_SRCSIZE_8 | UDMA_CHCTL_DSTSIZE_8 \
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| UDMA_CHCTL_SRCINC_8 | UDMA_CHCTL_DSTINC_NONE)
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#define UDMA_RX_FLAGS (UDMA_CHCTL_ARBSIZE_128 | UDMA_CHCTL_XFERMODE_AUTO \
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| UDMA_CHCTL_SRCSIZE_8 | UDMA_CHCTL_DSTSIZE_8 \
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| UDMA_CHCTL_SRCINC_NONE | UDMA_CHCTL_DSTINC_8)
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/*
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* uDMA transfer threshold. DMA will only be used to read an incoming frame
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* if its size is above this threshold
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*/
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#define UDMA_RX_SIZE_THRESHOLD 3
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/*---------------------------------------------------------------------------*/
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#include <stdio.h>
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#define DEBUG 0
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#if DEBUG
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#define PRINTF(...) printf(__VA_ARGS__)
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#else
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#define PRINTF(...)
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#endif
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/*---------------------------------------------------------------------------*/
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/* Local RF Flags */
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#define RX_ACTIVE 0x80
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#define RF_MUST_RESET 0x40
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#define WAS_OFF 0x10
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#define RF_ON 0x01
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/* Bit Masks for the last byte in the RX FIFO */
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#define CRC_BIT_MASK 0x80
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#define LQI_BIT_MASK 0x7F
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/* RSSI Offset */
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#define RSSI_OFFSET 73
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/* 192 usec off -> on interval (RX Callib -> SFD Wait). We wait a bit more */
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#define ONOFF_TIME RTIMER_ARCH_SECOND / 3125
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/*---------------------------------------------------------------------------*/
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/* Sniffer configuration */
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#ifndef CC2538_RF_CONF_SNIFFER_USB
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#define CC2538_RF_CONF_SNIFFER_USB 0
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#endif
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#if CC2538_RF_CONF_SNIFFER
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static const uint8_t magic[] = { 0x53, 0x6E, 0x69, 0x66 }; /** Snif */
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#if CC2538_RF_CONF_SNIFFER_USB
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#include "usb/usb-serial.h"
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#define write_byte(b) usb_serial_writeb(b)
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#define flush() usb_serial_flush()
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#else
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#include "dev/uart.h"
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#define write_byte(b) uart_write_byte(b)
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#define flush()
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#endif
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#else /* CC2538_RF_CONF_SNIFFER */
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#define write_byte(b)
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#define flush()
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#endif /* CC2538_RF_CONF_SNIFFER */
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/*---------------------------------------------------------------------------*/
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#ifdef CC2538_RF_CONF_AUTOACK
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#define CC2538_RF_AUTOACK CC2538_RF_CONF_AUTOACK
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#else
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#define CC2538_RF_AUTOACK 1
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#endif
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/*---------------------------------------------------------------------------*/
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static uint8_t rf_flags;
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static int on(void);
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static int off(void);
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/*---------------------------------------------------------------------------*/
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PROCESS(cc2538_rf_process, "cc2538 RF driver");
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/*---------------------------------------------------------------------------*/
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uint8_t
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cc2538_rf_channel_get()
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{
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uint8_t chan = REG(RFCORE_XREG_FREQCTRL) & RFCORE_XREG_FREQCTRL_FREQ;
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return ((chan - CC2538_RF_CHANNEL_MIN) / CC2538_RF_CHANNEL_SPACING
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+ CC2538_RF_CHANNEL_MIN);
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}
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/*---------------------------------------------------------------------------*/
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int8_t
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cc2538_rf_channel_set(uint8_t channel)
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{
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PRINTF("RF: Set Channel\n");
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if((channel < CC2538_RF_CHANNEL_MIN) || (channel > CC2538_RF_CHANNEL_MAX)) {
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return -1;
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}
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/* Changes to FREQCTRL take effect after the next recalibration */
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off();
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REG(RFCORE_XREG_FREQCTRL) = (CC2538_RF_CHANNEL_MIN
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+ (channel - CC2538_RF_CHANNEL_MIN) * CC2538_RF_CHANNEL_SPACING);
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on();
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return (int8_t) channel;
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}
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/*---------------------------------------------------------------------------*/
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uint8_t
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cc2538_rf_power_set(uint8_t new_power)
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{
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PRINTF("RF: Set Power\n");
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REG(RFCORE_XREG_TXPOWER) = new_power;
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return (REG(RFCORE_XREG_TXPOWER) & 0xFF);
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}
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/*---------------------------------------------------------------------------*/
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/* ToDo: Check once we have info on the... infopage */
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void
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cc2538_rf_set_addr(uint16_t pan)
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{
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#if LINKADDR_SIZE==8
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/* EXT_ADDR[7:0] is ignored when using short addresses */
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int i;
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for(i = (LINKADDR_SIZE - 1); i >= 0; --i) {
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((uint32_t *)RFCORE_FFSM_EXT_ADDR0)[i] =
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linkaddr_node_addr.u8[LINKADDR_SIZE - 1 - i];
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}
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#endif
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REG(RFCORE_FFSM_PAN_ID0) = pan & 0xFF;
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REG(RFCORE_FFSM_PAN_ID1) = pan >> 8;
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REG(RFCORE_FFSM_SHORT_ADDR0) = linkaddr_node_addr.u8[LINKADDR_SIZE - 1];
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REG(RFCORE_FFSM_SHORT_ADDR1) = linkaddr_node_addr.u8[LINKADDR_SIZE - 2];
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}
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/*---------------------------------------------------------------------------*/
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int
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cc2538_rf_read_rssi(void)
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{
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int rssi;
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/* If we are off, turn on first */
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if((REG(RFCORE_XREG_FSMSTAT0) & RFCORE_XREG_FSMSTAT0_FSM_FFCTRL_STATE) == 0) {
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rf_flags |= WAS_OFF;
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on();
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}
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/* Wait on RSSI_VALID */
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while((REG(RFCORE_XREG_RSSISTAT) & RFCORE_XREG_RSSISTAT_RSSI_VALID) == 0);
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rssi = ((int8_t)REG(RFCORE_XREG_RSSI)) - RSSI_OFFSET;
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/* If we were off, turn back off */
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if((rf_flags & WAS_OFF) == WAS_OFF) {
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rf_flags &= ~WAS_OFF;
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off();
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}
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return rssi;
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}
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/*---------------------------------------------------------------------------*/
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/* Netstack API radio driver functions */
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/*---------------------------------------------------------------------------*/
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static int
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channel_clear(void)
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{
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int cca;
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PRINTF("RF: CCA\n");
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/* If we are off, turn on first */
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if((REG(RFCORE_XREG_FSMSTAT0) & RFCORE_XREG_FSMSTAT0_FSM_FFCTRL_STATE) == 0) {
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rf_flags |= WAS_OFF;
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on();
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}
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/* Wait on RSSI_VALID */
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while((REG(RFCORE_XREG_RSSISTAT) & RFCORE_XREG_RSSISTAT_RSSI_VALID) == 0);
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if(REG(RFCORE_XREG_FSMSTAT1) & RFCORE_XREG_FSMSTAT1_CCA) {
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cca = CC2538_RF_CCA_CLEAR;
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} else {
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cca = CC2538_RF_CCA_BUSY;
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}
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/* If we were off, turn back off */
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if((rf_flags & WAS_OFF) == WAS_OFF) {
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rf_flags &= ~WAS_OFF;
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off();
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}
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return cca;
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}
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/*---------------------------------------------------------------------------*/
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static int
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on(void)
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{
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PRINTF("RF: On\n");
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if(!(rf_flags & RX_ACTIVE)) {
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CC2538_RF_CSP_ISFLUSHRX();
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CC2538_RF_CSP_ISRXON();
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rf_flags |= RX_ACTIVE;
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}
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ENERGEST_ON(ENERGEST_TYPE_LISTEN);
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return 1;
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}
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/*---------------------------------------------------------------------------*/
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static int
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off(void)
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{
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PRINTF("RF: Off\n");
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/* Wait for ongoing TX to complete (e.g. this could be an outgoing ACK) */
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while(REG(RFCORE_XREG_FSMSTAT1) & RFCORE_XREG_FSMSTAT1_TX_ACTIVE);
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CC2538_RF_CSP_ISFLUSHRX();
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/* Don't turn off if we are off as this will trigger a Strobe Error */
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if(REG(RFCORE_XREG_RXENABLE) != 0) {
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CC2538_RF_CSP_ISRFOFF();
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}
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rf_flags &= ~RX_ACTIVE;
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ENERGEST_OFF(ENERGEST_TYPE_LISTEN);
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return 1;
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}
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/*---------------------------------------------------------------------------*/
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static int
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init(void)
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{
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PRINTF("RF: Init\n");
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if(rf_flags & RF_ON) {
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return 0;
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}
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/* Enable clock for the RF Core while Running, in Sleep and Deep Sleep */
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REG(SYS_CTRL_RCGCRFC) = 1;
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REG(SYS_CTRL_SCGCRFC) = 1;
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REG(SYS_CTRL_DCGCRFC) = 1;
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REG(RFCORE_XREG_CCACTRL0) = CC2538_RF_CCA_THRES_USER_GUIDE;
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/*
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* Changes from default values
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* See User Guide, section "Register Settings Update"
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*/
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REG(RFCORE_XREG_TXFILTCFG) = 0x09; /** TX anti-aliasing filter bandwidth */
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REG(RFCORE_XREG_AGCCTRL1) = 0x15; /** AGC target value */
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REG(ANA_REGS_IVCTRL) = 0x0B; /** Bias currents */
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/*
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* Defaults:
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* Auto CRC; Append RSSI, CRC-OK and Corr. Val.; CRC calculation;
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* RX and TX modes with FIFOs
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*/
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REG(RFCORE_XREG_FRMCTRL0) = RFCORE_XREG_FRMCTRL0_AUTOCRC;
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#if CC2538_RF_AUTOACK
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REG(RFCORE_XREG_FRMCTRL0) |= RFCORE_XREG_FRMCTRL0_AUTOACK;
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#endif
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/* If we are a sniffer, turn off frame filtering */
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#if CC2538_RF_CONF_SNIFFER
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REG(RFCORE_XREG_FRMFILT0) &= ~RFCORE_XREG_FRMFILT0_FRAME_FILTER_EN;
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#endif
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/* Disable source address matching and autopend */
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REG(RFCORE_XREG_SRCMATCH) = 0;
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/* MAX FIFOP threshold */
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REG(RFCORE_XREG_FIFOPCTRL) = CC2538_RF_MAX_PACKET_LEN;
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cc2538_rf_power_set(CC2538_RF_TX_POWER);
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cc2538_rf_channel_set(CC2538_RF_CHANNEL);
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/* Acknowledge RF interrupts, FIFOP only */
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REG(RFCORE_XREG_RFIRQM0) |= RFCORE_XREG_RFIRQM0_FIFOP;
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nvic_interrupt_enable(NVIC_INT_RF_RXTX);
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/* Acknowledge all RF Error interrupts */
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REG(RFCORE_XREG_RFERRM) = RFCORE_XREG_RFERRM_RFERRM;
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nvic_interrupt_enable(NVIC_INT_RF_ERR);
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if(CC2538_RF_CONF_TX_USE_DMA) {
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/* Disable peripheral triggers for the channel */
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udma_channel_mask_set(CC2538_RF_CONF_TX_DMA_CHAN);
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/*
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* Set the channel's DST. SRC can not be set yet since it will change for
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* each transfer
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*/
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udma_set_channel_dst(CC2538_RF_CONF_TX_DMA_CHAN, RFCORE_SFR_RFDATA);
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}
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if(CC2538_RF_CONF_RX_USE_DMA) {
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/* Disable peripheral triggers for the channel */
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udma_channel_mask_set(CC2538_RF_CONF_RX_DMA_CHAN);
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/*
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* Set the channel's SRC. DST can not be set yet since it will change for
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* each transfer
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*/
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udma_set_channel_src(CC2538_RF_CONF_RX_DMA_CHAN, RFCORE_SFR_RFDATA);
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}
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process_start(&cc2538_rf_process, NULL);
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rf_flags |= RF_ON;
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ENERGEST_ON(ENERGEST_TYPE_LISTEN);
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return 1;
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}
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/*---------------------------------------------------------------------------*/
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static int
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prepare(const void *payload, unsigned short payload_len)
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{
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uint8_t i;
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PRINTF("RF: Prepare 0x%02x bytes\n", payload_len + CHECKSUM_LEN);
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/*
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* When we transmit in very quick bursts, make sure previous transmission
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* is not still in progress before re-writing to the TX FIFO
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*/
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while(REG(RFCORE_XREG_FSMSTAT1) & RFCORE_XREG_FSMSTAT1_TX_ACTIVE);
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if((rf_flags & RX_ACTIVE) == 0) {
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on();
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}
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CC2538_RF_CSP_ISFLUSHTX();
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PRINTF("RF: data = ");
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/* Send the phy length byte first */
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REG(RFCORE_SFR_RFDATA) = payload_len + CHECKSUM_LEN;
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if(CC2538_RF_CONF_TX_USE_DMA) {
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PRINTF("<uDMA payload>");
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/* Set the transfer source's end address */
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udma_set_channel_src(CC2538_RF_CONF_TX_DMA_CHAN,
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(uint32_t)(payload) + payload_len - 1);
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/* Configure the control word */
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udma_set_channel_control_word(CC2538_RF_CONF_TX_DMA_CHAN,
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UDMA_TX_FLAGS | udma_xfer_size(payload_len));
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/* Enabled the RF TX uDMA channel */
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udma_channel_enable(CC2538_RF_CONF_TX_DMA_CHAN);
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/* Trigger the uDMA transfer */
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udma_channel_sw_request(CC2538_RF_CONF_TX_DMA_CHAN);
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/*
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* No need to wait for this to end. Even if transmit() gets called
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* immediately, the uDMA controller will stream the frame to the TX FIFO
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* faster than transmit() can empty it
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*/
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} else {
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for(i = 0; i < payload_len; i++) {
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REG(RFCORE_SFR_RFDATA) = ((unsigned char *)(payload))[i];
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PRINTF("%02x", ((unsigned char *)(payload))[i]);
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}
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}
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PRINTF("\n");
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return 0;
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}
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/*---------------------------------------------------------------------------*/
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static int
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transmit(unsigned short transmit_len)
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{
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uint8_t counter;
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int ret = RADIO_TX_ERR;
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rtimer_clock_t t0;
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PRINTF("RF: Transmit\n");
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if(!(rf_flags & RX_ACTIVE)) {
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t0 = RTIMER_NOW();
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on();
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rf_flags |= WAS_OFF;
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while(RTIMER_CLOCK_LT(RTIMER_NOW(), t0 + ONOFF_TIME));
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}
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if(channel_clear() == CC2538_RF_CCA_BUSY) {
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RIMESTATS_ADD(contentiondrop);
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return RADIO_TX_COLLISION;
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}
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/*
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* prepare() double checked that TX_ACTIVE is low. If SFD is high we are
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* receiving. Abort transmission and bail out with RADIO_TX_COLLISION
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*/
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if(REG(RFCORE_XREG_FSMSTAT1) & RFCORE_XREG_FSMSTAT1_SFD) {
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RIMESTATS_ADD(contentiondrop);
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return RADIO_TX_COLLISION;
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}
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/* Start the transmission */
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ENERGEST_OFF(ENERGEST_TYPE_LISTEN);
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ENERGEST_ON(ENERGEST_TYPE_TRANSMIT);
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CC2538_RF_CSP_ISTXON();
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counter = 0;
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while(!((REG(RFCORE_XREG_FSMSTAT1) & RFCORE_XREG_FSMSTAT1_TX_ACTIVE))
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&& (counter++ < 3)) {
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clock_delay_usec(6);
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}
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if(!(REG(RFCORE_XREG_FSMSTAT1) & RFCORE_XREG_FSMSTAT1_TX_ACTIVE)) {
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PRINTF("RF: TX never active.\n");
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CC2538_RF_CSP_ISFLUSHTX();
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ret = RADIO_TX_ERR;
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} else {
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/* Wait for the transmission to finish */
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while(REG(RFCORE_XREG_FSMSTAT1) & RFCORE_XREG_FSMSTAT1_TX_ACTIVE);
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ret = RADIO_TX_OK;
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}
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ENERGEST_OFF(ENERGEST_TYPE_TRANSMIT);
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ENERGEST_ON(ENERGEST_TYPE_LISTEN);
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if(rf_flags & WAS_OFF) {
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rf_flags &= ~WAS_OFF;
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off();
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}
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RIMESTATS_ADD(lltx);
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return ret;
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}
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|
/*---------------------------------------------------------------------------*/
|
|
static int
|
|
send(const void *payload, unsigned short payload_len)
|
|
{
|
|
prepare(payload, payload_len);
|
|
return transmit(payload_len);
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
static int
|
|
read(void *buf, unsigned short bufsize)
|
|
{
|
|
uint8_t i;
|
|
uint8_t len;
|
|
uint8_t crc_corr;
|
|
int8_t rssi;
|
|
|
|
PRINTF("RF: Read\n");
|
|
|
|
if((REG(RFCORE_XREG_FSMSTAT1) & RFCORE_XREG_FSMSTAT1_FIFOP) == 0) {
|
|
return 0;
|
|
}
|
|
|
|
/* Check the length */
|
|
len = REG(RFCORE_SFR_RFDATA);
|
|
|
|
/* Check for validity */
|
|
if(len > CC2538_RF_MAX_PACKET_LEN) {
|
|
/* Oops, we must be out of sync. */
|
|
PRINTF("RF: bad sync\n");
|
|
|
|
RIMESTATS_ADD(badsynch);
|
|
CC2538_RF_CSP_ISFLUSHRX();
|
|
return 0;
|
|
}
|
|
|
|
if(len <= CC2538_RF_MIN_PACKET_LEN) {
|
|
PRINTF("RF: too short\n");
|
|
|
|
RIMESTATS_ADD(tooshort);
|
|
CC2538_RF_CSP_ISFLUSHRX();
|
|
return 0;
|
|
}
|
|
|
|
if(len - CHECKSUM_LEN > bufsize) {
|
|
PRINTF("RF: too long\n");
|
|
|
|
RIMESTATS_ADD(toolong);
|
|
CC2538_RF_CSP_ISFLUSHRX();
|
|
return 0;
|
|
}
|
|
|
|
/* If we reach here, chances are the FIFO is holding a valid frame */
|
|
PRINTF("RF: read (0x%02x bytes) = ", len);
|
|
len -= CHECKSUM_LEN;
|
|
|
|
/* Don't bother with uDMA for short frames (e.g. ACKs) */
|
|
if(CC2538_RF_CONF_RX_USE_DMA && len > UDMA_RX_SIZE_THRESHOLD) {
|
|
PRINTF("<uDMA payload>");
|
|
|
|
/* Set the transfer destination's end address */
|
|
udma_set_channel_dst(CC2538_RF_CONF_RX_DMA_CHAN,
|
|
(uint32_t)(buf) + len - 1);
|
|
|
|
/* Configure the control word */
|
|
udma_set_channel_control_word(CC2538_RF_CONF_RX_DMA_CHAN,
|
|
UDMA_RX_FLAGS | udma_xfer_size(len));
|
|
|
|
/* Enabled the RF RX uDMA channel */
|
|
udma_channel_enable(CC2538_RF_CONF_RX_DMA_CHAN);
|
|
|
|
/* Trigger the uDMA transfer */
|
|
udma_channel_sw_request(CC2538_RF_CONF_RX_DMA_CHAN);
|
|
|
|
/* Wait for the transfer to complete. */
|
|
while(udma_channel_get_mode(CC2538_RF_CONF_RX_DMA_CHAN));
|
|
} else {
|
|
for(i = 0; i < len; ++i) {
|
|
((unsigned char *)(buf))[i] = REG(RFCORE_SFR_RFDATA);
|
|
PRINTF("%02x", ((unsigned char *)(buf))[i]);
|
|
}
|
|
}
|
|
|
|
/* Read the RSSI and CRC/Corr bytes */
|
|
rssi = ((int8_t)REG(RFCORE_SFR_RFDATA)) - RSSI_OFFSET;
|
|
crc_corr = REG(RFCORE_SFR_RFDATA);
|
|
|
|
PRINTF("%02x%02x\n", (uint8_t)rssi, crc_corr);
|
|
|
|
/* MS bit CRC OK/Not OK, 7 LS Bits, Correlation value */
|
|
if(crc_corr & CRC_BIT_MASK) {
|
|
packetbuf_set_attr(PACKETBUF_ATTR_RSSI, rssi);
|
|
packetbuf_set_attr(PACKETBUF_ATTR_LINK_QUALITY, crc_corr & LQI_BIT_MASK);
|
|
RIMESTATS_ADD(llrx);
|
|
} else {
|
|
RIMESTATS_ADD(badcrc);
|
|
PRINTF("RF: Bad CRC\n");
|
|
CC2538_RF_CSP_ISFLUSHRX();
|
|
return 0;
|
|
}
|
|
|
|
#if CC2538_RF_CONF_SNIFFER
|
|
write_byte(magic[0]);
|
|
write_byte(magic[1]);
|
|
write_byte(magic[2]);
|
|
write_byte(magic[3]);
|
|
write_byte(len + 2);
|
|
for(i = 0; i < len; ++i) {
|
|
write_byte(((unsigned char *)(buf))[i]);
|
|
}
|
|
write_byte(rssi);
|
|
write_byte(crc_corr);
|
|
flush();
|
|
#endif
|
|
|
|
/* If FIFOP==1 and FIFO==0 then we had a FIFO overflow at some point. */
|
|
if(REG(RFCORE_XREG_FSMSTAT1) & RFCORE_XREG_FSMSTAT1_FIFOP) {
|
|
if(REG(RFCORE_XREG_FSMSTAT1) & RFCORE_XREG_FSMSTAT1_FIFO) {
|
|
process_poll(&cc2538_rf_process);
|
|
} else {
|
|
CC2538_RF_CSP_ISFLUSHRX();
|
|
}
|
|
}
|
|
|
|
return (len);
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
static int
|
|
receiving_packet(void)
|
|
{
|
|
PRINTF("RF: Receiving\n");
|
|
|
|
/*
|
|
* SFD high while transmitting and receiving.
|
|
* TX_ACTIVE high only when transmitting
|
|
*
|
|
* FSMSTAT1 & (TX_ACTIVE | SFD) == SFD <=> receiving
|
|
*/
|
|
return ((REG(RFCORE_XREG_FSMSTAT1)
|
|
& (RFCORE_XREG_FSMSTAT1_TX_ACTIVE | RFCORE_XREG_FSMSTAT1_SFD))
|
|
== RFCORE_XREG_FSMSTAT1_SFD);
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
static int
|
|
pending_packet(void)
|
|
{
|
|
PRINTF("RF: Pending\n");
|
|
|
|
return (REG(RFCORE_XREG_FSMSTAT1) & RFCORE_XREG_FSMSTAT1_FIFOP);
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
const struct radio_driver cc2538_rf_driver = {
|
|
init,
|
|
prepare,
|
|
transmit,
|
|
send,
|
|
read,
|
|
channel_clear,
|
|
receiving_packet,
|
|
pending_packet,
|
|
on,
|
|
off,
|
|
};
|
|
/*---------------------------------------------------------------------------*/
|
|
/**
|
|
* \brief Implementation of the cc2538 RF driver process
|
|
*
|
|
* This process is started by init(). It simply sits there waiting for
|
|
* an event. Upon frame reception, the RX ISR will poll this process.
|
|
* Subsequently, the contiki core will generate an event which will
|
|
* call this process so that the received frame can be picked up from
|
|
* the RF RX FIFO
|
|
*
|
|
*/
|
|
PROCESS_THREAD(cc2538_rf_process, ev, data)
|
|
{
|
|
int len;
|
|
PROCESS_BEGIN();
|
|
|
|
while(1) {
|
|
PROCESS_YIELD_UNTIL(ev == PROCESS_EVENT_POLL);
|
|
|
|
packetbuf_clear();
|
|
len = read(packetbuf_dataptr(), PACKETBUF_SIZE);
|
|
|
|
if(len > 0) {
|
|
packetbuf_set_datalen(len);
|
|
|
|
NETSTACK_RDC.input();
|
|
}
|
|
|
|
/* If we were polled due to an RF error, reset the transceiver */
|
|
if(rf_flags & RF_MUST_RESET) {
|
|
rf_flags = 0;
|
|
|
|
off();
|
|
init();
|
|
}
|
|
}
|
|
|
|
PROCESS_END();
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
/**
|
|
* \brief The cc2538 RF RX/TX ISR
|
|
*
|
|
* This is the interrupt service routine for all RF interrupts relating
|
|
* to RX and TX. Error conditions are handled by cc2538_rf_err_isr().
|
|
* Currently, we only acknowledge the FIFOP interrupt source.
|
|
*/
|
|
void
|
|
cc2538_rf_rx_tx_isr(void)
|
|
{
|
|
ENERGEST_ON(ENERGEST_TYPE_IRQ);
|
|
|
|
process_poll(&cc2538_rf_process);
|
|
|
|
/* We only acknowledge FIFOP so we can safely wipe out the entire SFR */
|
|
REG(RFCORE_SFR_RFIRQF0) = 0;
|
|
|
|
ENERGEST_OFF(ENERGEST_TYPE_IRQ);
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
/**
|
|
* \brief The cc2538 RF Error ISR
|
|
*
|
|
* This is the interrupt service routine for all RF errors. We
|
|
* acknowledge every error type and instead of trying to be smart and
|
|
* act differently depending on error condition, we simply reset the
|
|
* transceiver. RX FIFO overflow is an exception, we ignore this error
|
|
* since read() handles it anyway.
|
|
*
|
|
* However, we don't want to reset within this ISR. If the error occurs
|
|
* while we are reading a frame out of the FIFO, trashing the FIFO in
|
|
* the middle of read(), would result in further errors (RX underflows).
|
|
*
|
|
* Instead, we set a flag and poll the driver process. The process will
|
|
* reset the transceiver without any undesirable consequences.
|
|
*/
|
|
void
|
|
cc2538_rf_err_isr(void)
|
|
{
|
|
ENERGEST_ON(ENERGEST_TYPE_IRQ);
|
|
|
|
PRINTF("RF Error: 0x%08lx\n", REG(RFCORE_SFR_RFERRF));
|
|
|
|
/* If the error is not an RX FIFO overflow, set a flag */
|
|
if(REG(RFCORE_SFR_RFERRF) != RFCORE_SFR_RFERRF_RXOVERF) {
|
|
rf_flags |= RF_MUST_RESET;
|
|
}
|
|
|
|
REG(RFCORE_SFR_RFERRF) = 0;
|
|
|
|
process_poll(&cc2538_rf_process);
|
|
|
|
ENERGEST_OFF(ENERGEST_TYPE_IRQ);
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
void
|
|
cc2538_rf_set_promiscous_mode(char p)
|
|
{
|
|
if(p) {
|
|
REG(RFCORE_XREG_FRMFILT0) &= ~RFCORE_XREG_FRMFILT0_FRAME_FILTER_EN;
|
|
} else {
|
|
REG(RFCORE_XREG_FRMFILT0) |= RFCORE_XREG_FRMFILT0_FRAME_FILTER_EN;
|
|
}
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
/** @} */
|