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e0aefd11d9
This patch extends the protection domain framework with a third plugin that is a hybrid of the previous two. The hardware task switching mechanism has a strictly-defined format for TSS data structures that causes more space to be consumed than would otherwise be required. This patch defines a smaller data structure that is allocated for each protection domain, only requiring 32 bytes instead of 128 bytes. It uses the same multi-segment memory layout as the TSS-based plugin and leaves paging disabled. However, it uses a similar mechanism as the paging plugin to perform system call dispatches and returns. For additional information, please refer to cpu/x86/mm/README.md.
249 lines
8.9 KiB
C
249 lines
8.9 KiB
C
/*
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* Copyright (C) 2015, Intel Corporation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "gdt.h"
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#include "helpers.h"
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#include "prot-domains.h"
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#include "segmentation.h"
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#include "stacks.h"
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/*---------------------------------------------------------------------------*/
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static uint32_t
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segment_desc_compute_base(segment_desc_t desc)
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{
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return (desc.base_hi << 24) | (desc.base_mid << 16) | desc.base_lo;
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}
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/*---------------------------------------------------------------------------*/
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void
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prot_domains_reg_multi_seg(volatile struct dom_kern_data ATTR_KERN_ADDR_SPACE *dkd,
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uintptr_t mmio, size_t mmio_sz,
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uintptr_t meta, size_t meta_sz)
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{
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segment_desc_t desc;
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dom_id_t dom_id = PROT_DOMAINS_GET_DOM_ID(dkd);
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uint32_t kern_data_len;
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uint32_t tmp;
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if((dkd < prot_domains_kern_data) ||
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(prot_domains_kern_data_end <= dkd) ||
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(((((uintptr_t)dkd) - (uintptr_t)prot_domains_kern_data) %
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sizeof(dom_kern_data_t)) != 0)) {
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halt();
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}
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KERN_READL(tmp, dkd->ldt[DT_SEL_GET_IDX(LDT_SEL_KERN)].raw_hi);
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if(tmp != 0) {
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/* This PDCS was previously initialized, which is disallowed. */
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halt();
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}
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/* Initialize descriptors */
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if(dom_id == DOM_ID_kern) {
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kern_data_len = (uint32_t)&_ebss_kern_addr;
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} else {
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/* Non-kernel protection domains do not need to access the protection
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* domain control structures, and they may contain saved register values
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* that are private to each domain.
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*/
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kern_data_len = (uint32_t)&_ebss_syscall_addr;
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}
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kern_data_len -= (uint32_t)&_sbss_kern_addr;
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segment_desc_init(&desc, (uint32_t)&_sbss_kern_addr, kern_data_len,
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/* Every protection domain requires at least read-only access to kernel
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data to read dom_client_data structures and to support the system call
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dispatcher, if applicable. Only the kernel protection domain is granted
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read/write access to the kernel data. */
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((dom_id == DOM_ID_kern) ?
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SEG_TYPE_DATA_RDWR :
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SEG_TYPE_DATA_RDONLY) |
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SEG_FLAG(DPL, PRIV_LVL_USER) |
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SEG_GRAN_BYTE | SEG_DESCTYPE_NSYS);
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KERN_WRITEL(dkd->ldt[LDT_IDX_KERN].raw_lo, desc.raw_lo);
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KERN_WRITEL(dkd->ldt[LDT_IDX_KERN].raw_hi, desc.raw_hi);
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if(mmio_sz != 0) {
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if(SEG_MAX_BYTE_GRAN_LEN < mmio_sz) {
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halt();
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}
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segment_desc_init(&desc, mmio, mmio_sz,
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SEG_FLAG(DPL, PRIV_LVL_USER) | SEG_GRAN_BYTE |
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SEG_DESCTYPE_NSYS | SEG_TYPE_DATA_RDWR);
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} else {
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desc.raw = SEG_DESC_NOT_PRESENT;
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}
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KERN_WRITEL(dkd->ldt[LDT_IDX_MMIO].raw_lo, desc.raw_lo);
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KERN_WRITEL(dkd->ldt[LDT_IDX_MMIO].raw_hi, desc.raw_hi);
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if(meta_sz != 0) {
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if(SEG_MAX_BYTE_GRAN_LEN < meta_sz) {
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halt();
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}
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segment_desc_init(&desc, meta, meta_sz,
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SEG_FLAG(DPL, PRIV_LVL_USER) | SEG_GRAN_BYTE |
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SEG_DESCTYPE_NSYS | SEG_TYPE_DATA_RDWR);
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} else {
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desc.raw = SEG_DESC_NOT_PRESENT;
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}
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KERN_WRITEL(dkd->ldt[LDT_IDX_META].raw_lo, desc.raw_lo);
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KERN_WRITEL(dkd->ldt[LDT_IDX_META].raw_hi, desc.raw_hi);
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segment_desc_init(&desc,
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KERN_DATA_OFF_TO_PHYS_ADDR(dkd->ldt),
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sizeof(dkd->ldt),
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SEG_FLAG(DPL, PRIV_LVL_USER) | SEG_GRAN_BYTE |
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SEG_DESCTYPE_SYS | SEG_TYPE_LDT);
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gdt_insert(GDT_IDX_LDT(dom_id), desc);
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}
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/*---------------------------------------------------------------------------*/
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void
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prot_domains_gdt_init()
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{
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int i;
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segment_desc_t desc;
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segment_desc_init(&desc,
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(uint32_t)&_stext_addr,
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((uint32_t)&_etext_addr) - (uint32_t)&_stext_addr,
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SEG_FLAG(DPL, PRIV_LVL_EXC) | SEG_GRAN_BYTE |
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SEG_DESCTYPE_NSYS |
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#if X86_CONF_PROT_DOMAINS == X86_CONF_PROT_DOMAINS__SWSEG
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/* The general protection fault handler requires read access to CS */
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SEG_TYPE_CODE_EXRD
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#else
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SEG_TYPE_CODE_EX
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#endif
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);
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gdt_insert_boot(GDT_IDX_CODE_EXC, desc);
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segment_desc_init(&desc,
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(uint32_t)&_sdata_addr,
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((uint32_t)&_edata_addr) - (uint32_t)&_sdata_addr,
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SEG_FLAG(DPL, PRIV_LVL_USER) | SEG_GRAN_BYTE |
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SEG_DESCTYPE_NSYS | SEG_TYPE_DATA_RDWR);
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gdt_insert_boot(GDT_IDX_DATA, desc);
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segment_desc_init(&desc,
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(uint32_t)&_sbss_kern_addr,
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((uint32_t)&_ebss_kern_addr) -
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(uint32_t)&_sbss_kern_addr,
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SEG_FLAG(DPL, PRIV_LVL_EXC) | SEG_GRAN_BYTE |
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SEG_DESCTYPE_NSYS | SEG_TYPE_DATA_RDWR);
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gdt_insert_boot(GDT_IDX_DATA_KERN_EXC, desc);
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segment_desc_init(&desc,
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(uint32_t)DATA_OFF_TO_PHYS_ADDR(stacks_main),
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STACKS_SIZE_MAIN,
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SEG_FLAG(DPL, PRIV_LVL_USER) | SEG_GRAN_BYTE |
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SEG_DESCTYPE_NSYS | SEG_TYPE_DATA_RDWR);
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gdt_insert_boot(GDT_IDX_STK, desc);
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segment_desc_set_limit(&desc, STACKS_SIZE_MAIN + STACKS_SIZE_INT);
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SEG_SET_FLAG(desc, DPL, PRIV_LVL_INT);
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gdt_insert_boot(GDT_IDX_STK_INT, desc);
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segment_desc_set_limit(&desc,
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STACKS_SIZE_MAIN +
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STACKS_SIZE_INT +
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STACKS_SIZE_EXC);
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SEG_SET_FLAG(desc, DPL, PRIV_LVL_EXC);
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gdt_insert_boot(GDT_IDX_STK_EXC, desc);
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/* Not all domains will necessarily be initialized, so this initially marks
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* all per-domain descriptors not-present.
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*/
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desc.raw = SEG_DESC_NOT_PRESENT;
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for(i = 0; i < PROT_DOMAINS_ACTUAL_CNT; i++) {
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#if X86_CONF_PROT_DOMAINS == X86_CONF_PROT_DOMAINS__TSS
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gdt_insert_boot(GDT_IDX_TSS(i), desc);
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#endif
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gdt_insert_boot(GDT_IDX_LDT(i), desc);
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}
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__asm__ __volatile__ (
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"mov %[_default_data_], %%ds\n\t"
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"mov %[_default_data_], %%es\n\t"
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"mov %[_kern_data_], %%" SEG_KERN "s\n\t"
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:
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: [_default_data_] "r"(GDT_SEL_DATA),
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[_kern_data_] "r"(GDT_SEL_DATA_KERN_EXC));
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}
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/*---------------------------------------------------------------------------*/
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void
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multi_segment_launch_kernel(void)
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{
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/* Update segment registers. */
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__asm__ __volatile__ (
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"mov %[_data_seg_], %%ds\n\t"
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"mov %[_data_seg_], %%es\n\t"
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"mov %[_kern_seg_], %%" SEG_KERN "s\n\t"
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"mov %[_data_seg_], %%" SEG_META "s\n\t"
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:
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: [_data_seg_] "r" (GDT_SEL_DATA),
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[_kern_seg_] "r" (LDT_SEL_KERN)
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);
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}
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/*---------------------------------------------------------------------------*/
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void
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prot_domains_enable_mmio(void)
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{
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__asm__ __volatile__ ("mov %0, %%" SEG_MMIO "s" :: "r" (LDT_SEL_MMIO));
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}
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/*---------------------------------------------------------------------------*/
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void
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prot_domains_disable_mmio(void)
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{
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__asm__ __volatile__ ("mov %0, %%" SEG_KERN "s" :: "r" (LDT_SEL_KERN));
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}
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/*---------------------------------------------------------------------------*/
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uintptr_t
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prot_domains_lookup_meta_phys_base(dom_client_data_t ATTR_KERN_ADDR_SPACE *drv)
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{
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dom_id_t dom_id;
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segment_desc_t desc;
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volatile dom_kern_data_t ATTR_KERN_ADDR_SPACE *dkd;
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KERN_READL(dom_id, drv->dom_id);
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dkd = prot_domains_kern_data + dom_id;
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KERN_READL(desc.raw_lo, dkd->ldt[DT_SEL_GET_IDX(LDT_SEL_META)].raw_lo);
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KERN_READL(desc.raw_hi, dkd->ldt[DT_SEL_GET_IDX(LDT_SEL_META)].raw_hi);
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return segment_desc_compute_base(desc);
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}
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/*---------------------------------------------------------------------------*/
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