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chiptune_debug: update the tests with current understanding
This commit is contained in:
Vince Weaver
parent
4e3481b91a
commit
30ffba8a55
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@ -72,3 +72,22 @@ $3c by itself = fine
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50/3c and 50/32 also have issues, but not quite the same
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(Some, audio fading instead of glitch?)
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Got new AY-3-8913 chips
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Tried looking at the timings.
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8913 timings are actually worse in some cases (especially writes)
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than 8910, though still in the low us range so we shouldn't be
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hitting it?
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The programming manual and timing diagrams hint that you can flip
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the address_latch / address ordering when writing. This does
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work on real hardware but not in any of the emulators.
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Have a new test, chiptune_smallest:
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+ No IRQ, plain busy wait at 20ms
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+ No lookups, hardcode the $51 to $3c transition
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Still shows the glitch, actually very quickly.
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Changes made to test this:
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+ Try increasing the WAIT delay from 85 to 120
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(still an issue)
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@ -205,14 +205,16 @@ reset_ay_right:
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write_ay_address_right:
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lda #MOCK_AY_LATCH_ADDR ; latch_address on PB1 ; 2
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sta MOCK_6522_2_ORB ; latch_address on PB1 ; 3
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; address
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stx MOCK_6522_2_ORA ; put address on PA1 ; 3
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; on AY-3-8913 hold 300ns
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lda #MOCK_AY_LATCH_ADDR ; latch_address on PB1 ; 2
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sta MOCK_6522_2_ORB ; latch_address on PB1 ; 3
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lda #MOCK_AY_INACTIVE ; go inactive ; 2
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sta MOCK_6522_2_ORB ; 3
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@ -4,7 +4,12 @@
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MB_CHUNK_OFFSET = $94
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MB_VALUE = $91
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WAIT = $FCA8
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WAIT = $FCA8 ; 1/2(26+27A+5A^2) us
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; 85 = 19.223ms
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; 86 = 19.6ms
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; 87 = 20.11ms
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; 120 = 37.6ms
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; 240 = 147.25ms
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; left channel
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MOCK_6522_1_ORB = $C400 ; 6522 #1 port b data
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@ -115,15 +120,6 @@ reset_ay_right:
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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;=========================
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; Setup initial conditions
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;=========================
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@ -156,49 +152,28 @@ reset_ay_right:
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main_loop:
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;======================================
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; Write frames to Mockingboard
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;======================================
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; actually plays frame loaded at end of
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; last interrupt, so 20ms behind?
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mb_write_frame:
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ldy MB_CHUNK_OFFSET
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; 4: C CHANNEL FINE
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lda c_fine,Y
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lda #$51
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sta MB_VALUE
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; ldx #4
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jsr write_ay_value_right
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increment_offset:
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inc MB_CHUNK_OFFSET ; increment offset
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lda MB_CHUNK_OFFSET
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; delay ~20ms
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lda #87
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jsr WAIT ; wait 20ms or so
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and #$1 ; reduce number played
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; $f = 16
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; $3 = 4
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; $1 = 2
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; $0 = 1
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sta MB_CHUNK_OFFSET
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lda #$3C
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sta MB_VALUE
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jsr write_ay_value_right
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;============================
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; delay 20ms?
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;============================
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lda #85
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; delay ~20ms
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lda #87
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jsr WAIT ; wait 20ms or so
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jmp main_loop
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; Write sequence
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; Inactive -> Latch Address -> Inactive -> Write Data -> Inactive
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;=========================================
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; Write Right/Left to save value AY-3-8910
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@ -206,46 +181,43 @@ increment_offset:
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; register in X
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; value in MB_VALUE
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; Write sequence
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; ADDRESS: Inactive -> Latch Address -> Addr -> Inactive
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; Programming manual (as well as timing diagrams)
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; say you can flip latch / addr order, but the simulators
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; don't like that.
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; Value: Inactive -> Data -> Write Data -> Inactive
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;
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write_ay_address_right:
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lda #MOCK_AY_LATCH_ADDR ; latch_address on PB1 ; 2
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sta MOCK_6522_2_ORB ; latch_address on PB1 ; 3
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; address
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stx MOCK_6522_2_ORA ; put address on PA1 ; 3
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; on AY-3-8913 hold 300ns
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lda #MOCK_AY_LATCH_ADDR ; latch_address on PB1 ; 2
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sta MOCK_6522_2_ORB ; latch_address on PB1 ; 3
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; on AY-3-8913 hold 300ns, on AY-3-8910 hold 400ns
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lda #MOCK_AY_INACTIVE ; go inactive ; 2
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sta MOCK_6522_2_ORB ; 3
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; on AY-3-8913 hold at least 50ns
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; on AY-3-8913 hold 50ns, on AY-3-8910 hold 100ns
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write_ay_value_right:
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lda MB_VALUE ; 3
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sta MOCK_6522_2_ORA ; put value on PA2 ; 3
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; AY-3-8913 must hold 50ns
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sta MOCK_6522_2_ORA ; put value on PA2 ; 4
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; AY-3-8913 + AY-3-8910: 50ns
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; presumably the next two instructions take 6*1us so plenty of time
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lda #MOCK_AY_WRITE ; ; 2
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sta MOCK_6522_2_ORB ; write on PB2 ; 3
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; AY-3-8913 must hold 1800ns
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sta MOCK_6522_2_ORB ; write on PB2 ; 4
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; AY-3-8913 hold 1800ns, AY-3-8910 500ns
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lda #MOCK_AY_INACTIVE ; go inactive ; 2
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sta MOCK_6522_2_ORB ; 3
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; AY-3-8913 must hold 100ns
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sta MOCK_6522_2_ORB ; 4
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; AY-3-8913 + AY-3-8910: 100ns
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rts ; 6
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;===========
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; 53
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c_fine:
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.byte $51,$3c
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;.byte $32,$50, $3d,$32,$50,$3c, $33,$50,$3c,$32,$51,$3c,$32,$50
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@ -206,16 +206,14 @@ write_ay_both:
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write_ay_address_left:
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lda #MOCK_AY_LATCH_ADDR ; latch_address on PB1 ; 2
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sta MOCK_6522_1_ORB ; latch_address on PB1 ; 3
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nop
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; address
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stx MOCK_6522_1_ORA ; put address on PA1 ; 3
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; on AY-3-8913 hold 300ns
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nop
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lda #MOCK_AY_LATCH_ADDR ; latch_address on PB1 ; 2
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sta MOCK_6522_1_ORB ; latch_address on PB1 ; 3
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nop
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lda #MOCK_AY_INACTIVE ; go inactive ; 2
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sta MOCK_6522_1_ORB ; 3
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@ -250,39 +248,16 @@ write_ay_value_left:
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; AY-3-8913 must hold 100ns
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nop
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lda #MOCK_AY_LATCH_ADDR ; latch_address on PB1 ; 2
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sta MOCK_6522_1_ORB ; latch_address on PB1 ; 3
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nop
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; address
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stx MOCK_6522_1_ORA ; put address on PA1 ; 3
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; on AY-3-8913 hold 300ns
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nop
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lda #MOCK_AY_INACTIVE ; go inactive ; 2
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sta MOCK_6522_1_ORB ; 3
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; on AY-3-8913 hold at least 50ns
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nop
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write_ay_address_right:
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lda #MOCK_AY_LATCH_ADDR ; latch_address on PB1 ; 2
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sta MOCK_6522_2_ORB ; latch_address on PB1 ; 3
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nop
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; address
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stx MOCK_6522_2_ORA ; put address on PA1 ; 3
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stx MOCK_6522_2_ORA ; put address on PA2 ; 3
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; on AY-3-8913 hold 300ns
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nop
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lda #MOCK_AY_LATCH_ADDR ; latch_address on PB2 ; 2
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sta MOCK_6522_2_ORB ; latch_address on PB2 ; 3
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nop
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lda #MOCK_AY_INACTIVE ; go inactive ; 2
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sta MOCK_6522_2_ORB ; 3
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