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double: make the cycle-count code generic

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This commit is contained in:
Vince Weaver 2023-05-15 14:10:16 -04:00
parent 5d2e219320
commit 742f764844
6 changed files with 154 additions and 56 deletions
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3
vaporlock/doubledouble/Makefile
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@ -26,11 +26,13 @@ DOUBLE: double.o
double.o: double.s \
zp.inc hardware.inc pt3_lib_mockingboard_detect.s \
pt3_lib_mockingboard_setup.s pt3_lib_detect_model.s \
pt3_lib_core.s \
zx02_optim.s copy_400.s gr_offsets.s vblank.s \
text_print.s title.s gr_fast_clear.s \
interrupt_handler.s pt3_lib_mockingboard_patch.s \
wait_a_bit.s wait.s pt3_lib_init.s \
music/fighting.zx02 \
setup_graphics.s \
effect_static.s \
effect_dhgr_dgr.s \
effect_dhgr_hgr.s \
@ -55,6 +57,7 @@ static.o: static.s \
text_print.s title.s gr_fast_clear.s \
interrupt_handler.s pt3_lib_mockingboard_patch.s \
wait_a_bit.s wait.s pt3_lib_init.s \
setup_graphics.s \
music/fighting.zx02 \
graphics/sworg_hgr.hgr.zx02 \
graphics/sworg_dhgr.aux.zx02 \

31
vaporlock/doubledouble/double.s
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@ -224,6 +224,13 @@ skip_all_checks:
; each line 65 cycles (25 hblank+40 bytes)
double_loop:
;====================
; update frame count
inc FRAME
bne frame_no_oflo
inc FRAMEH
frame_no_oflo:
;====================
; play music
@ -245,19 +252,10 @@ vblank_smc:
; .include "effect_static.s"
; .include "effect_dhgr_dgr.s"
; .include "effect_dhgr_hgr.s"
.include "effect_midline.s"
; .include "effect_midline.s"
inc FRAME
ldx FRAME
; lda sin_table,X
; sta effect_top_smc+1
; clc
; adc #32
; sta effect_bottom_smc+1
jsr effect_dhgr_dgr
jmp double_loop ; 3
@ -269,6 +267,8 @@ vblank_smc:
.include "vblank.s"
.include "effect_dhgr_dgr.s"
; actually want 1552-12 (6 each for jsr/rts)
; 1540
; Try X=15 Y=19 cycles=1540
@ -335,7 +335,7 @@ top_string_main:
.byte "DOUBLE DOUBLE by DEATER / DsR ",0
; .byte " Graphics based on art by @YYYYYYYYY Music: N. OOOOOOO",0
; .byte " Graphics based on art by @helpcomputer0 Music: N. UEMATSU",0
config_string:
@ -343,12 +343,13 @@ config_string:
.byte 0,23,"APPLE II? MOCKINGBOARD: NO ",0
.include "gr_offsets.s"
.include "text_print.s"
.include "title.s"
.include "gr_fast_clear.s"
.include "wait_a_bit.s"
.include "wait.s"
.include "gr_offsets.s"
;.include "load_music.s"
sin_table:
@ -356,7 +357,3 @@ sin_table:
fighting_zx02:
.incbin "music/fighting.zx02"

96
vaporlock/doubledouble/effect_dhgr_dgr.s
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@ -1,49 +1,98 @@
; goal
;
; 192 lines
; window is 32 lines
; so 0...current
; current...current+32
; current+32...192
; double hi-res / double lo-res
; test, 100 lines of double-hires
; 100*65 = 6500
; show dhgr image on page1
; show sliding 32-line window of dgr page 1
; 2+ X*(12+2+3) - 1
effect_top_smc:
; note come in at 6 (jsr) + 6 (rts from vblank) + vblank jitter
effect_dhgr_dgr:
;==========================
; top
;==========================
effect_top_smc: ; 12
ldx #100 ; 2
lda $00 ; nop3 ; 3
nop ; 2
nop ; 2
jmp aloop_24 ; 3
aloop:
jsr delay_12 ; 12
jsr delay_12 ; 12
aloop_24:
jsr delay_12 ; 12
jsr delay_12 ; 12
jsr delay_12 ; 12
dex ; 2
bne aloop ; 2/3
sta LORES
sta PAGE1
sta SET80COL
sta CLRAN3
;==========================
; middle (Switch mode)
;==========================
; -1
ldx #32 ; 2
sta LORES ; 4
sta PAGE1 ; 4
sta SET80COL ; 4
sta CLRAN3 ; 4
; 17
nop
nop
jmp bloop_24
bloop:
; update the movement mid-way
ldy FRAME ; 3
lda sin_table,Y ; 4+
sta effect_top_smc+1 ; 4
clc ; 2
adc #32 ; should this be 31? ; 2
sta effect_bottom_smc+1 ; 4
;================
; 19
; 19
nop
lda $00 ; nop3
bloop_24:
; 24
jsr delay_12 ; 12
; 36
jsr delay_12 ; 12
; 48
jsr delay_12 ; 12
jsr delay_12 ; 12
jsr delay_12 ; 12
; 60
dex ; 2
bne bloop ; 2/3
;============================================
; bottom (Switch back to double-hires page 1)
;============================================
bit HIRES
effect_bottom_smc:
effect_bottom_smc: ; -1
ldx #60 ; 2
bit HIRES ; 4
sta CLRAN3 ; 4
sta SET80COL ; 4
bit PAGE1 ; 4
; 17
nop ; 2
nop ; 2
jmp cloop_plus_24 ; 3
cloop:
jsr delay_12 ; 12
jsr delay_12 ; 12
cloop_plus_24:
jsr delay_12 ; 12
jsr delay_12 ; 12
jsr delay_12 ; 12
@ -51,11 +100,4 @@ cloop:
cpx #192
bcs cloop ; 2/3
rts

75
vaporlock/doubledouble/pt3_lib_core.s
View File

@ -232,6 +232,29 @@ note_c:
end_vars:
.endif
.ifndef PT3_DISABLE_SWITCHABLE_FREQ_CONVERSION
; Set to 1MHz mode (no convert freq)
; this saves a few 100 cycles?
pt3_toggle_freq_conversion:
lda convert_177_smc1
eor #$20
bne pt3_freq_common
pt3_enable_freq_conversion:
lda #$38 ; SEC
bne pt3_freq_common ; bra
pt3_disable_freq_conversion:
lda #$18 ; CLC
pt3_freq_common:
sta convert_177_smc1
sta convert_177_smc2
sta convert_177_smc3
sta convert_177_smc4
sta convert_177_smc5
rts
.endif
load_ornament0_sample1:
lda #0 ; 2
jsr load_ornament ; 6
@ -1692,9 +1715,6 @@ do_frame:
ldx #(NOTE_STRUCT_SIZE*2) ; Note C ; 2
jsr calculate_note ; 6+?
convert_177_smc1:
sec ; 2
; Load up the Frequency Registers
lda note_a+NOTE_TONE_L ; Note A Period L ; 4
@ -1703,7 +1723,15 @@ convert_177_smc1:
lda note_a+NOTE_TONE_H ; Note A Period H ; 4
sta AY_REGISTERS+1 ; into R1 ; 3
lda note_a+NOTE_TONE_L ; Note A Period L ; 4
.ifndef PT3_DISABLE_FREQ_CONVERSION
.ifndef PT3_DISABLE_SWITCHABLE_FREQ_CONVERSION
convert_177_smc1:
sec ; 2
bcc no_scale_a ; 2/3
.endif
; Convert from 1.77MHz to 1MHz by multiplying by 9/16
@ -1735,20 +1763,25 @@ convert_177_smc1:
ror AY_REGISTERS+0 ; 5
and #$0f ; 2
sta AY_REGISTERS+1 ; 3
.endif
no_scale_a:
convert_177_smc2:
sec ; 2
lda note_b+NOTE_TONE_L ; Note B Period L ; 4
sta AY_REGISTERS+2 ; into R2 ; 3
lda note_b+NOTE_TONE_H ; Note B Period H ; 4
sta AY_REGISTERS+3 ; into R3 ; 3
lda note_b+NOTE_TONE_L ; Note B Period L ; 4
bcc no_scale_b ; 2/3
.ifndef PT3_DISABLE_FREQ_CONVERSION
.ifndef PT3_DISABLE_SWITCHABLE_FREQ_CONVERSION
convert_177_smc2:
sec ; 2
bcc no_scale_b ; 2/3
.endif
; Convert from 1.77MHz to 1MHz by multiplying by 9/16
; first multiply by 8
@ -1777,18 +1810,23 @@ convert_177_smc2:
ror AY_REGISTERS+2 ; 5
and #$0f ; 2
sta AY_REGISTERS+3 ; 3
.endif
no_scale_b:
convert_177_smc3:
sec ; 2
lda note_c+NOTE_TONE_L ; Note C Period L ; 4
sta AY_REGISTERS+4 ; into R4 ; 3
lda note_c+NOTE_TONE_H ; Note C Period H ; 4
sta AY_REGISTERS+5 ; into R5 ; 3
lda note_c+NOTE_TONE_L ; Note C Period L ; 4
.ifndef PT3_DISABLE_FREQ_CONVERSION
.ifndef PT3_DISABLE_SWITCHABLE_FREQ_CONVERSION
convert_177_smc3:
sec ; 2
bcc no_scale_c ; 2/3
.endif
; Convert from 1.77MHz to 1MHz by multiplying by 9/16
@ -1818,6 +1856,7 @@ convert_177_smc3:
ror AY_REGISTERS+4 ; 5
and #$0f ; 2
sta AY_REGISTERS+5 ; 3
.endif
no_scale_c:
@ -1830,11 +1869,17 @@ pt3_noise_period_smc:
pt3_noise_add_smc:
adc #$d1 ; 2
and #$1f ; 2
.ifndef PT3_DISABLE_ENABLE_FREQ_CONVERSION
sta AY_REGISTERS+6 ; 3
.ifndef PT3_DISABLE_SWITCHABLE_FREQ_CONVERSION
convert_177_smc4:
sec ; 2
bcc no_scale_n ; 2/3
.endif
; Convert from 1.77MHz to 1MHz by multiplying by 9/16
@ -1852,8 +1897,10 @@ convert_177_smc4:
ror ; 2
ror ; 2
and #$1f ; 2
.endif
no_scale_n:
sta AY_REGISTERS+6 ; 3
;=======================
@ -1895,10 +1942,15 @@ pt3_envelope_slide_h_smc:
adc #$d1 ; 2
sta AY_REGISTERS+12 ; 3
.ifndef PT3_DISABLE_FREQ_CONVERSION
.ifndef PT3_DISABLE_SWITCHABLE_FREQ_CONVERSION
convert_177_smc5:
sec
bcc no_scale_e ; 2/3
.endif
; Convert from 1.77MHz to 1MHz by multiplying by 9/16
tay ; 2
@ -1929,6 +1981,7 @@ convert_177_smc5:
ror AY_REGISTERS+11 ; 5
and #$0f ; 2
sta AY_REGISTERS+12 ; 3
.endif
no_scale_e:

3
vaporlock/doubledouble/static.s
View File

@ -187,6 +187,9 @@ PT3_LOC = $b000
; init song
;==================
PT3_DISABLE_FREQ_CONVERSION = 1
PT3_DISABLE_SWITCHABLE_FREQ_CONVERSION = 1
jsr pt3_init_song

2
vaporlock/doubledouble/zp.inc
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@ -75,7 +75,7 @@ HGRPAGE = $E6
TEMPY = $F0
XX = $F1
FRAME = $F2
FRAMEH = $F3
YPOS = $FA
TCOLOR = $FB