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chiptune: update timing info
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@ -459,3 +459,14 @@ lz4/diff: 13669 bytes (11431 -9)
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gzip/diff: 10821 bytes
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gzip/diff: 10821 bytes
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bzip2/diff: 10477 bytes
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bzip2/diff: 10477 bytes
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lzma/diff: 7257 bytes
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lzma/diff: 7257 bytes
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Timing:
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=======
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Originally roughly 1500 cycles from start of interrupt
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to all registers being written.
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Moved clock to after, near the visualization stuff, more like
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1378 = 13+ (105*13)
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@ -57,6 +57,8 @@ mb_write_loop:
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lda #1 ; set done playing ; 2
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lda #1 ; set done playing ; 2
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jmp quiet_exit ; 3
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jmp quiet_exit ; 3
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;===========
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; typ 13
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mb_not_done:
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mb_not_done:
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@ -67,6 +69,8 @@ mb_not_done:
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bne mb_not_13 ; 3/2nt
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bne mb_not_13 ; 3/2nt
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cmp #$ff ; 2
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cmp #$ff ; 2
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beq increment_offset ; 3/2nt
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beq increment_offset ; 3/2nt
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;============
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; typ 5
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mb_not_13:
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mb_not_13:
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sta MB_VALUE ; 3
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sta MB_VALUE ; 3
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@ -83,7 +87,8 @@ mb_not_13:
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; so write same to both
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; so write same to both
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; left/right
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; left/right
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; 53
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; 53
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;===========
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; 68
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;====================
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;====================
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; point to next page
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; point to next page
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;====================
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;====================
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@ -97,8 +102,8 @@ mb_not_13:
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cpx #14 ; if 14 we're done ; 2
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cpx #14 ; if 14 we're done ; 2
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bmi mb_write_loop ; otherwise, loop ; 3/2nt
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bmi mb_write_loop ; otherwise, loop ; 3/2nt
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;============
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;============
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; roughly 95?
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; 19
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; *13= 1235?
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;==============================================
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;==============================================
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