mirror of
https://github.com/deater/dos33fsprogs.git
synced 2024-06-26 00:29:29 +00:00
chiptune_debug: add tiny reproducer
This commit is contained in:
Vince Weaver
parent
5f7ebdb9a0
commit
daf058f55b
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@ -5,13 +5,15 @@ PNG2GR = ../gr-utils/png2gr
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all: chiptune_debug.dsk
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chiptune_debug.dsk: CHIPTUNE_IRQ CHIPTUNE_NOIRQ CHIPTUNE_25HZ CHIPTUNE_BARE CHIPTUNE_MIN
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chiptune_debug.dsk: CHIPTUNE_IRQ CHIPTUNE_NOIRQ CHIPTUNE_25HZ \
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CHIPTUNE_BARE CHIPTUNE_MIN CHIPTUNE_TINY
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cp chiptune_empty.dsk chiptune_debug.dsk
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$(DOS33) -y chiptune_debug.dsk BSAVE -a 0x0C00 CHIPTUNE_IRQ
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$(DOS33) -y chiptune_debug.dsk BSAVE -a 0x0C00 CHIPTUNE_NOIRQ
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$(DOS33) -y chiptune_debug.dsk BSAVE -a 0x0C00 CHIPTUNE_25HZ
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$(DOS33) -y chiptune_debug.dsk BSAVE -a 0x0C00 CHIPTUNE_BARE
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$(DOS33) -y chiptune_debug.dsk BSAVE -a 0x0C00 CHIPTUNE_MIN
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$(DOS33) -y chiptune_debug.dsk BSAVE -a 0x0C00 CHIPTUNE_TINY
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CHIPTUNE_IRQ: chiptune_irq.o
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@ -54,6 +56,12 @@ CHIPTUNE_MIN: chiptune_min.o
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chiptune_min.o: chiptune_min.s
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ca65 -o chiptune_min.o chiptune_min.s -l chiptune_min.lst
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CHIPTUNE_TINY: chiptune_tiny.o
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ld65 -o CHIPTUNE_TINY chiptune_tiny.o -C ../linker_scripts/apple2_c00.inc
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chiptune_tiny.o: chiptune_tiny.s
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ca65 -o chiptune_tiny.o chiptune_tiny.s -l chiptune_tiny.lst
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clean:
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rm -f *~ TITLE.GR *.o *.lst \
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335
chiptune_debug/chiptune_tiny.s
Normal file
335
chiptune_debug/chiptune_tiny.s
Normal file
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@ -0,0 +1,335 @@
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; VMW Minimal Mockingboard Issue Reproducer
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; ZP addresses
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MB_CHUNK_OFFSET = $94
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MB_VALUE = $91
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;=========================
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; Init Variables
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;=========================
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lda #$0
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sta MB_CHUNK_OFFSET
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;============================
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; Init the Mockingboard
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;============================
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jsr mockingboard_init
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jsr reset_ay_both
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jsr clear_ay_both
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;=========================
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; Setup Interrupt Handler
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;=========================
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; Vector address goes to 0x3fe/0x3ff
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lda #<interrupt_handler
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sta $03fe
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lda #>interrupt_handler
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sta $03ff
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;============================
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; Enable 50Hz clock on 6522
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;============================
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sei ; disable interrupts just in case
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lda #$40 ; Continuous interrupts, don't touch PB7
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sta $C40B ; ACR register
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lda #$7F ; clear all interrupt flags
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sta $C40E ; IER register (interrupt enable)
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lda #$C0
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sta $C40D ; IFR: 1100, enable interrupt on timer one oflow
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sta $C40E ; IER: 1100, enable timer one interrupt
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lda #$E7
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sta $C404 ; write into low-order latch
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lda #$4f
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sta $C405 ; write into high-order latch,
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; load both values into counter
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; clear interrupt and start counting
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; 4fe7 / 1e6 = .020s, 50Hz
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;==================
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; load first song
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;==================
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;============================
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; Enable 6502 interrupts
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;============================
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cli ; clear interrupt mask
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;============================
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; Loop forever
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;============================
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main_loop:
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jmp main_loop
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;=========
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;routines
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;=========
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; left speaker
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MOCK_6522_ORB1 = $C400 ; 6522 #1 port b data
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MOCK_6522_ORA1 = $C401 ; 6522 #1 port a data
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MOCK_6522_DDRB1 = $C402 ; 6522 #1 data direction port B
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MOCK_6522_DDRA1 = $C403 ; 6522 #1 data direction port A
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; right speaker
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MOCK_6522_ORB2 = $C480 ; 6522 #2 port b data
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MOCK_6522_ORA2 = $C481 ; 6522 #2 port a data
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MOCK_6522_DDRB2 = $C482 ; 6522 #2 data direction port B
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MOCK_6522_DDRA2 = $C483 ; 6522 #2 data direction port A
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; AY-3-8910 commands on port B
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; RESET BDIR BC1
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MOCK_AY_RESET = $0 ; 0 0 0
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MOCK_AY_INACTIVE = $4 ; 1 0 0
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MOCK_AY_READ = $5 ; 1 0 1
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MOCK_AY_WRITE = $6 ; 1 1 0
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MOCK_AY_LATCH_ADDR = $7 ; 1 1 1
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;========================
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; Mockingboard Init
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;========================
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; Initialize the 6522s
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; set the data direction for all pins of PortA/PortB to be output
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mockingboard_init:
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lda #$ff ; all output (1)
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sta MOCK_6522_DDRB1
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sta MOCK_6522_DDRA1
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sta MOCK_6522_DDRB2
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sta MOCK_6522_DDRA2
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rts
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reset_ay_both:
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;======================
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; Reset Left AY-3-8910
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;======================
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reset_ay_left:
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lda #MOCK_AY_RESET
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sta MOCK_6522_ORB1
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lda #MOCK_AY_INACTIVE
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sta MOCK_6522_ORB1
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;======================
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; Reset Right AY-3-8910
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;======================
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reset_ay_right:
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lda #MOCK_AY_RESET
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sta MOCK_6522_ORB2
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lda #MOCK_AY_INACTIVE
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sta MOCK_6522_ORB2
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rts
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; Write sequence
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; Inactive -> Latch Address -> Inactive -> Write Data -> Inactive
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;=========================================
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; Write Right/Left to save value AY-3-8910
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;=========================================
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; register in X
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; value in MB_VALUE
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write_ay_both:
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; address
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stx MOCK_6522_ORA1 ; put address on PA1 ; 3
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stx MOCK_6522_ORA2 ; put address on PA2 ; 3
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lda #MOCK_AY_LATCH_ADDR ; latch_address on PB1 ; 2
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sta MOCK_6522_ORB1 ; latch_address on PB1 ; 3
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sta MOCK_6522_ORB2 ; latch_address on PB2 ; 3
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lda #MOCK_AY_INACTIVE ; go inactive ; 2
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sta MOCK_6522_ORB1 ; 3
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sta MOCK_6522_ORB2 ; 3
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; value
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lda MB_VALUE ; 3
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sta MOCK_6522_ORA1 ; put value on PA1 ; 3
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sta MOCK_6522_ORA2 ; put value on PA2 ; 3
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lda #MOCK_AY_WRITE ; ; 2
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sta MOCK_6522_ORB1 ; write on PB1 ; 3
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sta MOCK_6522_ORB2 ; write on PB2 ; 3
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lda #MOCK_AY_INACTIVE ; go inactive ; 2
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sta MOCK_6522_ORB1 ; 3
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sta MOCK_6522_ORB2 ; 3
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rts ; 6
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;===========
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; 53
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;=======================================
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; clear ay -- clear all 14 AY registers
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; should silence the card
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;=======================================
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clear_ay_both:
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ldx #14
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lda #0
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sta MB_VALUE
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clear_ay_left_loop:
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jsr write_ay_both
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dex
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bpl clear_ay_left_loop
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rts
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;================================
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;================================
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; mockingboard interrupt handler
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;================================
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;================================
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interrupt_handler:
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pha ; save A ; 3
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; Should we save X and Y too?
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bit $C404 ; clear 6522 interrupt by reading T1C-L ; 4
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mb_play_music:
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;======================================
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; Write frames to Mockingboard
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;======================================
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; actually plays frame loaded at end of
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; last interrupt, so 20ms behind?
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mb_write_frame:
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ldy MB_CHUNK_OFFSET
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; 4: C CHANNEL FINE
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ldx #4
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lda c_fine,Y
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sta MB_VALUE
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jsr write_ay_both
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; 5: C CHANNEL COARSE
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ldx #5
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lda #$0
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; lda c_coarse,Y
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sta MB_VALUE
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jsr write_ay_both
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; 7: ENABLE
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ldx #7
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; lda enable,Y
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lda #$38
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sta MB_VALUE
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jsr write_ay_both
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; 10: C Amplitude
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ldx #10
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lda c_amp,Y
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sta MB_VALUE
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jsr write_ay_both
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increment_offset:
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inc MB_CHUNK_OFFSET ; increment offset
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done_interrupt:
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pla ; restore a ; 4
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rti ; return from interrupt ; 6
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; 4: C fine
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c_fine:
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.byte $51,$3c,$32,$50,$3d,$32,$50,$3c, $33,$50,$3c,$32,$51,$3c,$32,$50
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.byte $3d,$32,$50,$3c,$33,$50,$3c,$32, $51,$3c,$32,$50,$3d,$32,$50,$3c
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.byte $33,$50,$3c,$32,$51,$3c,$32,$50, $3d,$33,$50,$3c,$32,$51,$3c,$32
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.byte $50,$3d,$33,$50,$3c,$32,$51,$3c, $32,$50,$3d,$33,$50,$3c,$32,$51
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.byte $3c,$32,$50,$3d,$33,$50,$3c,$32, $51,$3c,$32,$50,$3d,$33,$50,$3c
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.byte $32,$51,$3c,$32,$50,$3d,$33,$50, $3c,$32,$51,$3c,$32,$50,$3d,$33
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.byte $4c,$3c,$32,$4b,$3d,$32,$4b,$3c, $33,$4b,$3c,$32,$4c,$3c,$32,$4b
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.byte $3d,$32,$4b,$3c,$33,$4b,$3c,$32, $4c,$3c,$32,$4b,$3d,$32,$4b,$3c
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.byte $33,$4b,$3c,$32,$4c,$3c,$32,$4b, $3d,$33,$4b,$3c,$32,$4c,$3c,$32
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.byte $4b,$3d,$33,$4b,$3c,$32,$4c,$3c, $32,$4b,$3d,$33,$4b,$3c,$32,$4c
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.byte $3c,$32,$4b,$3d,$33,$4b,$3c,$32, $4c,$3c,$32,$4b,$3d,$33,$4b,$3c
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.byte $32,$4c,$3c,$32,$4b,$3d,$33,$4b, $3c,$32,$4c,$3c,$32,$4b,$3d,$33
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.byte $51,$43,$32,$50,$44,$32,$50,$43, $33,$50,$43,$32,$51,$43,$32,$50
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.byte $44,$32,$50,$43,$33,$50,$43,$32, $51,$43,$32,$50,$44,$32,$50,$43
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.byte $33,$50,$43,$32,$51,$43,$32,$50, $44,$33,$50,$43,$32,$51,$43,$32
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.byte $50,$44,$33,$50,$43,$32,$51,$43, $32,$50,$44,$33,$50,$43,$32,$51
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; 5: C coarse
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;c_coarse:
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;.byte $00,$00,$00,$00,$00,$00,$00,$00, $00,$00,$00,$00,$00,$00,$00,$00
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;.byte $00,$00,$00,$00,$00,$00,$00,$00, $00,$00,$00,$00,$00,$00,$00,$00
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;.byte $00,$00,$00,$00,$00,$00,$00,$00, $00,$00,$00,$00,$00,$00,$00,$00
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;.byte $00,$00,$00,$00,$00,$00,$00,$00, $00,$00,$00,$00,$00,$00,$00,$00
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;.byte $00,$00,$00,$00,$00,$00,$00,$00, $00,$00,$00,$00,$00,$00,$00,$00
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;.byte $00,$00,$00,$00,$00,$00,$00,$00, $00,$00,$00,$00,$00,$00,$00,$00
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;.byte $00,$00,$00,$00,$00,$00,$00,$00, $00,$00,$00,$00,$00,$00,$00,$00
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;.byte $00,$00,$00,$00,$00,$00,$00,$00, $00,$00,$00,$00,$00,$00,$00,$00
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;.byte $00,$00,$00,$00,$00,$00,$00,$00, $00,$00,$00,$00,$00,$00,$00,$00
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;.byte $00,$00,$00,$00,$00,$00,$00,$00, $00,$00,$00,$00,$00,$00,$00,$00
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;.byte $00,$00,$00,$00,$00,$00,$00,$00, $00,$00,$00,$00,$00,$00,$00,$00
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;.byte $00,$00,$00,$00,$00,$00,$00,$00, $00,$00,$00,$00,$00,$00,$00,$00
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;.byte $00,$00,$00,$00,$00,$00,$00,$00, $00,$00,$00,$00,$00,$00,$00,$00
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;.byte $00,$00,$00,$00,$00,$00,$00,$00, $00,$00,$00,$00,$00,$00,$00,$00
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;.byte $00,$00,$00,$00,$00,$00,$00,$00, $00,$00,$00,$00,$00,$00,$00,$00
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;.byte $00,$00,$00,$00,$00,$00,$00,$00, $00,$00,$00,$00,$00,$00,$00,$00
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; 7: Enable
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;enable:
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;.byte $38,$38,$38,$38,$38,$38,$38,$38, $38,$38,$38,$38,$38,$38,$38,$38
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;.byte $38,$38,$38,$38,$38,$38,$38,$38, $38,$38,$38,$38,$38,$38,$38,$38
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;.byte $38,$38,$38,$38,$38,$38,$38,$38, $38,$38,$38,$38,$38,$38,$38,$38
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;.byte $38,$38,$38,$38,$38,$38,$38,$38, $38,$38,$38,$38,$38,$38,$38,$38
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;.byte $38,$38,$38,$38,$38,$38,$38,$38, $38,$38,$38,$38,$38,$38,$38,$38
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;.byte $38,$38,$38,$38,$38,$38,$38,$38, $38,$38,$38,$38,$38,$38,$38,$38
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;.byte $38,$38,$38,$38,$38,$38,$38,$38, $38,$38,$38,$38,$38,$38,$38,$38
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;.byte $38,$38,$38,$38,$38,$38,$38,$38, $38,$38,$38,$38,$38,$38,$38,$38
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;.byte $38,$38,$38,$38,$38,$38,$38,$38, $38,$38,$38,$38,$38,$38,$38,$38
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;.byte $38,$38,$38,$38,$38,$38,$38,$38, $38,$38,$38,$38,$38,$38,$38,$38
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;.byte $38,$38,$38,$38,$38,$38,$38,$38, $38,$38,$38,$38,$38,$38,$38,$38
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;.byte $38,$38,$38,$38,$38,$38,$38,$38, $38,$38,$38,$38,$38,$38,$38,$38
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;.byte $38,$38,$38,$38,$38,$38,$38,$38, $38,$38,$38,$38,$38,$38,$38,$38
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;.byte $38,$38,$38,$38,$38,$38,$38,$38, $38,$38,$38,$38,$38,$38,$38,$38
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;.byte $38,$38,$38,$38,$38,$38,$38,$38, $38,$38,$38,$38,$38,$38,$38,$38
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;.byte $38,$38,$38,$38,$38,$38,$38,$38, $38,$38,$38,$38,$38,$38,$38,$38
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; 10: C amp
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c_amp:
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.byte $0d,$0e,$0e,$0d,$0c,$0c,$0c,$0c, $0c,$0c,$0c,$0c,$0c,$0c,$0c,$0c
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.byte $0c,$0c,$0c,$0c,$0c,$0c,$0c,$0c, $0c,$0c,$0c,$0c,$0c,$0c,$0c,$0c
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.byte $0c,$0c,$0c,$0c,$0c,$0c,$0c,$0c, $0c,$0c,$0c,$0c,$0c,$0c,$0c,$0c
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.byte $0c,$0c,$0c,$0c,$0c,$0c,$0c,$0c, $0c,$0c,$0c,$0c,$0c,$0c,$0c,$0c
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.byte $0c,$0c,$0c,$0c,$0c,$0c,$0c,$0c, $0c,$0c,$0c,$0c,$0c,$0c,$0c,$0c
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.byte $0c,$0c,$0c,$0c,$0c,$0c,$0c,$0c, $0c,$0c,$0c,$0c,$0c,$0c,$0c,$0c
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.byte $0d,$0e,$0e,$0d,$0c,$0c,$0c,$0c, $0c,$0c,$0c,$0c,$0c,$0c,$0c,$0c
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.byte $0c,$0c,$0c,$0c,$0c,$0c,$0c,$0c, $0c,$0c,$0c,$0c,$0c,$0c,$0c,$0c
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.byte $0c,$0c,$0c,$0c,$0c,$0c,$0c,$0c, $0c,$0c,$0c,$0c,$0c,$0c,$0c,$0c
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.byte $0c,$0c,$0c,$0c,$0c,$0c,$0c,$0c, $0c,$0c,$0c,$0c,$0c,$0c,$0c,$0c
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.byte $0c,$0c,$0c,$0c,$0c,$0c,$0c,$0c, $0c,$0c,$0c,$0c,$0c,$0c,$0c,$0c
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.byte $0c,$0c,$0c,$0c,$0c,$0c,$0c,$0c, $0c,$0c,$0c,$0c,$0c,$0c,$0c,$0c
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.byte $0d,$0e,$0e,$0d,$0c,$0c,$0c,$0c, $0c,$0c,$0c,$0c,$0c,$0c,$0c,$0c
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.byte $0c,$0c,$0c,$0c,$0c,$0c,$0c,$0c, $0c,$0c,$0c,$0c,$0c,$0c,$0c,$0c
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.byte $0c,$0c,$0c,$0c,$0c,$0c,$0c,$0c, $0c,$0c,$0c,$0c,$0c,$0c,$0c,$0c
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.byte $0c,$0c,$0c,$0c,$0c,$0c,$0c,$0c, $0c,$0c,$0c,$0c,$0c,$0c,$0c,$0c
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