midline: more optimizing

This commit is contained in:
Vince Weaver 2023-05-18 13:43:07 -04:00
parent a9db68a74a
commit e5b108298b
2 changed files with 107 additions and 85 deletions

View File

@ -1,15 +1,24 @@
; Blargh
; a 256-byte midline demo for Outline 2023
; by Vince `deater` Weaver
; by Vince `deater` Weaver / dSr
; requires an Apple IIe
.include "zp.inc"
.include "hardware.inc"
; 198 bytes -- proof of concept
; 76 bytes -- optimize Apple II Forever printing code
; 183 bytes -- stable window
; 248 bytes -- sine code added
; 274 bytes -- after much frustration, things sorta working
; 261 bytes -- use zp for sine generation
; 257 bytes -- inline sine generation
; 259 bytes -- fix sine generation initialization, shave some message print
; 247 bytes -- start replacing sather delays with something more compact
sine = $c00 ; location of sine table
midline:
@ -18,27 +27,28 @@ midline:
;================================
sta FULLGR
sta SETMOUSETEXT
sta SETMOUSETEXT ; enable mouse text for Apple char
jsr initSineTable
lda #0
sta FRAME
.include "sinetable.s" ; Y is FF after this
; A = 1, X = $40
iny ; needed?
sty FRAME
;====================================================
; setup text page1 screen of "Apple II Forever" text
;====================================================
ldy #0
; X is $40 which is probably OK
; ldx #0
restart:
ldx #0
iny
tay ; reset Y to 0 (or 1 first time through)
inx
beq print_done
print_loop:
lda a2_string,X
lda a2_string,Y
beq restart
jsr COUT ; output char in A to stdout
inx
iny
bne print_loop
print_done:
@ -51,22 +61,25 @@ print_done:
; "Understanding the Apple IIe"
poll1:
lda VBLANK ; Find end of VBL
bmi poll1 ; Fall through at VBL
lda VBLANK ; Find end of VBL
bmi poll1 ; Fall through at VBL
poll2:
lda VBLANK
bpl poll2 ; Fall through at VBL' ; 2
bpl poll2 ; Fall through at VBL' ; 2
lda $00 ; Now slew back in 17029 cycle loops ; 3
lda $00 ;nop3 ; Now slew back in 17029 cycle loops ; 3
lp17029:
ldx #17 ; ; 2
jsr wait_x_x_1k ; ; 17000
jsr rts1 ; ; 12
lda $00 ; nop3 ; 3
lda $00 ; nop3 ; 3
lda VBLANK ; Back to VBL yet? ; 4
nop ; ; 2
bmi lp17029 ; no, slew back ; 2/3
; delay 17020
lda #7 ; 2
ldy #96 ; 2
jsr size_delay ; 17012
nop ; 2
nop ; 2
lda VBLANK ; Back to VBL yet? ; 4
nop ; ; 2
bmi lp17029 ; no, slew back ; 2/3
@ -76,17 +89,11 @@ lp17029:
cycle_start:
; 192 + 70 (vblank) = 262
; if 42 high, then day 220 on, 42 off
; how start in middle?
; 2
top_smc:
ldx #66 ; 2
lda $00 ; nop3
lda $00 ; nop3 ; 5
bne top10 ; bra ; 3/2
@ -195,17 +202,18 @@ vblank_start:
sta top_smc+1 ; 4
adc #56 ; 2
sta bottom_smc+1 ; 4
; 25
ldx #4 ; 2
jsr wait_x_x_1k ; 4000
; 4027
ldy #52 ; 2
jsr wait_y_x_10 ; 520
lda #1 ; 2
ldy #244 ; 2
; 29
jsr size_delay ; 4520
; 4549
jmp cycle_start
; +2
delay_16_setgr:
bit SET_GR
delay_12:
@ -230,7 +238,7 @@ skip:
bne loop10 ; 2/3
rts ; 6
.if 0
;===================================
; wait x-reg times 1000
;===================================
@ -240,7 +248,7 @@ loop1k:
pla ; 4
nop ; 2
nop ; 2
wait_x_x_1k:
wait_X_x_1k:
ldy #98 ; wait x-reg times 1000 ; 2
jsr wait_y_x_10 ; 980
nop ; 2
@ -248,6 +256,20 @@ wait_x_x_1k:
bne loop1k ; 2/3
rts1:
rts ; 6
.endif
;=====================================
; short delay by Bruce Clark
; any delay between 8 to 589832 with res of 9
;=====================================
; 9*(256*A+Y)+8 + 12 for jsr/rts
size_delay:
delay_loop:
cpy #1
dey
sbc #0
bcs delay_loop
rts
a2_string:
; 012345678901234567 8 9
@ -256,49 +278,3 @@ a2_string:
.byte 'I'+$80,'I'+$80,' '+$80,'F'+$80,'o'+$80,'r'+$80
.byte 'e'+$80,'v'+$80,'e'+$80,'r'+$80,'!'+$80,'!'+$80
.byte ' '+$80,'@'+$00,' '+$80,0
initSineTable:
ldy #$3f
ldx #$00
; Accumulate the delta (normal 16-bit addition)
:
lda value
clc
adc delta
sta value
lda value+1
adc delta+1
sta value+1
; Reflect the value around for a sine wave
sta sine+$c0,x
sta sine+$80,y
eor #$7f
sta sine+$40,x
sta sine+$00,y
; Increase the delta, which creates the "acceleration" for a parabola
lda delta
; adc #$10 ; this value adds up to the proper amplitude
adc #$08 ; this value adds up to the proper amplitude
sta delta
bcc :+
inc delta+1
:
; Loop
inx
dey
bpl :--
rts
value: .word 0
delta: .word 0
sine = $c00

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@ -0,0 +1,46 @@
;=================================
; fakes sines based on parabolas
; based on code by White Flame from codebase64
;=================================
; makes 256 entries, min 0 max 127
initSineTable:
ldy #$3f
ldx #$00
; Accumulate the delta (16-bit addition)
init_sine_loop:
lda VALUE
clc
adc DELTA
sta VALUE
lda VALUE+1
adc DELTA+1
sta VALUE+1
; Reflect the value around for a sine wave
sta sine+$c0,x
sta sine+$80,y
eor #$7f
sta sine+$40,x
sta sine+$00,y
; Increase the delta, which creates the
; "acceleration" for a parabola
lda DELTA
adc #$08 ; this value adds up to the proper amplitude
sta DELTA
bcc init_sine_noflo
inc DELTA+1
init_sine_noflo:
; Loop
inx
dey
bpl init_sine_loop
rts