205 lines
4.0 KiB
ArmAsm
205 lines
4.0 KiB
ArmAsm
; Based on BTC.SYSTEM by Oliver Schmidt
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; How to generate proper audio for this:
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; -Open MP3 in Audacity
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; -Change Project Rate (Hz) to 33,000 (bottom left box)
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; -Tracks --> Mix... --> Mix Stereo Down to Mono
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; -File --> Export --> Export as WAV
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; - Select "WAV (Microsoft) signed 16-bit PCM"
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; - Under "Edit Metadata Tags" hit "Clear", then "Okay"
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; -Open saved WAV file in BTc Sound Encoder 3.0
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; -Change Algorithm to "1 bit" (leave fineness as BTc16)
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; -File --> Export binary file .BTC format
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spkr = $C030
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;****************************************************************
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;* Audio playback *
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;****************************************************************
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; audio file in BTC_L/BTC_H
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; pages to play in X
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play_audio:
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ldy #0
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; loop here as long as BITs are [F]alse (aka 0)
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F_NX: NOP ; 2 2
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NOP ; 2 2
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NOP ; 2 2
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BIT $00 ; 3 3
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F_RD: LDA (BTC_L),y ; 5 5 5
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ASL ; 2 2 2
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BCS T_1_SW ; 2/3 2
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NOP ; 2 2
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NOP ; 2 2
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NOP ; 2 2
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NOP ; 2 2
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F_1: JSR delay ; 6 (+13) 19
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ASL ; 2 2 = 31
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BCS T_2_SW ; 2/3
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NOP ; 2
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NOP ; 2
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NOP ; 2
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NOP ; 2
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F_2: JSR delay ; 6 (+13)
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ASL ; 2
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BCS T_3_SW ; 2/3
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NOP ; 2
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NOP ; 2
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NOP ; 2
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NOP ; 2
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F_3: JSR delay ; 6 (+13)
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ASL ; 2
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BCS T_4_SW ; 2/3
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NOP ; 2
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NOP ; 2
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NOP ; 2
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NOP ; 2
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F_4: JSR delay ; 6 (+13)
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ASL ; 2
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BCS T_5_SW ; 2/3
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NOP ; 2
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NOP ; 2
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NOP ; 2
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NOP ; 2
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F_5: JSR delay ; 6 (+13)
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ASL ; 2
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BCS T_6_SW ; 2/3
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NOP ; 2
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NOP ; 2
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NOP ; 2
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NOP ; 2
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F_6: JSR delay ; 6 (+13)
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ASL ; 2
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BCS T_7_SW ; 2/3
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NOP ; 2
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NOP ; 2
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NOP ; 2
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NOP ; 2
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F_7: JSR delay ; 6 (+13)
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ASL ; 2
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BCS T_8_SW ; 2/3 2 2
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NOP ; 2 2 2
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NOP ; 2 2 2
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NOP ; 2 2 2
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NOP ; 2 2 2
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F_8: INY ; 2 2 2
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BNE F_NX ; 2/3 3 = 31 2
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INC BTC_H ; 5 5
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DEX ; 2 2
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BNE F_RD ; 2/3 3 = 31
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RTS
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; click speaker on transitions
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T_1_SW: STA spkr ; 4 [SW]itch to [T]rue on BIT [1]
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BCS T_1 ; 3 (always)
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T_2_SW: STA spkr ; 4 [SW]itch to [T]rue on BIT [2]
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BCS T_2 ; 3 (always)
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T_3_SW: STA spkr ; 4 [SW]itch to [T]rue on BIT [3]
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BCS T_3 ; 3 (always)
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T_4_SW: STA spkr ; 4 [SW]itch to [T]rue on BIT [4]
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BCS T_4 ; 3 (always)
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T_5_SW: STA spkr ; 4 [SW]itch to [T]rue on BIT [5]
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BCS T_5 ; 3 (always)
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T_6_SW: STA spkr ; 4 [SW]itch to [T]rue on BIT [6]
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BCS T_6 ; 3 (always)
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T_7_SW: STA spkr ; 4 [SW]itch to [T]rue on BIT [7]
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BCS T_7 ; 3 (always)
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T_8_SW: STA spkr ; 4 [SW]itch to [T]rue on BIT [8]
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BCS T_8 ; 3 (always)
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F_1_SW: STA spkr ; 4 [SW]itch to [F]alse on BIT [1]
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BCC F_1 ; 3 (always)
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F_2_SW: STA spkr ; 4 [SW]itch to [F]alse on BIT [2]
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BCC F_2 ; 3 (always)
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F_3_SW: STA spkr ; 4 [SW]itch to [F]alse on BIT [3]
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BCC F_3 ; 3 (always)
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F_4_SW: STA spkr ; 4 [SW]itch to [F]alse on BIT [4]
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BCC F_4 ; 3 (always)
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F_5_SW: STA spkr ; 4 [SW]itch to [F]alse on BIT [5]
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BCC F_5 ; 3 (always)
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F_6_SW: STA spkr ; 4 [SW]itch to [F]alse on BIT [6]
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BCC F_6 ; 3 (always)
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F_7_SW: STA spkr ; 4 [SW]itch to [F]alse on BIT [7]
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BCC F_7 ; 3 (always)
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F_8_SW: STA spkr ; 4 [SW]itch to [F]alse on BIT [8]
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BCC F_8 ; 3 (always)
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; loop here as long as BITs are [T]rue (aka 1)
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T_NX: NOP ; 2
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NOP ; 2
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NOP ; 2
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BIT $00 ; 3
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T_RD: LDA (BTC_L),y ; 5
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ASL ; 2
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BCC F_1_SW ; 2/3
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NOP ; 2
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NOP ; 2
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NOP ; 2
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NOP ; 2
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T_1: JSR delay ; 6 (+13)
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ASL ; 2
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BCC F_2_SW ; 2/3
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NOP ; 2
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NOP ; 2
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NOP ; 2
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NOP ; 2
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T_2: JSR delay ; 6 (+13)
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ASL ; 2
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BCC F_3_SW ; 2/3
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NOP ; 2
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NOP ; 2
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NOP ; 2
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NOP ; 2
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T_3: JSR delay ; 6 (+13)
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ASL ; 2
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BCC F_4_SW ; 2/3
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NOP ; 2
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NOP ; 2
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NOP ; 2
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NOP ; 2
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T_4: JSR delay ; 6 (+13)
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ASL ; 2
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BCC F_5_SW ; 2/3
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NOP ; 2
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NOP ; 2
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NOP ; 2
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NOP ; 2
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T_5: JSR delay ; 6 (+13)
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ASL ; 2
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BCC F_6_SW ; 2/3
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NOP ; 2
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NOP ; 2
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NOP ; 2
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NOP ; 2
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T_6: JSR delay ; 6 (+13)
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ASL ; 2
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BCC F_7_SW ; 2/3
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NOP ; 2
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NOP ; 2
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NOP ; 2
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NOP ; 2
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T_7: JSR delay ; 6 (+13)
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ASL ; 2
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BCC F_8_SW ; 2/3
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NOP ; 2
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NOP ; 2
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NOP ; 2
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NOP ; 2
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T_8: INY ; 2
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BNE T_NX ; 2/3
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INC BTC_H ; 5
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DEX ; 2
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BNE T_RD ; 2/3
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RTS
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delay:
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nop ; 2
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nop ; 2
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BIT $00 ; 3
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RTS ; 6 = 13
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