189 lines
5.0 KiB
ArmAsm
189 lines
5.0 KiB
ArmAsm
; ZP addresses
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; left channel
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MOCK_6522_1_ORB = $C400 ; 6522 #1 port b data
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MOCK_6522_1_ORA = $C401 ; 6522 #1 port a data
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MOCK_6522_1_DDRB = $C402 ; 6522 #1 data direction port B
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MOCK_6522_1_DDRA = $C403 ; 6522 #1 data direction port A
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MOCK_6522_1_T1C_L = $C404 ; 6522 #1 Low-order counter
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MOCK_6522_1_T1C_H = $C405 ; 6522 #1 High-order counter
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MOCK_6522_1_T1L_L = $C406 ; 6522 #1 Low-order latch
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MOCK_6522_1_T1L_H = $C407 ; 6522 #1 High-order latch
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MOCK_6522_1_T2C_L = $C408 ; 6522 #1 Timer2 Low-order Latch/Counter
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MOCK_6522_1_T2C_H = $C409 ; 6522 #1 Timer2 High-order Latch/Counter
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MOCK_6522_1_SR = $C40A ; 6522 #1 Shift Register
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MOCK_6522_1_ACR = $C40B ; 6522 #1 Auxiliary Control Register
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MOCK_6522_1_PCR = $C40C ; 6522 #1 Peripheral Control Register
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MOCK_6522_1_IFR = $C40D ; 6522 #1 Interrupt Flag Register
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MOCK_6522_1_IER = $C40E ; 6522 #1 Interrupt Enable Register
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MOCK_6522_1_ORAN = $C40F ; 6522 #1 port a data, no handshake
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; right channel
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MOCK_6522_2_ORB = $C480 ; 6522 #2 port b data
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MOCK_6522_2_ORA = $C481 ; 6522 #2 port a data
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MOCK_6522_2_DDRB = $C482 ; 6522 #2 data direction port B
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MOCK_6522_2_DDRA = $C483 ; 6522 #2 data direction port A
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MOCK_6522_2_T1C_L = $C484 ; 6522 #2 Low-order counter
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MOCK_6522_2_T1C_H = $C485 ; 6522 #2 High-order counter
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MOCK_6522_2_T1L_L = $C486 ; 6522 #2 Low-order latch
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MOCK_6522_2_T1L_H = $C487 ; 6522 #2 High-order latch
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MOCK_6522_2_T2C_L = $C488 ; 6522 #2 Timer2 Low-order Latch/Counter
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MOCK_6522_2_T2C_H = $C489 ; 6522 #2 Timer2 High-order Latch/Counter
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MOCK_6522_2_SR = $C48A ; 6522 #2 Shift Register
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MOCK_6522_2_ACR = $C48B ; 6522 #2 Auxiliary Control Register
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MOCK_6522_2_PCR = $C48C ; 6522 #2 Peripheral Control Register
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MOCK_6522_2_IFR = $C48D ; 6522 #2 Interrupt Flag Register
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MOCK_6522_2_IER = $C48E ; 6522 #2 Interrupt Enable Register
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MOCK_6522_2_ORAN = $C48F ; 6522 #2 port a data, no handshake
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; AY-3-8910 commands on port B
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; RESET BDIR BC1
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MOCK_AY_RESET = $0 ; 0 0 0
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MOCK_AY_INACTIVE = $4 ; 1 0 0
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MOCK_AY_READ = $5 ; 1 0 1
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MOCK_AY_WRITE = $6 ; 1 1 0
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MOCK_AY_LATCH_ADDR = $7 ; 1 1 1
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;========================
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; Mockingboard Init
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;========================
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; Initialize the 6522s
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; set the data direction for all pins of PortA/PortB to be output
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mockingboard_init:
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lda #$ff ; all 8 pins output (1), portA
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sta MOCK_6522_1_DDRA
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sta MOCK_6522_2_DDRA
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; only 3 pins output (1), port B
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lda #$7
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sta MOCK_6522_1_DDRB
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sta MOCK_6522_2_DDRB
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reset_ay_both:
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;======================
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; Reset Left AY-3-8910
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;======================
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reset_ay_left:
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lda #MOCK_AY_RESET
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sta MOCK_6522_1_ORB
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lda #MOCK_AY_INACTIVE
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sta MOCK_6522_1_ORB
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; AY-3-8913: Wait 5 us
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nop
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nop
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nop
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nop
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nop
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;======================
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; Reset Right AY-3-8910
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;======================
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reset_ay_right:
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lda #MOCK_AY_RESET
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sta MOCK_6522_2_ORB
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lda #MOCK_AY_INACTIVE
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sta MOCK_6522_2_ORB
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; AY-3-8913: Wait 5 us
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nop
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nop
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nop
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nop
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nop
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;=========================
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; Setup initial conditions
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;=========================
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; 7: ENABLE
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ldx #7
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lda #$38 ; noise disabled, ABC enabled
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sta MB_VALUE
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jsr write_ay_both
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rts
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;=========================================
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; Write Right/Left to save value AY-3-8910
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;=========================================
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; register in X
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; value in MB_VALUE
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write_ay_both:
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; address
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stx MOCK_6522_1_ORA ; put address on PA1 ; 4
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stx MOCK_6522_2_ORA ; put address on PA2 ; 4
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lda #MOCK_AY_LATCH_ADDR ; latch_address on PB1 ; 2
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sta MOCK_6522_1_ORB ; latch_address on PB1 ; 4
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sta MOCK_6522_2_ORB ; latch_address on PB2 ; 4
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lda #MOCK_AY_INACTIVE ; go inactive ; 2
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sta MOCK_6522_1_ORB ; 4
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sta MOCK_6522_2_ORB ; 4
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;===========
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; 28
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; value
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lda MB_VALUE ; 3
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sta MOCK_6522_1_ORA ; put value on PA1 ; 4
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sta MOCK_6522_2_ORA ; put value on PA2 ; 4
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lda #MOCK_AY_WRITE ; ; 2
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sta MOCK_6522_1_ORB ; write on PB1 ; 4
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sta MOCK_6522_2_ORB ; write on PB2 ; 4
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lda #MOCK_AY_INACTIVE ; go inactive ; 2
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sta MOCK_6522_1_ORB ; 4
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sta MOCK_6522_2_ORB ; 4
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;===========
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; 31
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rts ; 6
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;===========
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; 65
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;=======================================
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; Detect a Mockingboard card in Slot4
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;=======================================
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; Based on code from the French Touch "Pure Noise" Demo
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; Attempts to time an instruction sequence with a 6522
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;
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; MB_ADDRL:MB_ADDRH has address of Mockingboard
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; returns X=0 if not found, X=1 if found
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mockingboard_detect_slot4:
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lda #0
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sta MB_ADDRL
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mb4_detect_loop: ; self-modifying
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lda #$04 ; we're only looking in Slot 4
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ora #$C0 ; make it start with C
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sta MB_ADDRH
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ldy #04 ; $CX04
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ldx #02 ; 2 tries?
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mb4_check_cycle_loop:
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lda (MB_ADDRL),Y ; timer 6522 (Low Order Counter)
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; count down
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sta TEMP ; 3 cycles
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lda (MB_ADDRL),Y ; + 5 cycles = 8 cycles
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; between the two accesses to the timer
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sec
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sbc TEMP ; subtract to see if we had 8 cycles
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cmp #$f8 ; -8
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bne mb4_not_in_this_slot
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dex ; decrement, try one more time
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bne mb4_check_cycle_loop ; loop detection
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inx ; Mockingboard found (X=1)
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done_mb4_detect:
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rts ; return
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mb4_not_in_this_slot:
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ldx #00
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beq done_mb4_detect
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