mirror of
https://github.com/bobbimanners/emailler.git
synced 2024-12-28 11:30:23 +00:00
allow flashing of MK3 EEPROM
git-svn-id: http://svn.code.sf.net/p/netboot65/code@319 93682198-c243-4bdb-bd91-e943c89aac3b
This commit is contained in:
jonnosan
parent
aa4bb37056
commit
6f13582f2e
@ -47,6 +47,9 @@ wizboot.bin: wizboot.o $(IP65WIZNETLIB) $(C64WIZNETLIB) $(INCFILES) ../cfg/c64_8
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wizboot.prg: wizboot.bin cartheader.prg
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cat cartheader.prg wizboot.bin > $@
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wizflash.prg: wizboot.bin wizflashheader.prg
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cat wizflashheader.prg wizboot.bin > $@
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telnetd.o: ../carts/telnetd.s $(INCFILES) timestamp.rb
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$(AS) $(AFLAGS) ../carts/telnetd.s -o telnetd.o
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@ -64,8 +67,11 @@ wizbobcart.bin: wizbobcart.o $(IP65WIZNETLIB) $(C64WIZNETLIB) $(INCFILES) wizbob
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wizbobcart.prg: wizbobcart.bin cartheader.prg
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cat cartheader.prg wizbobcart.bin > $@
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wiztest.d64: wiztest.prg
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ripxplore.rb -I CbmDos -a wiztest.prg $@
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wiztest.d64: wiztest.prg wizboot.prg wizflash.prg
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ripxplore.rb -I CbmDos $@
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ripxplore.rb -a wizboot.prg $@
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ripxplore.rb -a wiztest.prg $@
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ripxplore.rb -a wizflash.prg $@
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clean:
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rm -f *.o *.bin *.map *.prg *.pg2 *.dsk *.d64
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@ -87,4 +93,5 @@ bootc64.prg:
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# cp wizbobcart.prg ../../server/boot/bootc64.prg
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# cp telnetd.prg ../../server/boot/bootc64.prg
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# cp wizboot2.prg ../../server/boot/bootc64.prg
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cp wiztest.prg ../../server/boot/bootc64.prg
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cp wiztest.prg ../../server/boot/bootc64.prg
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# cp wizflash.prg ../../server/boot/bootc64.prg
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@ -72,7 +72,6 @@ call_downloaded_prg:
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.code
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cold_init:
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;first let the kernal do a normal startup
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@ -82,6 +81,30 @@ cold_init:
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jsr $fd15 ;set vectors for KERNAL
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jsr $ff5B ;init. VIC
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cli ;KERNAL init. finished
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;do the 'secret knock' to disable writes to the EEPROM
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lda #$55
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sta $9c55
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lda #$aa
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sta $83aa
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lda #$05
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sta $9c55
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@poll_loop:
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lda $8000
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cmp $8000
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bne @poll_loop
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;copy ourselves to the C64 RAM
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;so if we go into 'SHUTUP' mode, we keep executing from the same address, in C64 RAM
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ldax #$8000
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stax copy_src
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stax copy_dest
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ldax #$2000
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jsr copymem
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warm_init:
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289
client/wiznet/wizflashheader.s
Normal file
289
client/wiznet/wizflashheader.s
Normal file
@ -0,0 +1,289 @@
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.include "../inc/common.i"
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print_a = $ffd2
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.zeropage
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cart_data_ptr: .res 2
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eeprom_ptr: .res 2
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pptr: .res 2
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.segment "STARTUP" ;this is what gets put at the start of the file on the C64
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.word basicstub ; load address
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basicstub:
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.word @nextline
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.word 2003
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.byte $9e
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.byte <(((init / 1000) .mod 10) + $30)
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.byte <(((init / 100 ) .mod 10) + $30)
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.byte <(((init / 10 ) .mod 10) + $30)
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.byte <(((init ) .mod 10) + $30)
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.byte 0
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@nextline:
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.word 0
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init:
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ldax #banner
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jsr print
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cli
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ldax #$8000
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stax eeprom_ptr
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;set up access to READ/WRITE external ROM
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lda #$37
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sta $01
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sta $de02 ;leave 'shut up' mode
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sta $de08 ;enable ROM
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sta $de0a ;set banking bit 0
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sta $de0c ;set banking bit 1
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lda $d011
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sta old_d011
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and #$ef ;turn off bit 4
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sta $d011
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jsr turn_off_write_protect
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ldax #cart_data
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stax cart_data_ptr
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ldax #$8000
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stax eeprom_ptr
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@copy_64_bytes:
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; lda cart_data_ptr+1
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; jsr print_hex
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; lda cart_data_ptr
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; jsr print_hex
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; lda eeprom_ptr+1
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; jsr print_hex
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; lda eeprom_ptr
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; jsr print_hex
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inc $d020
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ldy #0
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@copy_1_byte:
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lda (cart_data_ptr),y
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sta (eeprom_ptr),y
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iny
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cpy #64
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bne @copy_1_byte
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jsr poll_till_stable
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clc
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tya
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adc eeprom_ptr
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sta eeprom_ptr
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bcc :+
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inc eeprom_ptr+1
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:
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clc
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tya
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adc cart_data_ptr
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sta cart_data_ptr
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bcc :+
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inc cart_data_ptr+1
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:
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lda eeprom_ptr+1
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cmp #$A0
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bne @copy_64_bytes
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;now validate the data
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ldax #cart_data
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stax cart_data_ptr
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ldax #$8000
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stax eeprom_ptr
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ldy #0
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@compare_loop:
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lda (cart_data_ptr),y
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cmp (eeprom_ptr),y
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bne @validation_error
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iny
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bne @compare_loop
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inc cart_data_ptr+1
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inc eeprom_ptr+1
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lda eeprom_ptr+1
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cmp #$A0
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bne @compare_loop
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ldax #ok
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jsr print
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ldax #$8000
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stax eeprom_ptr
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jsr turn_on_write_protect
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jmp @exit_to_basic
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@validation_error:
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sty error_offset
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ldax #validation_error
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jsr print
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lda eeprom_ptr+1
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jsr print_hex
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lda eeprom_ptr
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jsr print_hex
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ldax #offset
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jsr print
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lda error_offset
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jsr print_hex
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jsr print_cr
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ldax #wr
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jsr print
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lda #0
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sta byte_ptr
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@wr_loop:
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ldy byte_ptr
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lda (cart_data_ptr),y
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jsr print_hex
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lda byte_ptr
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cmp error_offset
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beq :+
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inc byte_ptr
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bne @wr_loop
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:
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jsr print_cr
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ldax #rd
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jsr print
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lda #0
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sta byte_ptr
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@rd_loop:
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ldy byte_ptr
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lda (eeprom_ptr),y
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jsr print_hex
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lda byte_ptr
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cmp error_offset
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beq :+
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inc byte_ptr
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bne @rd_loop
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:
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jsr print_cr
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;if there is an error somewhere in the eeprom, but we have a valid 'CBM80' header bad things can happen
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;so overwrite the signature bytes
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lda #$FF
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sta $8004
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sta $8005
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sta $8006
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sta $8007
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sta $8008
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@exit_to_basic:
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sei
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lda old_d011
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sta $d011
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rts
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turn_off_write_protect:
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;do the 'secret knock' to enable writes
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lda #$55
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sta $9c55
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lda #$aa
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sta $83aa
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lda #$01
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sta $9c55
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lda #$55
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sta $9c55
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lda #$aa
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sta $83aa
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lda #$04
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sta $9c55
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jmp poll_till_stable
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turn_on_write_protect:
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;do the 'secret knock' to disable writes
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lda #$55
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sta $9c55
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lda #$aa
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sta $83aa
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lda #$05
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sta $9c55
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poll_till_stable:
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ldax eeprom_ptr
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stax @offset_1+1
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stax @offset_2+1
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@poll_loop:
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@offset_1:
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lda $8000 ;address will get overwritten
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@offset_2:
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cmp $8000 ;address will get overwritten
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bne poll_till_stable
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@done:
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rts
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print_cr:
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lda #13
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jmp print_a
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print:
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sta pptr
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stx pptr + 1
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@print_loop:
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ldy #0
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lda (pptr),y
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beq @done_print
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jsr print_a
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inc pptr
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bne @print_loop
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inc pptr+1
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bne @print_loop ;if we ever get to $ffff, we've probably gone far enough ;-)
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@done_print:
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rts
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print_hex:
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pha
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pha
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lsr
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lsr
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lsr
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lsr
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tax
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lda hexdigits,x
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jsr print_a
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pla
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and #$0F
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tax
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lda hexdigits,x
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jsr print_a
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pla
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rts
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.rodata
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hexdigits:
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.byte "0123456789ABCDEF"
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banner:
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.byte 147 ;cls
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.byte 142 ;upper case
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.byte 13," RR-NET MK3 FLASHER V0.02"
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.include "timestamp.i"
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.byte 13
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.byte 0
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ok: .byte 13,"OK",13,0
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validation_error:
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.byte 13,"VALIDATION ERROR : $",0
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offset: .byte " OFFSET : $",0
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rd: .byte "RD :",0
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wr: .byte "WR :",0
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.bss
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cart_data: ;this should point to where the cart data gets appended.
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.res $2000
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error_offset: .res 1
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byte_ptr: .res 1
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old_d011: .res 1
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@ -70,11 +70,36 @@ init:
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ldax #banner
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jsr print
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lda #0
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sta clockport_mode
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lda $de01
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and #$fe ;turn off clockport
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sta $de01
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lda #$80 ;reset
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sta WIZNET_MODE_REG
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lda WIZNET_MODE_REG
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bne @try_clockport
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;writing a byte to the MODE register with bit 7 set should reset.
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;after a reset, mode register is zero
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;therefore, if there is a real W5100 at the specified address,
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;we should be able to write a $80 and read back a $00
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lda #$13 ;set indirect mode, with autoinc, no auto PING
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sta WIZNET_MODE_REG
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lda WIZNET_MODE_REG
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cmp #$13
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beq @w5100_found
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@try_clockport:
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inc clockport_mode
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;now try with clockport on
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lda $de01
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ora #1 ;turn on clockport
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sta $de01
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lda #$80 ;reset
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sta WIZNET_MODE_REG
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lda WIZNET_MODE_REG
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@ -102,6 +127,9 @@ init:
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bne @error
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;make sure if we write to mode register without bit 7 set,
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;the value persists.
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@w5100_found:
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ldax #w5100_found
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jsr print
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@ -109,6 +137,14 @@ init:
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jsr print_hex
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lda #<WIZNET_MODE_REG
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jsr print_hex
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lda clockport_mode
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bne @clockport
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ldax #direct
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jmp :+
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@clockport:
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ldax #clockport
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:
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jsr print
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jsr print_cr
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@ -127,6 +163,8 @@ init:
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ldax #test_duration
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jsr print
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ldax #test_0
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jsr print
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ldax #test_1
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jsr print
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@ -148,6 +186,8 @@ main:
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bne @not_space
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jsr reset_clock
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@loop_test:
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jsr do_test_0
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bcs main
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jsr do_test_1
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bcs main
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jsr do_test_2
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@ -158,6 +198,12 @@ main:
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bne main
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jmp @loop_test
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@not_space:
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cmp #'0'
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bne @not_0
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jsr reset_clock
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jsr do_test_0
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jmp main
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@not_0:
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cmp #'1'
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bne @not_1
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jsr reset_clock
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@ -185,17 +231,38 @@ main:
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failed:
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ldax #FAILED
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jsr print
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lda #$02
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sta $d020
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sec
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rts
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do_test_0:
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lda #0
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sta address_inc_mode
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ldax #test_0
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jsr print
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lda #$11 ;set indirect mode, with no autoinc, no auto PING
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jmp set_address_mode
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do_test_1:
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lda #0
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sta intersperse_address_reads
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lda #1
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sta address_inc_mode
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|
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ldax #test_1
|
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do_w5100_test:
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jsr print
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lda #$13 ;set indirect mode, with autoinc, no auto PING
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set_address_mode:
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|
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sta WIZNET_MODE_REG
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lda #$06 ;
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sta $D020 ;border
|
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|
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jsr w5100_access_test
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bcs failed
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@ -206,13 +273,19 @@ ok:
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rts
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|
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do_test_2:
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|
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lda #1
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sta intersperse_address_reads
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sta address_inc_mode
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|
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ldax #test_2
|
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jmp do_w5100_test
|
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|
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|
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do_test_3:
|
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lda #$06 ;
|
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sta $D020 ;border
|
||||
|
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ldax #test_3
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jsr print
|
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sei
|
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@ -224,6 +297,9 @@ do_test_3:
|
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lda #1
|
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sta update_clock
|
||||
|
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lda #$11 ;set indirect mode, with no autoinc, no auto PING
|
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sta WIZNET_MODE_REG
|
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|
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;set up the W5100 to trigger an interrupt
|
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lda #1
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lda #$00
|
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@ -236,6 +312,8 @@ do_test_3:
|
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sta WIZNET_ADDR_LO
|
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lda #$00 ;retry period high byte
|
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sta WIZNET_DATA_REG
|
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lda #$18 ;retry period
|
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sta WIZNET_ADDR_LO
|
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lda #$01 ;retry period low byte
|
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sta WIZNET_DATA_REG
|
||||
|
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@ -345,7 +423,12 @@ w5100_access_test:
|
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beq :+
|
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lda WIZNET_ADDR_LO ;see if we can force a glitch!
|
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:
|
||||
|
||||
|
||||
lda address_inc_mode
|
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bne :+
|
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inc WIZNET_ADDR_LO ;see if we can force a glitch!
|
||||
:
|
||||
|
||||
inc byte_counter
|
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bne @write_one_byte
|
||||
|
||||
@ -365,7 +448,12 @@ w5100_access_test:
|
||||
beq @ok
|
||||
sec
|
||||
rts
|
||||
@ok:
|
||||
@ok:
|
||||
lda address_inc_mode
|
||||
bne :+
|
||||
inc WIZNET_ADDR_LO ;see if we can force a glitch!
|
||||
:
|
||||
|
||||
inx
|
||||
bne @test_one_byte
|
||||
|
||||
@ -513,7 +601,7 @@ get_key:
|
||||
banner:
|
||||
.byte $93 ;CLS
|
||||
.byte $9a;
|
||||
.byte $0d,"RR-NET MK3 DIAGNOSTICS 0.21"
|
||||
.byte $0d,"RR-NET MK3 DIAGNOSTICS 0.23"
|
||||
|
||||
.include "timestamp.i"
|
||||
.byte $0d
|
||||
@ -528,33 +616,37 @@ test_duration:
|
||||
|
||||
OK:
|
||||
.byte 157,157,"OK ",0
|
||||
FAILED:
|
||||
.byte 157,157,"!!",0
|
||||
|
||||
test_0:
|
||||
.byte $13 ;home
|
||||
.byte $11,$11,$11,$11,$11,$11,$11
|
||||
.byte "0) W5100 MEMORY ACCESS 0 : "
|
||||
.byte 0
|
||||
|
||||
test_1:
|
||||
.byte $13 ;home
|
||||
.byte $11,$11,$11,$11,$11,$11,$11
|
||||
.byte $11,$11,$11,$11,$11,$11,$11,$11
|
||||
.byte "1) W5100 MEMORY ACCESS 1 : "
|
||||
.byte 0
|
||||
test_2:
|
||||
.byte $13 ;home
|
||||
.byte $11,$11,$11,$11,$11,$11,$11,$11
|
||||
.byte $11,$11,$11,$11,$11,$11,$11,$11,$11
|
||||
.byte "2) W5100 MEMORY ACCESS 2 : "
|
||||
.byte 0
|
||||
test_3:
|
||||
.byte $13 ;home
|
||||
.byte $11,$11,$11,$11,$11,$11,$11,$11,$11
|
||||
.byte $11,$11,$11,$11,$11,$11,$11,$11,$11,$11
|
||||
.byte "3) NMI TEST : "
|
||||
.byte 0
|
||||
prompt:
|
||||
.byte $13 ;home
|
||||
.byte $11,$11,$11,$11,$11,$11,$11,$11,$11,$11,$11,$11
|
||||
.byte "PRESS 1..3 TO RUN A SINGLE TEST",13
|
||||
.byte $11,$11,$11,$11,$11,$11,$11,$11,$11,$11,$11,$11,$11
|
||||
.byte "PRESS 0..3 TO RUN A SINGLE TEST",13
|
||||
.byte "SPACE TO CYCLE ALL TESTS",13
|
||||
.byte 0
|
||||
after_prompt:
|
||||
.byte $13 ;home
|
||||
.byte $11,$11,$11,$11,$11,$11,$11,$11,$11,$11,$11,$11,$11,$11
|
||||
.byte $11,$11,$11,$11,$11,$11,$11,$11,$11,$11,$11,$11,$11,$11,$11
|
||||
.byte 0
|
||||
loop: .byte "TEST $",0
|
||||
not_found: .byte "NO "
|
||||
@ -562,6 +654,9 @@ w5100_found: .byte "W5100 FOUND AT $",0
|
||||
error_offset: .byte 13,"OFFSET $",0
|
||||
was: .byte " WAS $",0
|
||||
reset_cursor: .byte 157,157,0
|
||||
clockport: .byte " [CLOCKPORT]",0
|
||||
direct: .byte " [DIRECT]",0
|
||||
|
||||
.bss
|
||||
last_byte: .res 1
|
||||
loop_count: .res 1
|
||||
@ -575,4 +670,6 @@ old_tick_handler: .res 2
|
||||
update_clock: .res 1
|
||||
tick_counter: .res 1
|
||||
timeout_count: .res 1
|
||||
got_nmi: .res 1
|
||||
got_nmi: .res 1
|
||||
clockport_mode: .res 1
|
||||
address_inc_mode: .res 1
|
||||
Loading…
Reference in New Issue
Block a user