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franklin/ace500_c300_cfff.s

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add ace500
2021-11-07 02:16:53 +00:00
; da65 V2.19 - Git 59c58acbe
; Created: 2021-11-04 15:14:09
; Input file: c300_cfff
; Page: 1
.setcpu "65C02"
wip
2021-11-07 02:41:09 +00:00
.include "opcodes.inc"
Okay now this is amusing...
2021-11-09 04:47:22 +00:00
.feature string_escapes
wip
2021-11-07 02:41:09 +00:00
disasm; and include tentative patches
2021-11-10 02:17:23 +00:00
;;; Set to 1 to include preliminary fixes for:
;;; * MouseText mode failing to exist on $18 output.
INCLUDE_PATCHES = 0
wip
2021-11-07 02:41:09 +00:00
;;; Zero Page
WNDLFT := $20
WNDWDTH := $21
WNDTOP := $22
WNDBTM := $23
CH := $24
CV := $25
BASL := $28
BASH := $29
BAS2L := $2A
BAS2H := $2B
INVFLG := $32
wip
2021-11-08 05:16:34 +00:00
CSWL := $36
CSWH := $37
KSWL := $38
KSWH := $39
wip
2021-11-07 02:41:09 +00:00
A1L := $3C
A1H := $3D
A2L := $3E
A2H := $3F
A4L := $42
A4H := $43
RNDL := $4E
RNDH := $4F
;;; Page 3 Vectors
XFERVEC := $3ED
wip
2021-11-07 02:51:44 +00:00
L03F0 := $3F0 ; ???
L03FE := $3FE ; ???
wip
2021-11-07 02:41:09 +00:00
;;; Screen Holes
SAVEA := $4F8
SAVEX := $578
SAVEY := $478
OLDCH := $47B
MODE := $4FB
;; Bit 7 = Escape Mode
;; Bit 6 = MouseText active
;; Bit 5 = ??? set when "normal"
;; Bit 4 = ??? set when "normal"
;; Bit 3 = ??? unused ???
;; Bit 2 = ??? unused ???
;; Bit 1 = ??? used for ???
;; Bit 0 = ??? used for ???
M_ESC = %10000000
M_MOUSE = %01000000
M_NORMAL= %00110000
disasm; and include tentative patches
2021-11-10 02:17:23 +00:00
M_INACTIVE = $FF ; When firmware is inactive
wip
2021-11-07 02:41:09 +00:00
OURCH := $57B
OURCV := $5FB
wip
2021-11-07 03:56:03 +00:00
CHAR := $67B
wip
2021-11-07 02:41:09 +00:00
XCOORD := $6FB
TEMP1 := $77B ; Unused
OLDBASL := $77B
TEMP2 := $7FB
OLDBASH := $7FB
;;; I/O Soft Switches
KBD := $C000
CLR80COL:= $C000
SET80COL:= $C001
RDMAINRAM := $C002
RDCARDRAM := $C003
WRMAINRAM := $C004
WRCARDRAM := $C005
ALTZPOFF:= $C008
ALTZPON := $C009
CLR80VID:= $C00C
SET80VID:= $C00D
CLRALTCHAR := $C00E
SETALTCHAR := $C00F
KBDSTRB := $C010
RDLCBNK2:= $C011
RDLCRAM := $C012
RDRAMRD := $C013
RDRAMWRT:= $C014
RD80COL := $C018
RDTEXT := $C01A
ALTCHARSET := $C01E
RD80VID := $C01F
TXTPAGE1:= $C054
TXTPAGE2:= $C055
ROMIN := $C081
ROMIN2 := $C082
LCBANK2 := $C083
LCBANK1 := $C08B
;;; Documented Firmware Entry Points
C3KeyIn := $C305
C3COut1 := $C307
AUXMOVE := $C311
XFER := $C314
CLRROM := $CFFF
;;; Monitor ROM
BELLB := $FBE2
SETWND := $FB4B
SETKBD := $FE89
SETVID := $FE93
MON_VTAB:= $FC22
CLREOP := $FC42
HOME := $FC58
CLREOL := $FC9C
;;; ============================================================
wip
2021-11-08 05:16:34 +00:00
.org $C300
wip
2021-11-07 02:41:09 +00:00
wip
2021-11-08 05:16:34 +00:00
;; Init
LC300: bit SETV ; V = init
bra MainEntry
;; Input
.assert * = C3KeyIn, error, "Entry point mismatch"
LC305: sec
.byte OPC_BCC ; never taken; skip next byte
;; Output
.assert * = C3COut1, error, "Entry point mismatch"
LC307: clc
add ace500
2021-11-07 02:16:53 +00:00
clv
wip
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bra MainEntry
;; Signature bytes
.byte $01, $88
;; Pascal 1.1 Firmware Protocol Table
.byte <JPINIT
.byte <JPREAD
.byte <JPWRITE
.byte <JPSTAT
;; AUXMOVE
.assert * = AUXMOVE, error, "Entry point mismatch"
jmp JumpAuxMove
add ace500
2021-11-07 02:16:53 +00:00
wip
2021-11-08 05:16:34 +00:00
;; XFER
.assert * = XFER, error, "Entry point mismatch"
jsr extra_DoBankC5
disasm; and include tentative patches
2021-11-10 02:17:23 +00:00
jmp $CC03 ; ???
add ace500
2021-11-07 02:16:53 +00:00
wip
2021-11-08 05:16:34 +00:00
;;; ============================================================
;;; Pascal Entry Points
add ace500
2021-11-07 02:16:53 +00:00
wip
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JPINIT: jsr ClearROM
jsr PascalInit
LC320: jmp extra_DoBankC5
JPREAD: jsr ClearROM
jsr PascalRead
add ace500
2021-11-07 02:16:53 +00:00
bra LC320
wip
2021-11-08 05:16:34 +00:00
JPWRITE:jsr ClearROM
jsr PascalWrite
add ace500
2021-11-07 02:16:53 +00:00
bra LC320
wip
2021-11-08 05:16:34 +00:00
JPSTAT: jsr ClearROM
jsr PascalStatus
add ace500
2021-11-07 02:16:53 +00:00
bra LC320
wip
2021-11-08 05:16:34 +00:00
JumpAuxMove:
jsr extra_DoBankC5
disasm; and include tentative patches
2021-11-10 02:17:23 +00:00
jmp $CC06
add ace500
2021-11-07 02:16:53 +00:00
wip
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;;; ============================================================
;;; Main Entry Points
MainEntry:
jsr ClearROM
wip
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sta SAVEA
stx SAVEX
sty SAVEY
add ace500
2021-11-07 02:16:53 +00:00
pha
relabel
2021-11-09 17:02:08 +00:00
bvc l1
wip
2021-11-08 05:16:34 +00:00
More disasm. Found another CH/OURCH patch point, too.
2021-11-11 04:28:06 +00:00
;; Init
add ace500
2021-11-07 02:16:53 +00:00
jsr LC806
clc
More disasm. Found another CH/OURCH patch point, too.
2021-11-11 04:28:06 +00:00
relabel
2021-11-09 17:02:08 +00:00
l1: php
add ace500
2021-11-07 02:16:53 +00:00
jsr LC9B4
plp
pla
More disasm. Found another CH/OURCH patch point, too.
2021-11-11 04:28:06 +00:00
bcc l7 ; Input or output?
;; Input
wip
2021-11-07 02:51:44 +00:00
ldx SAVEX
relabel
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beq l2
add ace500
2021-11-07 02:16:53 +00:00
dex
lda $0678
wip
2021-11-08 05:16:34 +00:00
cmp #$88 ; left?
relabel
2021-11-09 17:02:08 +00:00
beq l2
add ace500
2021-11-07 02:16:53 +00:00
cmp $0200,x
relabel
2021-11-09 17:02:08 +00:00
bne l5
add ace500
2021-11-07 02:16:53 +00:00
sta $0200,x
wip
2021-11-08 05:16:34 +00:00
relabel
2021-11-09 17:02:08 +00:00
l2: jsr LC96F
wip
2021-11-08 05:16:34 +00:00
cmp #$9B ; escape?
wip
2021-11-07 04:07:03 +00:00
beq EscapeMode
wip
2021-11-08 05:16:34 +00:00
cmp #$8D ; return?
relabel
2021-11-09 17:02:08 +00:00
bne l3
add ace500
2021-11-07 02:16:53 +00:00
pha
wip
2021-11-07 03:26:27 +00:00
jsr DoClearEOL
add ace500
2021-11-07 02:16:53 +00:00
pla
relabel
2021-11-09 17:02:08 +00:00
l3: cmp #$95 ; right?
bne l4
wip
2021-11-07 02:41:09 +00:00
ldy CH
add ace500
2021-11-07 02:16:53 +00:00
jsr LC9A8
relabel
2021-11-09 17:02:08 +00:00
l4: sta $0678
bra l6
l5: jsr LC822
add ace500
2021-11-07 02:16:53 +00:00
stz $0678
relabel
2021-11-09 17:02:08 +00:00
l6: bra l8
More disasm. Found another CH/OURCH patch point, too.
2021-11-11 04:28:06 +00:00
;; Output
l7: jsr OutputChar
wip
2021-11-07 02:51:44 +00:00
lda SAVEA
More disasm. Found another CH/OURCH patch point, too.
2021-11-11 04:28:06 +00:00
relabel
2021-11-09 17:02:08 +00:00
l8: ldx SAVEX
wip
2021-11-07 02:41:09 +00:00
ldy CH
wip
2021-11-07 02:51:44 +00:00
sty OURCH
sty XCOORD
ldy SAVEY
wip
2021-11-08 05:16:34 +00:00
jmp extra_DoBankC5
add ace500
2021-11-07 02:16:53 +00:00
wip
2021-11-07 04:07:03 +00:00
;;; ============================================================
;;; Escape Mode
EscapeMode:
lda #M_ESC
wip
2021-11-07 02:51:44 +00:00
tsb MODE
add ace500
2021-11-07 02:16:53 +00:00
jsr LC822
wip
2021-11-07 20:52:15 +00:00
jsr ProcessEscapeModeKey
add ace500
2021-11-07 02:16:53 +00:00
cmp #$98
relabel
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beq l4
wip
2021-11-07 02:51:44 +00:00
lda MODE
wip
2021-11-07 04:07:03 +00:00
bmi EscapeMode
relabel
2021-11-09 17:02:08 +00:00
bra l2
wip
2021-11-07 04:07:03 +00:00
;;; ============================================================
wip
2021-11-08 05:16:34 +00:00
ClearROM:
php
add ace500
2021-11-07 02:16:53 +00:00
sei
pha
wip
2021-11-07 02:41:09 +00:00
sta $C0BA ; ???
wip
2021-11-08 05:16:34 +00:00
sta CLRROM
add ace500
2021-11-07 02:16:53 +00:00
lda #$C3
sta $07F8
pla
plp
wip
2021-11-08 05:16:34 +00:00
SETV: rts
;;; ============================================================
add ace500
2021-11-07 02:16:53 +00:00
brk
brk
brk
brk
brk
brk
brk
wip
2021-11-08 05:16:34 +00:00
jsr extra_DoBankC5
disasm; and include tentative patches
2021-11-10 02:17:23 +00:00
jmp $CC00
add ace500
2021-11-07 02:16:53 +00:00
LC3E2: plx
Okay now this is amusing...
2021-11-09 04:47:22 +00:00
bit CLRROM
add ace500
2021-11-07 02:16:53 +00:00
rti
brk
wip
2021-11-08 05:16:34 +00:00
jsr ClearROM
add ace500
2021-11-07 02:16:53 +00:00
jmp LCE0D
wip
2021-11-08 05:16:34 +00:00
jsr ClearROM
add ace500
2021-11-07 02:16:53 +00:00
jmp LCDEC
wip
2021-11-08 05:16:34 +00:00
LC3F4: jsr ClearROM
add ace500
2021-11-07 02:16:53 +00:00
jmp LCCB2
wip
2021-11-08 05:16:34 +00:00
LC3FA: jsr ClearROM
add ace500
2021-11-07 02:16:53 +00:00
jmp LCCF5
wip
2021-11-07 02:41:09 +00:00
;;; ============================================================
.scope extra
LFC24 := $FC24
LFC58 := $FC58
LFC9E := $FC9E
LFDED := $FDED
LFDF0 := $FDF0
LFF4A := $FF4A
add ace500
2021-11-07 02:16:53 +00:00
bit LC42E
bra LC41C
sec
bcc LC420
clv
bra LC41C
ora ($20,x)
bit $2C2C
bit $2F00
and $3B,x
eor ($47,x)
eor $5953
.byte $2C
.byte $5F
wip
2021-11-08 05:16:34 +00:00
LC41C: jsr DoBankC5
add ace500
2021-11-07 02:16:53 +00:00
.byte $50
LC420: .byte $03
jsr LC806
bcc LC429
disasm; and include tentative patches
2021-11-10 02:17:23 +00:00
jmp $C838
add ace500
2021-11-07 02:16:53 +00:00
LC429: jmp LC825
ldx #$03
LC42E: rts
wip
2021-11-08 05:16:34 +00:00
jsr DoBankC5
wip
2021-11-07 03:06:39 +00:00
jmp $C8D4
add ace500
2021-11-07 02:16:53 +00:00
wip
2021-11-08 05:16:34 +00:00
jsr DoBankC5
wip
2021-11-07 03:06:39 +00:00
jmp $C916
add ace500
2021-11-07 02:16:53 +00:00
wip
2021-11-08 05:16:34 +00:00
jsr DoBankC5
wip
2021-11-07 03:06:39 +00:00
jmp $C922
add ace500
2021-11-07 02:16:53 +00:00
wip
2021-11-08 05:16:34 +00:00
jsr DoBankC5
wip
2021-11-07 03:06:39 +00:00
jmp $C958
add ace500
2021-11-07 02:16:53 +00:00
wip
2021-11-08 05:16:34 +00:00
jsr DoBankC5
wip
2021-11-07 03:06:39 +00:00
jmp $C967
add ace500
2021-11-07 02:16:53 +00:00
wip
2021-11-08 05:16:34 +00:00
jsr DoBankC5
wip
2021-11-07 03:06:39 +00:00
jmp $C969
add ace500
2021-11-07 02:16:53 +00:00
wip
2021-11-08 05:16:34 +00:00
jsr DoBankC5
wip
2021-11-07 03:06:39 +00:00
jmp $C93E
add ace500
2021-11-07 02:16:53 +00:00
wip
2021-11-08 05:16:34 +00:00
LC459: jsr DoBankC5
wip
2021-11-07 03:06:39 +00:00
jmp $C8AC
add ace500
2021-11-07 02:16:53 +00:00
ldx $C066
ldy $C067
wip
2021-11-07 02:41:09 +00:00
jmp $C220
add ace500
2021-11-07 02:16:53 +00:00
wip
2021-11-08 05:16:34 +00:00
LC468: jsr DoBankC5
wip
2021-11-07 03:06:39 +00:00
jmp $C9A0
add ace500
2021-11-07 02:16:53 +00:00
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
LC4A0: cld
phx
phy
pha
ldx $C066
ldy $C067
lda $C0BC
pha
sta $C0B9
jmp LC700
pla
bpl LC4BE
wip
2021-11-07 02:41:09 +00:00
sta ALTZPON
add ace500
2021-11-07 02:16:53 +00:00
ldx $0101
txs
LC4BE: ldx $07FF
pla
wip
2021-11-07 02:41:09 +00:00
jsr $C1FA
add ace500
2021-11-07 02:16:53 +00:00
pla
bmi LC4CB
sta $C0B8
LC4CB: sta $C0BA
stx $07F8
pla
ply
cpx #$C1
beq LC4E4
cpx #$C3
beq LC4E7
cpx #$C5
beq LC4EA
plx
sta $C0BB
rti
wip
2021-11-07 02:41:09 +00:00
LC4E4: jmp $C1F2
add ace500
2021-11-07 02:16:53 +00:00
LC4E7: jmp LC3E2
LC4EA: jmp LC5F5
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
LC4F8: jmp LC468
dec $00,x
jmp LC459
wip
2021-11-08 05:16:34 +00:00
jsr BankC5
add ace500
2021-11-07 02:16:53 +00:00
sta $067A
phx
phy
pha
bvc LC50E
wip
2021-11-07 03:06:39 +00:00
jsr $C806
add ace500
2021-11-07 02:16:53 +00:00
LC50E: bcc LC516
wip
2021-11-07 03:06:39 +00:00
jsr $C908
add ace500
2021-11-07 02:16:53 +00:00
plx
bra LC51A
wip
2021-11-07 03:06:39 +00:00
LC516: jsr $C83B
add ace500
2021-11-07 02:16:53 +00:00
pla
LC51A: ply
plx
wip
2021-11-08 05:16:34 +00:00
jmp BankC8
add ace500
2021-11-07 02:16:53 +00:00
wip
2021-11-08 05:16:34 +00:00
jsr BankC5
wip
2021-11-07 03:06:39 +00:00
jsr $C8C7
wip
2021-11-08 05:16:34 +00:00
jmp BankC8
add ace500
2021-11-07 02:16:53 +00:00
wip
2021-11-08 05:16:34 +00:00
jsr BankC5
wip
2021-11-07 03:06:39 +00:00
jsr $C8CD ; ???
wip
2021-11-08 05:16:34 +00:00
bra BankC8
wip
2021-11-07 03:06:39 +00:00
wip
2021-11-08 05:16:34 +00:00
jsr BankC5
wip
2021-11-07 03:06:39 +00:00
jsr $C8D2
wip
2021-11-08 05:16:34 +00:00
bra BankC8
wip
2021-11-07 03:06:39 +00:00
wip
2021-11-08 05:16:34 +00:00
jsr BankC5
wip
2021-11-07 03:06:39 +00:00
jsr $C8DA
wip
2021-11-08 05:16:34 +00:00
bra BankC8
wip
2021-11-07 03:06:39 +00:00
wip
2021-11-08 05:16:34 +00:00
jsr BankC8
add ace500
2021-11-07 02:16:53 +00:00
ora #$80
jsr LFDF0
wip
2021-11-08 05:16:34 +00:00
bra BankC5
wip
2021-11-07 03:06:39 +00:00
wip
2021-11-08 05:16:34 +00:00
jsr BankC8
add ace500
2021-11-07 02:16:53 +00:00
ora #$80
jsr LFDED
wip
2021-11-08 05:16:34 +00:00
bra BankC5
wip
2021-11-07 03:06:39 +00:00
wip
2021-11-08 05:16:34 +00:00
jsr BankC8
add ace500
2021-11-07 02:16:53 +00:00
jsr LC3F4
wip
2021-11-08 05:16:34 +00:00
bra BankC5
wip
2021-11-07 03:06:39 +00:00
wip
2021-11-08 05:16:34 +00:00
jsr BankC8
add ace500
2021-11-07 02:16:53 +00:00
jsr LC3FA
and #$7F
wip
2021-11-08 05:16:34 +00:00
bra BankC5
wip
2021-11-07 03:06:39 +00:00
wip
2021-11-08 05:16:34 +00:00
jsr BankC8
add ace500
2021-11-07 02:16:53 +00:00
jsr LFC9E
wip
2021-11-08 05:16:34 +00:00
bra BankC5
wip
2021-11-07 03:06:39 +00:00
wip
2021-11-08 05:16:34 +00:00
jsr BankC8
add ace500
2021-11-07 02:16:53 +00:00
jsr LFC58
wip
2021-11-08 05:16:34 +00:00
bra BankC5
wip
2021-11-07 03:06:39 +00:00
wip
2021-11-08 05:16:34 +00:00
jsr BankC8
add ace500
2021-11-07 02:16:53 +00:00
jsr LC300
wip
2021-11-08 05:16:34 +00:00
bra BankC5
wip
2021-11-07 03:06:39 +00:00
wip
2021-11-08 05:16:34 +00:00
jsr BankC8
add ace500
2021-11-07 02:16:53 +00:00
jsr LC4F8
wip
2021-11-08 05:16:34 +00:00
bra BankC5
wip
2021-11-07 03:06:39 +00:00
wip
2021-11-08 05:16:34 +00:00
jsr BankC8
add ace500
2021-11-07 02:16:53 +00:00
jsr LC7FD
wip
2021-11-08 05:16:34 +00:00
bra BankC5
wip
2021-11-07 03:06:39 +00:00
wip
2021-11-08 05:16:34 +00:00
jsr BankC8
add ace500
2021-11-07 02:16:53 +00:00
jsr LFC24
wip
2021-11-08 05:16:34 +00:00
;; Fall through
;;; ============================================================
;;; Hypothesis: This banks in a special "C5" C800-CFFF
BankC5: php
add ace500
2021-11-07 02:16:53 +00:00
sei
pha
lda #$C5
sta $07F8
sta $C0BA
sta $C0B8
Okay now this is amusing...
2021-11-09 04:47:22 +00:00
sta CLRROM
add ace500
2021-11-07 02:16:53 +00:00
pla
plp
rts
wip
2021-11-08 05:16:34 +00:00
;;; ============================================================
;;; Hypothesis: This banks in a special "C8" C800-CFFF
BankC8: php
add ace500
2021-11-07 02:16:53 +00:00
sei
pha
lda #$C8
sta $07F8
sta $C0BB
sta $C0B9
pla
plp
rts
wip
2021-11-08 05:16:34 +00:00
;;; ============================================================
jsr BankC8
add ace500
2021-11-07 02:16:53 +00:00
LC5BC: bit $C1C1
bmi LC5BC
sta $C090
wip
2021-11-08 05:16:34 +00:00
bra BankC5
LC5C6: jsr BankC5
wip
2021-11-07 20:52:15 +00:00
jsr $C9A5
wip
2021-11-08 05:16:34 +00:00
bra BankC8
add ace500
2021-11-07 02:16:53 +00:00
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
LC5F5: plx
Okay now this is amusing...
2021-11-09 04:47:22 +00:00
bit CLRROM
add ace500
2021-11-07 02:16:53 +00:00
rti
wip
2021-11-08 05:16:34 +00:00
;;; ============================================================
DoBankC5:
jmp BankC8
;;; ============================================================
add ace500
2021-11-07 02:16:53 +00:00
jmp LC5C6
bit $20
cpy $00
ldx #$03
wip
2021-11-07 02:41:09 +00:00
asl A1L
wip
2021-11-08 05:16:34 +00:00
jsr DoBankC5
add ace500
2021-11-07 02:16:53 +00:00
ldy #$69
Okay now this is amusing...
2021-11-09 04:47:22 +00:00
LC60D: lda $CF26,y
add ace500
2021-11-07 02:16:53 +00:00
sta $036C,y
dey
bpl LC60D
ldx #$60
wip
2021-11-07 02:41:09 +00:00
LC618: inc BAS2H
cpx BAS2H
add ace500
2021-11-07 02:16:53 +00:00
bne LC618
wip
2021-11-07 20:52:15 +00:00
jsr $CEA6
add ace500
2021-11-07 02:16:53 +00:00
LC621: dec $41
bne LC621
wip
2021-11-07 02:41:09 +00:00
LC625: dec A1H
add ace500
2021-11-07 02:16:53 +00:00
bne LC625
LC629: dec $26
bne LC629
LC62D: dec $27
lda $27
cmp #$08
bne LC62D
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
pha
nop
nop
nop
nop
nop
nop
bra LC683
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
LC683: pla
wip
2021-11-08 05:16:34 +00:00
LC684: jsr DoBankC5
add ace500
2021-11-07 02:16:53 +00:00
jsr LCE00
bra LC6EA
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
wip
2021-11-07 02:51:44 +00:00
ldy #$56 ; ???
wip
2021-11-07 02:41:09 +00:00
sty A1L
add ace500
2021-11-07 02:16:53 +00:00
sec
clv
wip
2021-11-07 02:51:44 +00:00
jmp $CE51
add ace500
2021-11-07 02:16:53 +00:00
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
LC6EA: nop
wip
2021-11-07 02:41:09 +00:00
lda A1H
add ace500
2021-11-07 02:16:53 +00:00
inc a
wip
2021-11-07 02:41:09 +00:00
sta A1H
add ace500
2021-11-07 02:16:53 +00:00
inc $27
cmp $0800
bcc LC684
ldy #$00
wip
2021-11-07 02:41:09 +00:00
ldx BAS2H
jmp $0801
add ace500
2021-11-07 02:16:53 +00:00
.byte $DE
brk
wip
2021-11-07 02:41:09 +00:00
LC700: jsr $C1F7
add ace500
2021-11-07 02:16:53 +00:00
pha
wip
2021-11-07 02:41:09 +00:00
jsr $C1FD
add ace500
2021-11-07 02:16:53 +00:00
lda $07F8
sta $07FF
phx
tsx
txa
clc
adc #$07
tax
lda $0100,x
plx
and #$10
bne LC747
wip
2021-11-07 02:41:09 +00:00
jsr $C220
add ace500
2021-11-07 02:16:53 +00:00
bcc LC744
jsr LC784
bcc LC744
pla
pha
bpl LC739
txa
tsx
stx $0101
ldx $0100
txs
tax
wip
2021-11-07 02:41:09 +00:00
sta ALTZPOFF
add ace500
2021-11-07 02:16:53 +00:00
lda #$80
LC739: pha
lda #$C4
pha
lda #$B4
pha
php
jmp (L03FE)
LC744: jmp LC4BE
LC747: pla
sta $44
pla
bpl LC751
lda #$01
tsb $44
LC751: pla
ply
plx
plp
jsr LFF4A
pla
sta $3A
ply
sty $3B
bit $C016
bpl LC781
tsx
stx $0101
ldx $0100
txs
wip
2021-11-07 02:41:09 +00:00
sta ALTZPOFF
add ace500
2021-11-07 02:16:53 +00:00
sta $3A
sty $3B
ldx #$05
wip
2021-11-07 02:41:09 +00:00
LC774: sta ALTZPON
add ace500
2021-11-07 02:16:53 +00:00
lda $44,x
wip
2021-11-07 02:41:09 +00:00
sta ALTZPOFF
add ace500
2021-11-07 02:16:53 +00:00
sta $44,x
dex
bpl LC774
LC781: jmp (L03F0)
LC784: sec
lda $C0AA
tax
and #$0C
eor #$04
beq LC7E4
lda $C0A9
LC792: sta $04FA
ora #$00
bpl LC7E4
and #$08
beq LC7BD
txa
and #$03
eor #$01
bne LC7BD
lda $04FF
eor #$C2
bne LC7E4
lda $C0A8
ldx $057F
jsr LC7E5
bpl LC7B8
ldx #$00
LC7B8: stx $057F
bra LC7E3
LC7BD: .byte $2C
plx
LC7BF: tsb $50
and ($2C,x)
plx
ora $70
ora $1A10,x
wip
2021-11-07 02:41:09 +00:00
lda KBD
add ace500
2021-11-07 02:16:53 +00:00
bit $C0B4
bmi LC7D3
and #$7F
wip
2021-11-07 02:41:09 +00:00
LC7D3: bit KBDSTRB
add ace500
2021-11-07 02:16:53 +00:00
ldx $05FF
jsr LC7E5
bne LC7E0
ldx #$80
LC7E0: stx $05FF
LC7E3: clc
LC7E4: rts
wip
2021-11-07 02:41:09 +00:00
LC7E5: sta WRCARDRAM
add ace500
2021-11-07 02:16:53 +00:00
sta $0800,x
wip
2021-11-07 02:41:09 +00:00
sta WRMAINRAM
add ace500
2021-11-07 02:16:53 +00:00
inx
rts
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
LC7FD: jmp LC792
wip
2021-11-07 02:41:09 +00:00
.endscope
wip
2021-11-08 05:16:34 +00:00
extra_DoBankC5 := extra::DoBankC5
wip
2021-11-07 02:41:09 +00:00
;;; ============================================================
.res $C800 - *, 0
;;; ============================================================
add ace500
2021-11-07 02:16:53 +00:00
wip
2021-11-07 02:41:09 +00:00
LC800: .byte $C3
add ace500
2021-11-07 02:16:53 +00:00
eor $AA,x
wip
2021-11-07 02:41:09 +00:00
jmp $C4A0 ; bad disasm?
add ace500
2021-11-07 02:16:53 +00:00
wip
2021-11-08 05:16:34 +00:00
LC806: lda #<LC305
sta KSWL
ldx #>LC305
stx KSWH
lda #<LC307
sta CSWL
stx CSWH
disasm; and include tentative patches
2021-11-10 02:17:23 +00:00
LC814: lda #M_NORMAL
wip
2021-11-07 02:51:44 +00:00
sta MODE
More disasm. Found another CH/OURCH patch point, too.
2021-11-11 04:28:06 +00:00
jsr Enable80Col
add ace500
2021-11-07 02:16:53 +00:00
jsr LCE33
wip
2021-11-07 03:26:27 +00:00
jmp DoHomeAndClear
add ace500
2021-11-07 02:16:53 +00:00
More disasm. Found another CH/OURCH patch point, too.
2021-11-11 04:28:06 +00:00
;;; ============================================================
add ace500
2021-11-07 02:16:53 +00:00
LC822: jsr LCBE1
wip
2021-11-07 02:41:09 +00:00
LC825: inc RNDL
add ace500
2021-11-07 02:16:53 +00:00
bne LC82B
wip
2021-11-07 02:41:09 +00:00
inc RNDH
add ace500
2021-11-07 02:16:53 +00:00
LC82B: jsr LCCB8
bcc LC825
jsr LCCFB
cmp #$06
bcc LC840
disasm; and include tentative patches
2021-11-10 02:17:23 +00:00
and #$7F
sta CHAR
ora #$80
bra LC843
wip
2021-11-07 03:56:03 +00:00
LC840: sta CHAR
disasm; and include tentative patches
2021-11-10 02:17:23 +00:00
LC843: pha
add ace500
2021-11-07 02:16:53 +00:00
jsr LCBF8
disasm; and include tentative patches
2021-11-10 02:17:23 +00:00
pla
add ace500
2021-11-07 02:16:53 +00:00
rts
wip
2021-11-07 20:52:15 +00:00
;;; ============================================================
More disasm. Found another CH/OURCH patch point, too.
2021-11-11 04:28:06 +00:00
OutputChar:
sta CHAR
wip
2021-11-07 20:52:15 +00:00
LC84C: jsr CheckPauseListing
wip
2021-11-07 02:51:44 +00:00
lda MODE
add ace500
2021-11-07 02:16:53 +00:00
and #$03
wip
2021-11-07 20:52:15 +00:00
beq @l1
add ace500
2021-11-07 02:16:53 +00:00
jmp LCA2F
wip
2021-11-07 20:52:15 +00:00
@l1: lda CHAR
add ace500
2021-11-07 02:16:53 +00:00
and #$7F
cmp #$20
wip
2021-11-07 03:06:39 +00:00
bcc DoCtrlCharOut
wip
2021-11-07 02:41:09 +00:00
ldy CH
cpy WNDWDTH
wip
2021-11-07 20:52:15 +00:00
bcc @l2
wip
2021-11-07 03:26:27 +00:00
jsr DoReturn
wip
2021-11-07 20:52:15 +00:00
@l2: lda CHAR
wip
2021-11-07 02:41:09 +00:00
bit INVFLG
wip
2021-11-07 20:52:15 +00:00
bmi @l3
add ace500
2021-11-07 02:16:53 +00:00
and #$7F
wip
2021-11-07 02:51:44 +00:00
bit MODE
wip
2021-11-07 20:52:15 +00:00
bvs @l3
wip
2021-11-07 02:41:09 +00:00
bit ALTCHARSET
wip
2021-11-07 20:52:15 +00:00
bpl @l3
add ace500
2021-11-07 02:16:53 +00:00
cmp #$40
wip
2021-11-07 20:52:15 +00:00
bcc @l3
add ace500
2021-11-07 02:16:53 +00:00
cmp #$60
wip
2021-11-07 20:52:15 +00:00
bcs @l3
add ace500
2021-11-07 02:16:53 +00:00
and #$1F
wip
2021-11-07 20:52:15 +00:00
@l3: jsr LCC13
wip
2021-11-07 03:26:27 +00:00
jmp DoForwardSpace
add ace500
2021-11-07 02:16:53 +00:00
wip
2021-11-07 03:06:39 +00:00
;;; ============================================================
DoNothing:
rts
add ace500
2021-11-07 02:16:53 +00:00
wip
2021-11-07 03:06:39 +00:00
;;; ============================================================
;;; Output control character handling
;; Input is char, < $20
DoCtrlCharOut:
sec
add ace500
2021-11-07 02:16:53 +00:00
sbc #$07
wip
2021-11-07 03:06:39 +00:00
bcc DoNothing
add ace500
2021-11-07 02:16:53 +00:00
asl a
tax
wip
2021-11-07 20:52:15 +00:00
jmp (@jt,x)
wip
2021-11-07 03:06:39 +00:00
wip
2021-11-07 20:52:15 +00:00
@jt:
wip
2021-11-07 03:26:27 +00:00
.addr DoBell ; $07 Ctrl-G Bell
.addr DoBackspace ; $08 Ctrl-H Backspace
.addr DoNothing ; $09 Ctrl-I
.addr DoLineFeed ; $0A Ctrl-J Line feed
.addr DoClearEOS ; $0B Ctrl-K Clear EOS
.addr DoHomeAndClear ; $0C Ctrl-L Home and clear
.addr DoReturn ; $0D Ctrl-M Return
.addr DoNormal ; $0E Ctrl-N Normal
.addr DoInverse ; $0F Ctrl-O Inverse
.addr DoNothing ; $10 Ctrl-P
.addr Do40Col ; $11 Ctrl-Q 40-column
.addr Do80Col ; $12 Ctrl-R 80-column
.addr DoNothing ; $13 Ctrl-S
.addr DoNothing ; $14 Ctrl-T
.addr DoQuit ; $15 Ctrl-U Quit
.addr DoScroll ; $16 Ctrl-V Scroll
.addr DoScrollUp ; $17 Ctrl-W Scroll-up
.addr DoDisableMouseText ; $18 Ctrl-X Disable MouseText
.addr DoHome ; $19 Ctrl-Y Home
.addr DoClearLine ; $1A Ctrl-Z Clear line
.addr DoEnableMouseText ; $1B Ctrl-[ Enable MouseText
.addr DoForwardSpace ; $1C Ctrl-\ Forward space
.addr DoClearEOL ; $1D Ctrl-] Clear EOL
wip
2021-11-07 03:27:30 +00:00
.addr DoCtrlCaret ; $1E Ctrl-^ ???
wip
2021-11-07 03:26:27 +00:00
.addr DoUp ; $1F Ctrl-_ Up
wip
2021-11-07 03:06:39 +00:00
;;; ============================================================
;;; For Escape key sequences
wip
2021-11-07 20:52:15 +00:00
ProcessEscapeModeKey:
pha
wip
2021-11-07 03:06:39 +00:00
lda #M_ESC
trb MODE
pla
and #$7F
wip
2021-11-07 20:52:15 +00:00
cmp #'a'
bcc @l1
cmp #'z'+1
bcs @l1
and #$DF ; convert to uppercase
;; Scan table for match
@l1: ldx #$00
@l2: ldy @code_table,x
wip
2021-11-07 03:06:39 +00:00
beq DoNothing
wip
2021-11-07 20:52:15 +00:00
cmp @code_table,x
beq @l3
add ace500
2021-11-07 02:16:53 +00:00
inx
wip
2021-11-07 20:52:15 +00:00
bra @l2
wip
2021-11-07 03:06:39 +00:00
wip
2021-11-07 20:52:15 +00:00
@l3: txa
add ace500
2021-11-07 02:16:53 +00:00
asl a
tax
wip
2021-11-07 20:52:15 +00:00
jmp (@jt,x)
add ace500
2021-11-07 02:16:53 +00:00
wip
2021-11-07 20:52:15 +00:00
@code_table:
wip
2021-11-07 03:06:39 +00:00
.byte '@' ; Escape @ - clear, home & exit mode
.byte 'A' ; Escape A - right & exit mode
.byte 'B' ; Escape B - left & exit mode
.byte 'C' ; Escape C - down & exit mode
.byte 'D' ; Escape D - up & exit mode
.byte 'E' ; Escape E - clear EOL & exit mode
.byte 'F' ; Escape F - clear EOS & exit mode
.byte 'I' ; Escape I - up
.byte 'J' ; Escape J - left
.byte 'K' ; Escape K - right
.byte 'M' ; Escape M - down
.byte $0b ; Escape up - up
.byte $0a ; Escape down - down
.byte $08 ; Escape left - left
.byte $15 ; Escape right - right
.byte '4' ; Escape 4 - 40 col mode
.byte '8' ; Escape 8 - 80 col mode
.byte $11 ; Escape Ctrl+Q - deactivate
.byte $00 ; sentinel
wip
2021-11-07 20:52:15 +00:00
@jt:
wip
2021-11-07 03:56:03 +00:00
.addr DoHomeAndClear ; Escape @ - clear, home & exit mode
.addr DoForwardSpace ; Escape A - right & exit mode
.addr DoBackspace ; Escape B - left & exit mode
.addr DoLineFeed ; Escape C - down & exit mode
.addr DoUp ; Escape D - up & exit mode
.addr DoClearEOL ; Escape E - clear EOL & exit mode
.addr DoClearEOS ; Escape F - clear EOS & exit mode
.addr DoUpRemain ; Escape I - up
.addr DoLeftRemain ; Escape J - left
.addr DoRightRemain ; Escape K - right
.addr DoDownRemain ; Escape M - down
.addr DoUpRemain ; Escape up - up
.addr DoDownRemain ; Escape down - down
.addr DoLeftRemain ; Escape left - left
.addr DoRightRemain ; Escape right - right
.addr Do40Col ; Escape 4 - 40 col mode
.addr Do80Col ; Escape 8 - 80 col mode
.addr DoQuit ; Escape Ctrl+Q - deactivate
wip
2021-11-07 03:06:39 +00:00
;;; ============================================================
wip
2021-11-07 20:52:15 +00:00
CheckPauseListing:
wip
2021-11-07 03:06:39 +00:00
lda KBD
wip
2021-11-07 04:07:03 +00:00
cmp #$93 ; Ctrl-S
bne @l3
wip
2021-11-07 02:41:09 +00:00
bit KBDSTRB
wip
2021-11-07 04:07:03 +00:00
@l1: lda KBD
bpl @l1
cmp #$83 ; Ctrl-C
beq @l3
add ace500
2021-11-07 02:16:53 +00:00
.byte $2C
wip
2021-11-07 04:07:03 +00:00
@l2: bpl $C900
@l3: rts
;;; ============================================================
add ace500
2021-11-07 02:16:53 +00:00
LC941: ldy #$00
ldx #$00
wip
2021-11-07 20:52:15 +00:00
@l1: cpy WNDWDTH
bcs @l2
add ace500
2021-11-07 02:16:53 +00:00
jsr LC9A8
sta $0200,x
inx
iny
wip
2021-11-07 20:52:15 +00:00
bra @l1
@l2: dey
wip
2021-11-07 02:41:09 +00:00
sty CH
disasm; and include tentative patches
2021-11-10 02:17:23 +00:00
stx SAVEX
lda #$8D ; return
add ace500
2021-11-07 02:16:53 +00:00
LC95B: rts
wip
2021-11-07 03:26:27 +00:00
;;; ============================================================
Do40Col:
bit RD80VID
add ace500
2021-11-07 02:16:53 +00:00
php
More disasm. Found another CH/OURCH patch point, too.
2021-11-11 04:28:06 +00:00
jsr Disable80Col
add ace500
2021-11-07 02:16:53 +00:00
jsr LCAFA
wip
2021-11-07 04:07:03 +00:00
jsr LCE33
plp
add ace500
2021-11-07 02:16:53 +00:00
bpl LC95B
jmp LCC68
wip
2021-11-07 04:07:03 +00:00
;;; ============================================================
add ace500
2021-11-07 02:16:53 +00:00
LC96F: jsr LC822
cmp #$00
wip
2021-11-07 20:52:15 +00:00
beq @l4
add ace500
2021-11-07 02:16:53 +00:00
cmp #$02
beq LC941
cmp #$05
bne LC95B
wip
2021-11-07 02:41:09 +00:00
ldy CH
wip
2021-11-07 20:52:15 +00:00
@l1: iny
wip
2021-11-07 02:41:09 +00:00
cpy WNDWDTH
wip
2021-11-07 20:52:15 +00:00
beq @l2
add ace500
2021-11-07 02:16:53 +00:00
jsr LC9A8
dey
jsr LCEC8
iny
wip
2021-11-07 20:52:15 +00:00
bra @l1
wip
2021-11-07 04:07:03 +00:00
wip
2021-11-07 20:52:15 +00:00
@l2: dey
@l3: lda #$A0
add ace500
2021-11-07 02:16:53 +00:00
jsr LCEC8
bra LC96F
wip
2021-11-07 04:07:03 +00:00
wip
2021-11-07 20:52:15 +00:00
@l4: ldy WNDWDTH
disasm; and include tentative patches
2021-11-10 02:17:23 +00:00
@l5: dey
wip
2021-11-07 02:41:09 +00:00
cpy CH
wip
2021-11-07 20:52:15 +00:00
beq @l3
add ace500
2021-11-07 02:16:53 +00:00
dey
disasm; and include tentative patches
2021-11-10 02:17:23 +00:00
jsr LC9A8
add ace500
2021-11-07 02:16:53 +00:00
iny
disasm; and include tentative patches
2021-11-10 02:17:23 +00:00
jsr LCEC8
bra @l5
wip
2021-11-07 20:52:15 +00:00
;;; ============================================================
add ace500
2021-11-07 02:16:53 +00:00
LC9A8: jsr LCEBD
ora #$80
cmp #$A0
wip
2021-11-07 20:52:15 +00:00
bcs @l1
add ace500
2021-11-07 02:16:53 +00:00
ora #$40
wip
2021-11-07 20:52:15 +00:00
@l1: rts
;;; ============================================================
add ace500
2021-11-07 02:16:53 +00:00
wip
2021-11-07 02:41:09 +00:00
LC9B4: bit RD80VID
add ace500
2021-11-07 02:16:53 +00:00
bpl LC9CC
wip
2021-11-07 02:41:09 +00:00
lsr WNDWDTH
asl WNDWDTH
sta SET80COL
Document fix for CH/OURCH bug
2021-11-09 04:59:50 +00:00
;; This is CH fix described in source fragment below!
LC9C0: lda CH ; HAVE THEY CHANGED COL?
wip
2021-11-07 02:51:44 +00:00
cmp XCOORD
Document fix for CH/OURCH bug
2021-11-09 04:59:50 +00:00
bne LC9CA ; YES - USE THEIRS
lda OURCH ; ELSE USE OURS (THEY MIGHT HAVE
; CHANGED THIS TOO)
wip
2021-11-07 02:41:09 +00:00
LC9CA: sta CH
add ace500
2021-11-07 02:16:53 +00:00
LC9CC: rts
wip
2021-11-07 03:56:03 +00:00
;;; ============================================================
DoUpRemain:
jsr DoUp
bra Remain
DoDownRemain:
wip
2021-11-07 03:26:27 +00:00
jsr DoLineFeed
wip
2021-11-07 03:56:03 +00:00
bra Remain
wip
2021-11-07 03:26:27 +00:00
wip
2021-11-07 03:56:03 +00:00
DoRightRemain:
jsr DoForwardSpace
bra Remain
wip
2021-11-07 03:26:27 +00:00
wip
2021-11-07 03:56:03 +00:00
DoLeftRemain:
wip
2021-11-07 03:26:27 +00:00
jsr DoBackspace
wip
2021-11-07 03:56:03 +00:00
;; fall through
Remain: lda #$80
bra SetModeBits
wip
2021-11-07 03:26:27 +00:00
;;; ============================================================
DoInverse:
add ace500
2021-11-07 02:16:53 +00:00
ldy #$3F
wip
2021-11-07 03:26:27 +00:00
.byte OPC_BIT_abs ; skip next instruction
DoNormal:
ldy #$FF
wip
2021-11-07 02:41:09 +00:00
sty INVFLG
add ace500
2021-11-07 02:16:53 +00:00
LC9EA: rts
wip
2021-11-07 03:26:27 +00:00
;;; ============================================================
Do80Col:
wip
2021-11-07 02:41:09 +00:00
bit RD80VID
add ace500
2021-11-07 02:16:53 +00:00
php
More disasm. Found another CH/OURCH patch point, too.
2021-11-11 04:28:06 +00:00
jsr Enable80Col
add ace500
2021-11-07 02:16:53 +00:00
jsr LCAFA
jsr LCE33
plp
bmi LC9EA
jmp LCC18
wip
2021-11-07 03:26:27 +00:00
;;; ============================================================
DoQuit:
jsr Do40Col
wip
2021-11-07 02:51:44 +00:00
jsr DoSETVID
jsr DoSETKBD
disasm; and include tentative patches
2021-11-10 02:17:23 +00:00
lda #23
ldx #0
add ace500
2021-11-07 02:16:53 +00:00
jsr LCAA1
disasm; and include tentative patches
2021-11-10 02:17:23 +00:00
lda #M_INACTIVE
wip
2021-11-07 02:51:44 +00:00
sta MODE
disasm; and include tentative patches
2021-11-10 02:17:23 +00:00
add ace500
2021-11-07 02:16:53 +00:00
lda #$98
rts
wip
2021-11-07 03:26:27 +00:00
;;; ============================================================
wip
2021-11-07 03:56:03 +00:00
;;; Adusting MODE Bits
wip
2021-11-07 03:26:27 +00:00
wip
2021-11-07 03:27:30 +00:00
DoCtrlCaret:
disasm; and include tentative patches
2021-11-10 02:17:23 +00:00
lda #$FC ; clear mode bits %xxxxxx00
wip
2021-11-07 03:56:03 +00:00
jsr PreserveModeBits
disasm; and include tentative patches
2021-11-10 02:17:23 +00:00
lda #$32 ; set mode bits %xx11xx1x
wip
2021-11-07 03:56:03 +00:00
bra SetModeBits
wip
2021-11-07 03:26:27 +00:00
DoDisableMouseText:
disasm; and include tentative patches
2021-11-10 02:17:23 +00:00
.if !INCLUDE_PATCHES
wip
2021-11-07 03:56:03 +00:00
lda #M_MOUSE ; BUG! Should be ~M_MOUSE
disasm; and include tentative patches
2021-11-10 02:17:23 +00:00
.else
lda #.lobyte(~M_MOUSE)
.endif
wip
2021-11-07 03:56:03 +00:00
PreserveModeBits:
and MODE
bra StoreMode
wip
2021-11-07 03:26:27 +00:00
DoEnableMouseText:
wip
2021-11-07 03:56:03 +00:00
lda #M_MOUSE
disasm; and include tentative patches
2021-11-10 02:17:23 +00:00
wip
2021-11-07 03:56:03 +00:00
SetModeBits:
ora MODE
StoreMode:
sta MODE
add ace500
2021-11-07 02:16:53 +00:00
rts
wip
2021-11-07 03:56:03 +00:00
;;; ============================================================
LCA2F: lda CHAR
add ace500
2021-11-07 02:16:53 +00:00
sec
sbc #$20
and #$7F
pha
wip
2021-11-07 02:51:44 +00:00
dec MODE
lda MODE
add ace500
2021-11-07 02:16:53 +00:00
and #$03
wip
2021-11-07 04:07:03 +00:00
bne @l2
add ace500
2021-11-07 02:16:53 +00:00
pla
cmp #$18
wip
2021-11-07 04:07:03 +00:00
bcs @l1
add ace500
2021-11-07 02:16:53 +00:00
jsr LCAA3
wip
2021-11-07 04:07:03 +00:00
@l1: lda $05F8
wip
2021-11-07 02:41:09 +00:00
cmp WNDWDTH
wip
2021-11-07 03:56:03 +00:00
bcs :+
wip
2021-11-07 02:41:09 +00:00
sta CH
wip
2021-11-07 03:56:03 +00:00
: rts
add ace500
2021-11-07 02:16:53 +00:00
wip
2021-11-07 04:07:03 +00:00
@l2: pla
add ace500
2021-11-07 02:16:53 +00:00
sta $05F8
rts
wip
2021-11-07 03:26:27 +00:00
;;; ============================================================
DoBackspace:
lda CH
add ace500
2021-11-07 02:16:53 +00:00
beq LCA60
wip
2021-11-07 02:41:09 +00:00
dec CH
add ace500
2021-11-07 02:16:53 +00:00
LCA5F: rts
wip
2021-11-07 03:26:27 +00:00
;;; ============================================================
wip
2021-11-07 02:41:09 +00:00
LCA60: lda CV
add ace500
2021-11-07 02:16:53 +00:00
beq LCA5F
wip
2021-11-07 02:41:09 +00:00
lda WNDWDTH
add ace500
2021-11-07 02:16:53 +00:00
dec a
wip
2021-11-07 02:41:09 +00:00
sta CH
wip
2021-11-07 03:26:27 +00:00
DoUp: lda CV
add ace500
2021-11-07 02:16:53 +00:00
beq LCA5F
wip
2021-11-07 02:41:09 +00:00
dec CV
add ace500
2021-11-07 02:16:53 +00:00
bra LCAA5
wip
2021-11-07 03:26:27 +00:00
;;; ============================================================
DoForwardSpace:
inc CH
wip
2021-11-07 02:41:09 +00:00
lda CH
cmp WNDWDTH
add ace500
2021-11-07 02:16:53 +00:00
bcc LCA5F
wip
2021-11-07 03:26:27 +00:00
;; fall through
;;; ============================================================
DoReturn:
stz CH
;; fall through
;;; ============================================================
DoLineFeed:
lda CV
add ace500
2021-11-07 02:16:53 +00:00
cmp #$FF
wip
2021-11-07 04:07:03 +00:00
beq @l1
add ace500
2021-11-07 02:16:53 +00:00
cmp #$17
wip
2021-11-07 03:26:27 +00:00
bcs DoScrollUp
wip
2021-11-07 04:07:03 +00:00
@l1: inc CV
add ace500
2021-11-07 02:16:53 +00:00
bra LCAA5
wip
2021-11-07 03:26:27 +00:00
;;; ============================================================
DoHome:
lda WNDTOP
add ace500
2021-11-07 02:16:53 +00:00
ldx #$00
bra LCAA1
wip
2021-11-07 03:26:27 +00:00
;;; ============================================================
DoClearLine:
lda CH
add ace500
2021-11-07 02:16:53 +00:00
pha
wip
2021-11-07 02:41:09 +00:00
stz CH
wip
2021-11-07 03:26:27 +00:00
jsr DoClearEOL
add ace500
2021-11-07 02:16:53 +00:00
pla
wip
2021-11-07 02:41:09 +00:00
sta CH
add ace500
2021-11-07 02:16:53 +00:00
rts
wip
2021-11-07 03:26:27 +00:00
;;; ============================================================
add ace500
2021-11-07 02:16:53 +00:00
LCA9B: lda $06F8
ldx $0778
wip
2021-11-07 02:41:09 +00:00
LCAA1: stx CH
LCAA3: sta CV
wip
2021-11-07 02:51:44 +00:00
LCAA5: jmp DoMON_VTAB
add ace500
2021-11-07 02:16:53 +00:00
wip
2021-11-07 03:26:27 +00:00
;;; ============================================================
DoScrollUp:
lda CH
add ace500
2021-11-07 02:16:53 +00:00
pha
wip
2021-11-07 03:26:27 +00:00
jsr DoHome
wip
2021-11-07 04:07:03 +00:00
@l1: ldy BASH
wip
2021-11-07 02:41:09 +00:00
sty BAS2H
ldy BASL
sty BAS2L
lda WNDBTM
wip
2021-11-07 04:07:03 +00:00
beq @l5
add ace500
2021-11-07 02:16:53 +00:00
dec a
wip
2021-11-07 02:41:09 +00:00
cmp CV
wip
2021-11-07 04:07:03 +00:00
beq @l5
bcc @l5
wip
2021-11-07 02:41:09 +00:00
inc CV
add ace500
2021-11-07 02:16:53 +00:00
jsr LCAA5
wip
2021-11-07 02:41:09 +00:00
ldy WNDWDTH
add ace500
2021-11-07 02:16:53 +00:00
dey
wip
2021-11-07 02:41:09 +00:00
bit RD80VID
wip
2021-11-07 04:07:03 +00:00
bmi @l3
@l2: lda (BASL),y
wip
2021-11-07 02:41:09 +00:00
sta (BAS2L),y
add ace500
2021-11-07 02:16:53 +00:00
dey
wip
2021-11-07 04:07:03 +00:00
bpl @l2
bra @l1
@l3: tya
add ace500
2021-11-07 02:16:53 +00:00
lsr a
tay
wip
2021-11-07 04:07:03 +00:00
@l4: bit TXTPAGE1
wip
2021-11-07 02:41:09 +00:00
lda (BASL),y
sta (BAS2L),y
bit TXTPAGE2
lda (BASL),y
sta (BAS2L),y
add ace500
2021-11-07 02:16:53 +00:00
dey
wip
2021-11-07 04:07:03 +00:00
bpl @l4
wip
2021-11-07 02:41:09 +00:00
bit TXTPAGE1
wip
2021-11-07 04:07:03 +00:00
bra @l1
@l5: stz CH
wip
2021-11-07 03:26:27 +00:00
jsr DoClearEOL
add ace500
2021-11-07 02:16:53 +00:00
plx
wip
2021-11-07 02:41:09 +00:00
lda CV
add ace500
2021-11-07 02:16:53 +00:00
bra LCAA1
wip
2021-11-07 04:07:03 +00:00
wip
2021-11-07 02:41:09 +00:00
LCAFA: lda CV
add ace500
2021-11-07 02:16:53 +00:00
sta $06F8
wip
2021-11-07 02:41:09 +00:00
lda CH
add ace500
2021-11-07 02:16:53 +00:00
sta $0778
rts
wip
2021-11-07 03:26:27 +00:00
;;; ============================================================
DoScroll:
add ace500
2021-11-07 02:16:53 +00:00
jsr LCAFA
wip
2021-11-07 02:41:09 +00:00
lda WNDBTM
add ace500
2021-11-07 02:16:53 +00:00
dec a
dec a
sta $05F8
LCB0F: lda $05F8
jsr LCAA3
wip
2021-11-07 02:41:09 +00:00
lda BASL
sta BAS2L
lda BASH
sta BAS2H
add ace500
2021-11-07 02:16:53 +00:00
lda $05F8
inc a
jsr LCAA3
wip
2021-11-07 02:41:09 +00:00
ldy WNDWDTH
add ace500
2021-11-07 02:16:53 +00:00
dey
LCB27: phy
wip
2021-11-07 02:41:09 +00:00
bit TXTPAGE1
bit RD80VID
add ace500
2021-11-07 02:16:53 +00:00
bpl LCB38
tya
lsr a
tay
bcs LCB38
wip
2021-11-07 02:41:09 +00:00
bit TXTPAGE2
LCB38: lda (BAS2L),y
sta (BASL),y
add ace500
2021-11-07 02:16:53 +00:00
ply
dey
bpl LCB27
wip
2021-11-07 02:41:09 +00:00
bit TXTPAGE1
add ace500
2021-11-07 02:16:53 +00:00
lda $05F8
wip
2021-11-07 02:41:09 +00:00
cmp WNDTOP
add ace500
2021-11-07 02:16:53 +00:00
beq LCB4F
dec $05F8
bra LCB0F
LCB4F: lda #$00
jsr LCAA3
wip
2021-11-07 03:26:27 +00:00
jsr DoClearLine
wip
2021-11-07 02:41:09 +00:00
bit TXTPAGE1
add ace500
2021-11-07 02:16:53 +00:00
jmp LCA9B
wip
2021-11-08 05:16:34 +00:00
;;; ============================================================
PascalInit:
jsr LC814
add ace500
2021-11-07 02:16:53 +00:00
LCB60: jsr LCBE1
wip
2021-11-07 02:41:09 +00:00
LCB63: ldx CH
wip
2021-11-07 02:51:44 +00:00
stx OURCH
stx XCOORD
add ace500
2021-11-07 02:16:53 +00:00
ldx #$00
rts
wip
2021-11-08 05:16:34 +00:00
;;; ============================================================
PascalRead:
More disasm. Found another CH/OURCH patch point, too.
2021-11-11 04:28:06 +00:00
jsr InitTextWindow
add ace500
2021-11-07 02:16:53 +00:00
jsr LC822
wip
2021-11-07 03:56:03 +00:00
lda CHAR
add ace500
2021-11-07 02:16:53 +00:00
bra LCB63
wip
2021-11-08 05:16:34 +00:00
;;; ============================================================
PascalWrite:
sta CHAR
More disasm. Found another CH/OURCH patch point, too.
2021-11-11 04:28:06 +00:00
jsr InitTextWindow
add ace500
2021-11-07 02:16:53 +00:00
jsr LCBF8
wip
2021-11-07 03:56:03 +00:00
lda CHAR
add ace500
2021-11-07 02:16:53 +00:00
ora #$80
wip
2021-11-07 03:56:03 +00:00
sta CHAR
add ace500
2021-11-07 02:16:53 +00:00
and #$7F
cmp #$15
beq LCB63
cmp #$0D
wip
2021-11-08 05:16:34 +00:00
beq @l1
add ace500
2021-11-07 02:16:53 +00:00
jsr LC84C
bra LCB60
wip
2021-11-08 05:16:34 +00:00
@l1: stz CH
add ace500
2021-11-07 02:16:53 +00:00
bra LCB60
wip
2021-11-08 05:16:34 +00:00
;;; ============================================================
PascalStatus:
cmp #$00
beq @l1
add ace500
2021-11-07 02:16:53 +00:00
cmp #$01
wip
2021-11-08 05:16:34 +00:00
bne @l2
add ace500
2021-11-07 02:16:53 +00:00
jsr LCCB8
bra LCB63
wip
2021-11-08 05:16:34 +00:00
@l1: sec
add ace500
2021-11-07 02:16:53 +00:00
bra LCB63
wip
2021-11-08 05:16:34 +00:00
@l2: ldx #$03
add ace500
2021-11-07 02:16:53 +00:00
clc
rts
wip
2021-11-08 05:16:34 +00:00
;;; ============================================================
More disasm. Found another CH/OURCH patch point, too.
2021-11-11 04:28:06 +00:00
InitTextWindow:
pha
wip
2021-11-07 02:51:44 +00:00
lda OLDBASL
wip
2021-11-07 02:41:09 +00:00
sta BASL
wip
2021-11-07 02:51:44 +00:00
lda OLDBASH
wip
2021-11-07 02:41:09 +00:00
sta BASH
stz WNDTOP
stz WNDLFT
More disasm. Found another CH/OURCH patch point, too.
2021-11-11 04:28:06 +00:00
lda #80
wip
2021-11-07 02:41:09 +00:00
sta WNDWDTH
More disasm. Found another CH/OURCH patch point, too.
2021-11-11 04:28:06 +00:00
lda #24
wip
2021-11-07 02:41:09 +00:00
sta WNDBTM
add ace500
2021-11-07 02:16:53 +00:00
jsr LC9C0
pla
rts
More disasm. Found another CH/OURCH patch point, too.
2021-11-11 04:28:06 +00:00
;;; ============================================================
;; ???
wip
2021-11-07 02:41:09 +00:00
sta CLRALTCHAR
More disasm. Found another CH/OURCH patch point, too.
2021-11-11 04:28:06 +00:00
Disable80Col:
sta CLR80COL
wip
2021-11-07 02:41:09 +00:00
sta CLR80VID
add ace500
2021-11-07 02:16:53 +00:00
rts
More disasm. Found another CH/OURCH patch point, too.
2021-11-11 04:28:06 +00:00
Enable80Col:
sta SET80COL
wip
2021-11-07 02:41:09 +00:00
sta SET80VID
sta SETALTCHAR
add ace500
2021-11-07 02:16:53 +00:00
rts
More disasm. Found another CH/OURCH patch point, too.
2021-11-11 04:28:06 +00:00
;;; ============================================================
wip
2021-11-07 02:51:44 +00:00
LCBE1: lda MODE
disasm; and include tentative patches
2021-11-10 02:17:23 +00:00
cmp #M_INACTIVE
add ace500
2021-11-07 02:16:53 +00:00
beq LCC04
More disasm. Found another CH/OURCH patch point, too.
2021-11-11 04:28:06 +00:00
and #M_ESC
add ace500
2021-11-07 02:16:53 +00:00
beq LCC04
jsr LCEBB
wip
2021-11-07 02:51:44 +00:00
sta OLDCH
add ace500
2021-11-07 02:16:53 +00:00
and #$80
eor #$AB
bra LCC13
wip
2021-11-08 05:16:34 +00:00
;;; ============================================================
disasm; and include tentative patches
2021-11-10 02:17:23 +00:00
LCBF8: lda MODE
and #M_ESC
beq LCC04
lda OLDCH
bra LCC13
LCC04: jsr LCEBB
eor #$80
add ace500
2021-11-07 02:16:53 +00:00
cmp #$40
bcc LCC13
cmp #$60
bcs LCC13
and #$1F
wip
2021-11-07 02:41:09 +00:00
LCC13: ldy CH
add ace500
2021-11-07 02:16:53 +00:00
jmp LCEC8
LCC18: php
sei
wip
2021-11-07 02:41:09 +00:00
lda WNDTOP
add ace500
2021-11-07 02:16:53 +00:00
sta $05F8
LCC1F: lda $05F8
jsr LCAA3
wip
2021-11-07 02:41:09 +00:00
lda BASL
sta BAS2L
lda BASH
sta BAS2H
add ace500
2021-11-07 02:16:53 +00:00
ldy #$00
wip
2021-11-07 02:41:09 +00:00
LCC2F: bit TXTPAGE1
lda (BAS2L)
bit TXTPAGE2
sta (BASL),y
bit TXTPAGE1
inc BAS2L
lda (BAS2L)
sta (BASL),y
add ace500
2021-11-07 02:16:53 +00:00
iny
wip
2021-11-07 02:41:09 +00:00
inc BAS2L
add ace500
2021-11-07 02:16:53 +00:00
cpy #$14
bcc LCC2F
lda #$A0
wip
2021-11-07 02:41:09 +00:00
LCC4B: bit TXTPAGE2
sta (BASL),y
bit TXTPAGE1
sta (BASL),y
add ace500
2021-11-07 02:16:53 +00:00
iny
cpy #$28
bcc LCC4B
inc $05F8
lda $05F8
cmp #$18
bcc LCC1F
LCC64: plp
jmp LCA9B
LCC68: php
sei
wip
2021-11-07 02:41:09 +00:00
sta SET80COL
lda WNDTOP
add ace500
2021-11-07 02:16:53 +00:00
sta $05F8
LCC72: lda $05F8
jsr LCAA3
ldy #$13
wip
2021-11-07 02:41:09 +00:00
bit TXTPAGE1
LCC7D: lda (BASL),y
add ace500
2021-11-07 02:16:53 +00:00
pha
dey
bpl LCC7D
ldy #$00
wip
2021-11-07 02:41:09 +00:00
lda BASL
sta BAS2L
lda BASH
sta BAS2H
LCC8D: bit TXTPAGE2
lda (BASL),y
bit TXTPAGE1
sta (BAS2L)
inc BAS2L
add ace500
2021-11-07 02:16:53 +00:00
pla
wip
2021-11-07 02:41:09 +00:00
sta (BAS2L)
inc BAS2L
add ace500
2021-11-07 02:16:53 +00:00
iny
cpy #$14
bcc LCC8D
inc $05F8
lda $05F8
cmp #$18
bcc LCC72
wip
2021-11-07 02:41:09 +00:00
sta CLR80COL
add ace500
2021-11-07 02:16:53 +00:00
bra LCC64
LCCB2: jsr LCCB8
wip
2021-11-08 05:16:34 +00:00
jmp extra::DoBankC5 ; bad disasm or ...?
add ace500
2021-11-07 02:16:53 +00:00
LCCB8: bit $0579
bmi LCCD7
LCCBD: bit $05FA
bvs LCCCE
bpl LCCCE
lda $05FF
cmp $06FF
beq LCCD3
bra LCCD5
wip
2021-11-07 02:41:09 +00:00
LCCCE: bit KBD
add ace500
2021-11-07 02:16:53 +00:00
bmi LCCD5
LCCD3: clc
rts
LCCD5: sec
rts
LCCD7: jsr LCDA8
beq LCCE1
LCCDC: stz $0579
bra LCCBD
LCCE1: phx
ldx $0479
jsr LCE16
lda $0200,x
jsr LCE25
plx
cmp #$00
beq LCCDC
bra LCCD5
LCCF5: jsr LCCFB
wip
2021-11-08 05:16:34 +00:00
jmp extra::DoBankC5
add ace500
2021-11-07 02:16:53 +00:00
LCCFB: bit $0579
bpl LCD03
jmp LCD85
LCD03: bit $05FA
bvs LCD2F
bpl LCD2F
phx
ldx $06FF
wip
2021-11-07 02:41:09 +00:00
bit RDRAMRD
add ace500
2021-11-07 02:16:53 +00:00
php
wip
2021-11-07 02:41:09 +00:00
sta RDCARDRAM
add ace500
2021-11-07 02:16:53 +00:00
lda $0800,x
plp
bmi LCD1E
wip
2021-11-07 02:41:09 +00:00
sta RDMAINRAM
add ace500
2021-11-07 02:16:53 +00:00
LCD1E: inx
bne LCD23
ldx #$80
LCD23: stx $06FF
plx
pha
pla
php
ora #$80
plp
bra LCD38
wip
2021-11-07 02:41:09 +00:00
LCD2F: lda KBD
bit KBDSTRB
add ace500
2021-11-07 02:16:53 +00:00
bit $C0B4
LCD38: bpl LCD41
LCD3A: cmp #$06
bcc LCD40
ora #$80
LCD40: rts
LCD41: and #$7F
cmp #$01
bne LCD4B
lda #$1A
bra LCD3A
LCD4B: cmp #$03
bne LCD53
lda #$0C
bra LCD3A
LCD53: cmp #$04
bne LCD5B
lda #$19
bra LCD3A
LCD5B: cmp #$06
bne LCD63
lda #$2C
bra LCD73
LCD63: cmp #$1F
bne LCD6B
lda #$2D
bra LCD73
LCD6B: cmp #$20
bcc LCD3A
cmp #$2C
bcs LCD3A
LCD73: pha
jsr LCDA8
beq LCD7C
pla
bra LCD3A
LCD7C: lda #$FF
sta $0579
pla
jsr LCDBE
LCD85: jsr LCDA8
beq LCD91
LCD8A: stz $0579
lda #$A0
bra LCD3A
LCD91: phx
ldx $0479
jsr LCE16
lda $0200,x
jsr LCE25
plx
inc $0479
cmp #$00
beq LCD8A
bra LCD3A
LCDA8: jsr LCE16
lda #$00
phx
tax
clc
LCDB0: adc $0200,x
inx
bne LCDB0
plx
jsr LCE25
cmp $04F9
rts
LCDBE: phx
phy
jsr LCE16
sec
sbc #$20
ldy #$00
tax
beq LCDD7
LCDCB: lda $0200,y
beq LCDD3
iny
bra LCDCB
LCDD3: iny
LCDD4: dex
bne LCDCB
LCDD7: jsr LCE25
sty $0479
ply
plx
rts
eor ($55)
lsr a:$0D
wip
2021-11-07 02:41:09 +00:00
jmp $5349
add ace500
2021-11-07 02:16:53 +00:00
.byte $54
ora $FF00
wip
2021-11-07 02:41:09 +00:00
LCDEC: sta WRCARDRAM
add ace500
2021-11-07 02:16:53 +00:00
lda #$00
tax
LCDF2: sta $0200,x
inx
cpx #$0C
bcc LCDF2
LCDFA: lda LCDD4,x
cmp #$FF
.byte $F0
LCE00: asl $9D
brk
.byte $02
inx
bra LCDFA
wip
2021-11-07 02:41:09 +00:00
sta WRMAINRAM
add ace500
2021-11-07 02:16:53 +00:00
stz $0579
LCE0D: jsr LCDA8
sta $04F9
wip
2021-11-08 05:16:34 +00:00
jmp extra::DoBankC5
add ace500
2021-11-07 02:16:53 +00:00
LCE16: pha
wip
2021-11-07 02:41:09 +00:00
lda RDRAMRD
sta RDMAINRAM
wip
2021-11-07 02:51:44 +00:00
sta OURCV
wip
2021-11-07 02:41:09 +00:00
sta RDCARDRAM
add ace500
2021-11-07 02:16:53 +00:00
pla
rts
LCE25: pha
wip
2021-11-07 02:41:09 +00:00
sta RDMAINRAM
wip
2021-11-07 02:51:44 +00:00
lda OURCV
add ace500
2021-11-07 02:16:53 +00:00
bpl LCE31
wip
2021-11-07 02:41:09 +00:00
sta RDCARDRAM
add ace500
2021-11-07 02:16:53 +00:00
LCE31: pla
rts
LCE33: lda #$00
wip
2021-11-07 02:41:09 +00:00
bit RDTEXT
wip
2021-11-07 02:51:44 +00:00
bmi DoSETWND
add ace500
2021-11-07 02:16:53 +00:00
lda #$14
wip
2021-11-07 02:51:44 +00:00
;;; ============================================================
;;; Load X,Y with address of a routine -1 (for `ROMCall`)
.macro LDXY addr
ldx #.hibyte(addr-1)
ldy #.lobyte(addr-1)
.endmacro
;;; ============================================================
DoSETWND:
LDXY SETWND
bra ROMCall
wip
2021-11-07 03:06:39 +00:00
;;; ============================================================
wip
2021-11-07 02:51:44 +00:00
DoBell:
LDXY BELLB
bra ROMCall
wip
2021-11-07 03:06:39 +00:00
;;; ============================================================
wip
2021-11-07 02:51:44 +00:00
DoSETKBD:
LDXY SETKBD
bra ROMCall
wip
2021-11-07 03:06:39 +00:00
;;; ============================================================
wip
2021-11-07 02:51:44 +00:00
DoSETVID:
LDXY SETVID
bra ROMCall
wip
2021-11-07 03:06:39 +00:00
;;; ============================================================
wip
2021-11-07 02:51:44 +00:00
DoMON_VTAB:
LDXY MON_VTAB
bra ROMCall
wip
2021-11-07 03:06:39 +00:00
;;; ============================================================
wip
2021-11-07 03:26:27 +00:00
DoClearEOS:
wip
2021-11-07 02:51:44 +00:00
LDXY CLREOP
bra ROMCall
wip
2021-11-07 03:06:39 +00:00
;;; ============================================================
wip
2021-11-07 03:26:27 +00:00
DoHomeAndClear:
wip
2021-11-07 02:51:44 +00:00
LDXY HOME
bra ROMCall
wip
2021-11-07 03:06:39 +00:00
;;; ============================================================
wip
2021-11-07 03:26:27 +00:00
DoClearEOL:
wip
2021-11-07 02:51:44 +00:00
LDXY CLREOL
;; fall through
;;; ============================================================
wip
2021-11-07 03:06:39 +00:00
;;; A = character, X,Y = ROM address-1 (return value to push to stack)
wip
2021-11-07 02:51:44 +00:00
ROMCall:
sta TEMP2
wip
2021-11-07 02:41:09 +00:00
bit RDLCRAM
add ace500
2021-11-07 02:16:53 +00:00
php
wip
2021-11-07 02:41:09 +00:00
bit RDLCBNK2
add ace500
2021-11-07 02:16:53 +00:00
php
wip
2021-11-07 20:52:15 +00:00
lda #.hibyte(ROMCallReturn-1)
add ace500
2021-11-07 02:16:53 +00:00
pha
wip
2021-11-07 20:52:15 +00:00
lda #.lobyte(ROMCallReturn-1)
add ace500
2021-11-07 02:16:53 +00:00
pha
phx
phy
wip
2021-11-07 02:41:09 +00:00
bit ROMIN2
wip
2021-11-07 02:51:44 +00:00
lda TEMP2
add ace500
2021-11-07 02:16:53 +00:00
rts
wip
2021-11-07 20:52:15 +00:00
ROMCallReturn:
add ace500
2021-11-07 02:16:53 +00:00
plp
wip
2021-11-07 20:52:15 +00:00
bpl @l2
plp
bpl @l1
wip
2021-11-07 02:41:09 +00:00
bit LCBANK2
bit LCBANK2
wip
2021-11-07 20:52:15 +00:00
bra @l4
wip
2021-11-07 03:06:39 +00:00
wip
2021-11-07 20:52:15 +00:00
@l1: bit ROMIN
wip
2021-11-07 02:41:09 +00:00
bit ROMIN
wip
2021-11-07 20:52:15 +00:00
bra @l4
wip
2021-11-07 03:06:39 +00:00
wip
2021-11-07 20:52:15 +00:00
@l2: plp
bpl @l3
wip
2021-11-07 02:41:09 +00:00
bit LCBANK1
bit LCBANK1
wip
2021-11-07 20:52:15 +00:00
bra @l4
wip
2021-11-07 03:06:39 +00:00
wip
2021-11-07 20:52:15 +00:00
@l3: bit $C089 ; ???
bit $C089 ; ???
@l4: lda BASL
wip
2021-11-07 02:51:44 +00:00
sta OLDBASL
wip
2021-11-07 02:41:09 +00:00
lda BASH
wip
2021-11-07 02:51:44 +00:00
sta OLDBASH
wip
2021-11-07 02:41:09 +00:00
lda CH
wip
2021-11-07 02:51:44 +00:00
sta OURCH
add ace500
2021-11-07 02:16:53 +00:00
rts
wip
2021-11-07 20:52:15 +00:00
;;; ============================================================
wip
2021-11-07 02:41:09 +00:00
LCEBB: ldy CH
add ace500
2021-11-07 02:16:53 +00:00
LCEBD: phy
jsr LCED2
wip
2021-11-07 02:41:09 +00:00
lda (BASL),y
add ace500
2021-11-07 02:16:53 +00:00
LCEC3: ply
wip
2021-11-07 02:41:09 +00:00
bit TXTPAGE1
add ace500
2021-11-07 02:16:53 +00:00
rts
wip
2021-11-07 20:52:15 +00:00
;;; ============================================================
LCEC8:
phy
add ace500
2021-11-07 02:16:53 +00:00
pha
jsr LCED2
pla
wip
2021-11-07 02:41:09 +00:00
sta (BASL),y
add ace500
2021-11-07 02:16:53 +00:00
bra LCEC3
wip
2021-11-07 20:52:15 +00:00
;;; ============================================================
LCED2:
bit RD80VID
bpl @l1
add ace500
2021-11-07 02:16:53 +00:00
tya
lsr a
tay
wip
2021-11-07 20:52:15 +00:00
bcc @l2
@l1: bit TXTPAGE1
add ace500
2021-11-07 02:16:53 +00:00
rts
wip
2021-11-07 20:52:15 +00:00
@l2: bit TXTPAGE2
add ace500
2021-11-07 02:16:53 +00:00
rts
wip
2021-11-07 03:06:39 +00:00
;;; ============================================================
;; ???
Okay now this is amusing...
2021-11-09 04:47:22 +00:00
.byte "EN\r"
.byte "\tASL\tWIDTH\r"
.byte "\tSTA\tON80ST\tMAKE SURE 80 STORE IS ENABLED\r"
.byte "\r"
.byte ";CHANGED THIS 9/15/86 FOR HABA MERGE AND MOUSE WRITE:\r"
.byte "\r"
.byte "FIXCOL\tLDA\tCOL\tHAVE THEY CHANGED COL ?\r"
.byte "\tCMP\tOLDCOL\r"
.byte "\tBNE\t.2\tYES - USE THEIRS\r"
.byte "\tLDA\tAPPLECOL\tELSE USE OURS (THEY MIGHT HAVE\r"
.byte ";\t\t\t CHANGED THIS TOO)\r"
.byte ".2\tSTA\tCOL\r"
.byte "\r"
.byte ".END\tRTS\r"
.byte "\r"
.byte "\x1F"
.byte "\r;E"
disasm; and include tentative patches
2021-11-10 02:17:23 +00:00
;;; ============================================================
.res $D000 - *, 0
;;; ============================================================
.assert * = $D000, error, "Length changed"
Reference in New Issue Copy Permalink