This commit is contained in:
Joshua Bell 2021-11-05 20:24:49 -07:00
parent 1775308748
commit 59ed13a04d

View File

@ -7,6 +7,8 @@
.setcpu "65C02" .setcpu "65C02"
.include "opcodes.inc" .include "opcodes.inc"
;;; Zero Page
WNDLFT := $20 WNDLFT := $20
WNDWDTH := $21 WNDWDTH := $21
WNDTOP := $22 WNDTOP := $22
@ -27,6 +29,12 @@ A4H := $43
RNDL := $4E RNDL := $4E
RNDH := $4F RNDH := $4F
;;; Page 3 Vectors
XFERVEC := $3ED
;;; Screen Holes
SAVEA := $4F8 SAVEA := $4F8
SAVEX := $578 SAVEX := $578
SAVEY := $478 SAVEY := $478
@ -54,6 +62,8 @@ OLDBASL := $77B
TEMP2 := $7FB TEMP2 := $7FB
OLDBASH := $7FB OLDBASH := $7FB
;;; I/O Soft Switches
KBD := $C000 KBD := $C000
CLR80COL:= $C000 CLR80COL:= $C000
SET80COL:= $C001 SET80COL:= $C001
@ -83,6 +93,17 @@ ROMIN2 := $C082
LCBANK2 := $C083 LCBANK2 := $C083
LCBANK1 := $C08B LCBANK1 := $C08B
;;; Documented Firmware Entry Points
C3KeyIn := $C305
C3COut1 := $C307
AUXMOVE := $C311
XFER := $C314
CLRROM := $CFFF
;;; Monitor ROM
BELLB := $FBE2 BELLB := $FBE2
SETWND := $FB4B SETWND := $FB4B
SETKBD := $FE89 SETKBD := $FE89
@ -92,8 +113,6 @@ CLREOP := $FC42
HOME := $FC58 HOME := $FC58
CLREOL := $FC9C CLREOL := $FC9C
AUXMOVE := $C311
XFER := $C314
;;; ============================================================ ;;; ============================================================
@ -104,11 +123,12 @@ LC300: bit SETV ; V = init
bra LC33A bra LC33A
;; Input ;; Input
.assert * = C3KeyIn, error, "Entry point mismatch"
LC305: sec LC305: sec
.byte OPC_BCC ; never taken; skip next byte .byte OPC_BCC ; never taken; skip next byte
;; Output ;; Output
;; C3COut1 .assert * = C3COut1, error, "Entry point mismatch"
LC307: clc LC307: clc
clv clv
bra LC33A bra LC33A
@ -124,37 +144,38 @@ LC307: clc
;; AUXMOVE ;; AUXMOVE
.assert * = AUXMOVE, error, "Entry point mismatch" .assert * = AUXMOVE, error, "Entry point mismatch"
jmp LC334 jmp JumpAuxMove
;; XFER ;; XFER
.assert * = XFER, error, "Entry point mismatch" .assert * = XFER, error, "Entry point mismatch"
php php
bit LCFFF bit CLRROM
plp plp
jmp LCC98 jmp DoXfer
;;; ============================================================ ;;; ============================================================
;;; Pascal Entry Points ;;; Pascal Entry Points
JPINIT: bit LCFFF JPINIT: bit CLRROM
jmp LCB44 jmp PascalInit
JPREAD: bit LCFFF JPREAD: bit CLRROM
jmp LCB52 jmp PascalRead
JPWRITE:bit LCFFF JPWRITE:bit CLRROM
jmp LCB5D jmp PascalWrite
JPSTAT: bit LCFFF JPSTAT: bit CLRROM
jmp LCB81 jmp PascalStatus
LC334: bit LCFFF JumpAuxMove:
jmp LCCC3 bit CLRROM
jmp DoAuxMove
;;; ============================================================ ;;; ============================================================
;;; Main Entry Points ;;; Main Entry Points
LC33A: sta LCFFF LC33A: sta CLRROM
sta SAVEA sta SAVEA
stx SAVEX stx SAVEX
sty SAVEY sty SAVEY
@ -238,8 +259,8 @@ EscapeMode:
;;; ============================================================ ;;; ============================================================
;; Unreached??? ;; ???
bit LCFFF bit CLRROM
jmp LCEE7 jmp LCEE7
;;; ============================================================ ;;; ============================================================
@ -253,17 +274,17 @@ EscapeMode:
;;; ============================================================ ;;; ============================================================
;; Unreached??? ;; ???
bit LCFFF bit CLRROM
jmp LCE18 jmp LCE18
bit LCFFF bit CLRROM
jmp LCDF7 jmp LCDF7
bit LCFFF bit CLRROM
jmp LCD09 jmp LCD09
bit LCFFF bit CLRROM
jmp LCD35 jmp LCD35
;;; ================================================== ;;; ==================================================
@ -1031,19 +1052,28 @@ LCB36: lda #$00
bit TXTPAGE1 bit TXTPAGE1
jmp LCA7A jmp LCA7A
LCB44: jsr LC800 ;;; ============================================================
PascalInit:
jsr LC800
LCB47: jsr LCBC7 LCB47: jsr LCBC7
LCB4A: ldx CH LCB4A: ldx CH
stx OURCH stx OURCH
ldx #$00 ldx #$00
rts rts
LCB52: jsr LCB95 ;;; ============================================================
PascalRead:
jsr LCB95
jsr LC850 jsr LC850
lda CHAR lda CHAR
bra LCB4A bra LCB4A
LCB5D: sta CHAR ;;; ============================================================
PascalWrite:
sta CHAR
LCB60: jsr LCB95 LCB60: jsr LCB95
jsr LCBDE jsr LCBDE
lda CHAR lda CHAR
@ -1060,7 +1090,10 @@ LCB60: jsr LCB95
LCB7D: stz CH LCB7D: stz CH
bra LCB47 bra LCB47
LCB81: cmp #$00 ;;; ============================================================
PascalStatus:
cmp #$00
beq LCB8E beq LCB8E
cmp #$01 cmp #$01
bne LCB91 bne LCB91
@ -1074,6 +1107,8 @@ LCB91: ldx #$03
clc clc
rts rts
;;; ============================================================
LCB95: pha LCB95: pha
lda OLDBASL lda OLDBASL
sta BASL sta BASL
@ -1090,6 +1125,7 @@ LCB95: pha
pla pla
rts rts
;; ???
sta CLRALTCHAR sta CLRALTCHAR
LCBB6: sta CLR80COL LCBB6: sta CLR80COL
sta CLR80VID sta CLR80VID
@ -1201,27 +1237,34 @@ LCC73: bit TXTPAGE2
sta CLR80COL sta CLR80COL
bra LCC4A bra LCC4A
LCC98: pha ;;; ============================================================
lda $03ED ;;; XFER
DoXfer:
pha pha
lda $03EE lda XFERVEC
pha
lda XFERVEC+1
pha pha
sta RDMAINRAM sta RDMAINRAM
sta WRMAINRAM sta WRMAINRAM
bcc LCCAF bcc :+
sta RDCARDRAM sta RDCARDRAM
sta WRCARDRAM sta WRCARDRAM
LCCAF: pla : pla
sta $03EE sta XFERVEC+1
pla pla
sta $03ED sta XFERVEC
pla pla
sta ALTZPOFF sta ALTZPOFF
bvc LCCC0 bvc :+
sta ALTZPON sta ALTZPON
LCCC0: jmp ($03ED) : jmp (XFERVEC)
LCCC3: pha ;;; ============================================================
DoAuxMove:
pha
bit RDRAMRD bit RDRAMRD
php php
bit RDRAMWRT bit RDRAMWRT
@ -1384,12 +1427,9 @@ LCDE2: jsr LCE2E
plx plx
rts rts
;; bad disasm ;; ???
eor ($55) .byte $52, $55, $4e, $0d, $00
lsr a:$0D .byte $4c, $49, $53, $54, $0d, $00, $ff
jmp $5349
.byte $54
ora $FF00
;;; ============================================================ ;;; ============================================================
@ -1495,6 +1535,7 @@ ROMCall:
;;; ============================================================ ;;; ============================================================
;; ???
plp plp
bpl LCE9D bpl LCE9D
plp plp
@ -1550,6 +1591,9 @@ LCEDF: bit TXTPAGE1
LCEE3: bit TXTPAGE2 LCEE3: bit TXTPAGE2
rts rts
;;; ============================================================
;;; AUXMOVE implementation
LCEE7: bit RD80COL LCEE7: bit RD80COL
php php
sta CLR80COL sta CLR80COL
@ -1635,19 +1679,18 @@ LCF83: bcc LCFB7
sty A4H sty A4H
sta ALTZPOFF sta ALTZPOFF
ldy #$00 ldy #$00
LCF9B: lda (A1L),y : lda (A1L),y
sta ALTZPON sta ALTZPON
sta (A4L),y sta (A4L),y
sta ALTZPOFF sta ALTZPOFF
iny iny
bne LCF9B bne :-
inc A1H inc A1H
.byte $8D sta ALTZPON
LCFAB: ora #$C0
inc A4H inc A4H
sta ALTZPOFF sta ALTZPOFF
dex dex
bne LCF9B bne :-
bra LCFE4 bra LCFE4
LCFB7: sta RDCARDRAM LCFB7: sta RDCARDRAM
@ -1658,42 +1701,20 @@ LCFB7: sta RDCARDRAM
sta A1L sta A1L
sty A1H sty A1H
ldy #$00 ldy #$00
LCFCA: sta ALTZPON : sta ALTZPON
lda (A1L),y lda (A1L),y
sta ALTZPOFF sta ALTZPOFF
sta (A4L),y sta (A4L),y
iny iny
bne LCFCA bne :-
inc A4H inc A4H
sta ALTZPON sta ALTZPON
LCFDC: .byte $E6 inc A1H
LCFDD: and $088D,x sta ALTZPOFF
cpy #$CA dex
bne LCFCA bne :-
LCFE4: jmp LCF67 LCFE4: jmp LCF67
brk ;;; ============================================================
brk
brk .res $D000 - *, 0
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
LCFFF: brk