- Add some comments

- Change ACK code to perform two dummy stream reads rather than relying
  on a preceding NOP to pad the TCP frame to 2K.  This fixes the timing
  issue that was causing most of the low-frequency ticks.

- Ticks still aren't perfectly aligned during the ACK slow path but
  it's almost good enough, i.e. probably no need to actually bother
  optimizing the slow path more.
This commit is contained in:
kris
2019-03-15 21:08:06 +00:00
parent 4cb45efb2c
commit 2092ef0926

View File

@@ -104,12 +104,15 @@ text = $c051
fullscr = $c052 fullscr = $c052
tick = $c030 tick = $c030
; this is the main entrypoint
.segment "LOWCODE" .segment "LOWCODE"
; RESET AND CONFIGURE W5100 ; RESET AND CONFIGURE W5100
JMP RESET JMP RESET
; Put code only needed at startup in the HGR page, we'll toast it when we're ; Put code only needed at startup in the HGR page, we'll toast it when we're
; done starting up ; done starting up
.segment "HGR" .segment "HGR"
LDA #6 ; 5 RETRIES TO GET CONNECTION LDA #6 ; 5 RETRIES TO GET CONNECTION
@@ -264,7 +267,7 @@ SETUP:
; LDA #$50 ; HIGH BYTE ; LDA #$50 ; HIGH BYTE
; STA PTR+1 ; STA PTR+1
; init graphics ; init graphics XXX
; default content value ; default content value
LDA #$7f LDA #$7f
PHA PHA
@@ -272,10 +275,13 @@ SETUP:
.segment "CODE" .segment "CODE"
; XXX not really main loop
MAINLOOP: MAINLOOP:
JSR hgr JSR hgr ; this also nukes the startup code we placed in HGR segment
STA fullscr STA fullscr
; This is the main loop
; CHECK FOR ANY RECEIVED DATA ; CHECK FOR ANY RECEIVED DATA
CHECKRECV: CHECKRECV:
@@ -291,6 +297,7 @@ CHECKRECV:
STA WADRL ; 4 STA WADRL ; 4
LDA WDATA ; 4 HIGH BYTE OF RECEIVED SIZE LDA WDATA ; 4 HIGH BYTE OF RECEIVED SIZE
ORA WDATA ; 4 LOW BYTE ORA WDATA ; 4 LOW BYTE
; XXX assume data
BEQ NORECV ; 2 NO DATA TO READ BEQ NORECV ; 2 NO DATA TO READ
JMP RECV ; 3 THERE IS DATA JMP RECV ; 3 THERE IS DATA
@@ -299,7 +306,8 @@ NORECV:
; XXX needed? ; XXX needed?
NOP ; LITTLE DELAY ... NOP ; LITTLE DELAY ...
NOP NOP
; XXX how often does this happen?
JMP CHECKRECV ; CHECK AGAIN JMP CHECKRECV ; CHECK AGAIN
@@ -355,15 +363,13 @@ RECV:
;JSR DEBUG ; UNCOMMENT FOR W5100 DEBUG INFO ;JSR DEBUG ; UNCOMMENT FOR W5100 DEBUG INFO
LDA GETSTARTADR+1 ; 4 HIGH BYTE FIRST LDA GETSTARTADR+1 ; 4 HIGH BYTE FIRST
BIT tick ; 4 (36)
STA WADRH ;4 STA WADRH ;4
BIT tick ; 4 (40)
LDA GETSTARTADR ; 4 LDA GETSTARTADR ; 4
STA WADRL ; 4 STA WADRL ; 4
; restore content ; restore invariant expected by inner loop
PLA ; 4
; fall through
LDX #$00 ; 2 LDX #$00 ; 2
;4 stores: ;4 stores:
@@ -379,13 +385,14 @@ RECV:
; XXX should fall through to op_tick_36? Since this is the 50% duty cycle case ; XXX should fall through to op_tick_36? Since this is the 50% duty cycle case
; XXX pad to 73 cycles since it will mess with the audio
op_nop: op_nop:
LDY WDATA ; 4 LDY WDATA ; 4
STY @D+2 ; 4 STY @D+2 ; 4
LDY WDATA ; 4 LDY WDATA ; 4
STY @D+1 ; 4 STY @D+1 ; 4
@D: @D:
JMP op_nop ; 3 JMP op_nop ; 3 ; 37 with following TICK
.macro ticklabel page, cycles_left .macro ticklabel page, cycles_left
.concat ("_op_tick_page_", .string(page), "_tail_", .string(cycles_left)) .concat ("_op_tick_page_", .string(page), "_tail_", .string(cycles_left))
@@ -1088,6 +1095,7 @@ tickident page, 8
JMP op_nop ; 3 JMP op_nop ; 3
.endmacro .endmacro
; convenience macro for enumerating all tick opcodes for a page
.macro op_tick page .macro op_tick page
op_tick_4 page op_tick_4 page
op_tick_6 page op_tick_6 page
@@ -1123,6 +1131,8 @@ op_tick_64 page
op_tick_66 page op_tick_66 page
.endmacro .endmacro
; now pack the tick opcodes into memory
.segment "LOWCODE" .segment "LOWCODE"
op_tick 32 op_tick 32
op_tick 33 op_tick 33
@@ -1199,31 +1209,35 @@ op_ack:
; UPDATE REXRD TO REFLECT DATA WE JUST READ ; UPDATE REXRD TO REFLECT DATA WE JUST READ
; TODO: be careful about which registers we stomp here ; TODO: be careful about which registers we stomp here
; - now we only care about maintaining X=0 so this is simpler
; UPDATERXRD: ; UPDATERXRD:
BIT tick ; 4 BIT tick ; 4
LDA WDATA ; 4 dummy read of second-last byte in TCP frame
LDA WDATA ; 4 dummy read of last byte in TCP frame
CLC ; 2 CLC ; 2
LDA #>S0RXRD ; 2 NEED HIGH BYTE HERE LDA #>S0RXRD ; 2 NEED HIGH BYTE HERE
STA WADRH ; 4 STA WADRH ; 4
LDA #<S0RXRD ; 2 LDA #<S0RXRD ; 2
STA WADRL ; 4 STA WADRL ; 4
LDA WDATA ; 4 LDA WDATA ; 4 HIGH BYTE
;TAY ; 2 SAVE
LDX WDATA ; 4 LOW BYTE ; needed? I don't think so
;BEQ @1 ; 3
;BRK
;@1:
;ADC #$00 ; 2 GETSIZE ; ADD LOW BYTE OF RECEIVED SIZE
;TAX ; 2 SAVE
;TYA ; 2 GET HIGH BYTE BACK
ADC #$08 ; 2 GETSIZE+1 ; ADD HIGH BYTE OF RECEIVED SIZE
BIT tick ; 4 (36) ; don't mess with Carry prior to ADC
TAY ; 2 SAVE TAY ; 2 SAVE
LDA WDATA ; 4 LOW BYTE ; needed? I don't think so
BEQ @1 ; 3
BRK
@1:
ADC #$00 ; 2 GETSIZE ; ADD LOW BYTE OF RECEIVED SIZE
TAX ; 2 SAVE
TYA ; 2 GET HIGH BYTE BACK
ADC #$08 ;2 GETSIZE+1 ; ADD HIGH BYTE OF RECEIVED SIZE
BIT tick ; 4 (39) ; don't mess with Carry prior to ADC
TAY ; 2 SAVE
LDA #<S0RXRD ; 2 LDA #<S0RXRD ; 2
STA WADRL ; 4 XXX already there? STA WADRL ; 4 XXX already there?