Apple-2-SW/ii-vision
1
0
Fork 0
mirror of https://github.com/KrisKennaway/ii-vision.git synced 2025-01-02 05:30:05 +00:00
Code Issues Projects Releases Wiki Activity

Try to even out tick timings during ACK/slow path

Browse Source
This commit is contained in:
kris 2019-03-10 21:04:20 +00:00
parent 4598709a7d
commit 6b969476a0
1 changed files with 72 additions and 69 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

141
audiotest/audiotest/main.s
View File

@ -279,15 +279,15 @@ CHECKRECV:
; JMP CLOSECONN ; CLOSE CONNECTION ; JMP CLOSECONN ; CLOSE CONNECTION
;@NEXT: ;@NEXT:
BIT tick BIT tick ; 4
LDA #<S0RXRSR ; S0 RECEIVED SIZE REGISTER LDA #<S0RXRSR ; 2 S0 RECEIVED SIZE REGISTER
STA WADRL STA WADRL ; 4
LDA WDATA ; HIGH BYTE OF RECEIVED SIZE LDA WDATA ; 4 HIGH BYTE OF RECEIVED SIZE
ORA WDATA ; LOW BYTE ORA WDATA ; 4 LOW BYTE
BEQ NORECV ; NO DATA TO READ BEQ NORECV ; 2 NO DATA TO READ
JMP RECV ; THERE IS DATA JMP RECV ; 3 THERE IS DATA
NORECV: NORECV:
; XXX needed? ; XXX needed?
@ -300,17 +300,18 @@ NORECV:
; THERE IS DATA TO READ - COMPUTE THE PHYSICAL ADDRESS ; THERE IS DATA TO READ - COMPUTE THE PHYSICAL ADDRESS
RECV: RECV:
LDA #<S0RXRSR ; GET RECEIVED SIZE AGAIN LDA #<S0RXRSR ; 2 GET RECEIVED SIZE AGAIN
STA WADRL STA WADRL ; 4
LDA WDATA LDA WDATA ; 4
BIT tick
CMP #$10 ; expect at least 4k
bcc CHECKRECV ; not yet
STA GETSIZE+1 CMP #$10 ; 2 expect at least 4k
LDA WDATA bcc CHECKRECV ; 2 not yet
STA GETSIZE ; low byte XXX should be 0
BIT tick ; 4 (37)
STA GETSIZE+1 ; 4
LDA WDATA ; 4
STA GETSIZE ; 4 low byte XXX should be 0
@ -318,47 +319,49 @@ RECV:
; reset address pointer to socket buffer ; reset address pointer to socket buffer
; CALCULATE OFFSET ADDRESS USING READ POINTER AND RX MASK ; CALCULATE OFFSET ADDRESS USING READ POINTER AND RX MASK
LDA #<S0RXRD LDA #<S0RXRD ; 2
STA WADRL STA WADRL ; 4
LDA WDATA ; HIGH BYTE LDA WDATA ; 4 HIGH BYTE
AND #>RXMASK AND #>RXMASK ; 2
STA GETOFFSET+1 STA GETOFFSET+1 ; 4
LDA WDATA ; LOW BYTE LDA WDATA ; 4 LOW BYTE
; why is this not 0? ; why is this not 0?
;BEQ @L ; XXX assert 0 ;BEQ @L ; XXX assert 0
;BRK ;BRK
@L: @L:
AND #<RXMASK BIT tick ; 4(36)
AND #<RXMASK ; 2
STA GETOFFSET STA GETOFFSET ; 4
; CALCULATE PHYSICAL ADDRESS WITHIN W5100 RX BUFFER ; CALCULATE PHYSICAL ADDRESS WITHIN W5100 RX BUFFER
BIT tick
CLC CLC ; 2
LDA GETOFFSET LDA GETOFFSET ; 4
ADC #<RXBASE ADC #<RXBASE ; 2
STA GETSTARTADR STA GETSTARTADR ; 4
LDA GETOFFSET+1 LDA GETOFFSET+1 ; 4
ADC #>RXBASE ADC #>RXBASE ; 2
STA GETSTARTADR+1 STA GETSTARTADR+1 ; 4
; SET BUFFER ADDRESS ON W5100 ; SET BUFFER ADDRESS ON W5100
;JSR DEBUG ; UNCOMMENT FOR W5100 DEBUG INFO ;JSR DEBUG ; UNCOMMENT FOR W5100 DEBUG INFO
LDA GETSTARTADR+1 ; HIGH BYTE FIRST LDA GETSTARTADR+1 ; 4 HIGH BYTE FIRST
STA WADRH
LDA GETSTARTADR STA WADRH ;4
STA WADRL BIT tick ; 4 (40)
LDA GETSTARTADR ; 4
STA WADRL ; 4
; restore content ; restore content
PLA PLA ; 4
; fall through ; fall through
LDX #$00 LDX #$00 ; 2
;4 stores: ;4 stores:
;- 73 cycles ;- 73 cycles
@ -374,12 +377,12 @@ RECV:
; XXX should fall through to op_tick_36? Since this is the 50% duty cycle case ; XXX should fall through to op_tick_36? Since this is the 50% duty cycle case
op_nop: op_nop:
LDY WDATA LDY WDATA ; 4
STY @D+2 STY @D+2 ; 4
LDY WDATA LDY WDATA ; 4
STY @D+1 STY @D+1 ; 4
@D: @D:
JMP op_nop JMP op_nop ; 3
.macro ticklabel page, cycles_left .macro ticklabel page, cycles_left
.concat ("_op_tick_page_", .string(page), "_tail_", .string(cycles_left)) .concat ("_op_tick_page_", .string(page), "_tail_", .string(cycles_left))
@ -1178,44 +1181,44 @@ op_ack:
; TODO: be careful about which registers we stomp here ; TODO: be careful about which registers we stomp here
; UPDATERXRD: ; UPDATERXRD:
BIT tick BIT tick ; 4
CLC CLC ; 2
LDA #>S0RXRD ; NEED HIGH BYTE HERE LDA #>S0RXRD ; 2 NEED HIGH BYTE HERE
STA WADRH STA WADRH ; 4
LDA #<S0RXRD LDA #<S0RXRD ; 2
STA WADRL STA WADRL ; 4
LDA WDATA LDA WDATA ; 4
TAY ; SAVE TAY ; 2 SAVE
LDA WDATA ; LOW BYTE ; needed? I don't think so LDA WDATA ; 4 LOW BYTE ; needed? I don't think so
BEQ @1 BEQ @1 ; 3
BRK BRK
@1: @1:
ADC #$00 ; GETSIZE ; ADD LOW BYTE OF RECEIVED SIZE ADC #$00 ; 2 GETSIZE ; ADD LOW BYTE OF RECEIVED SIZE
BIT tick
TAX ; SAVE TAX ; 2 SAVE
TYA ; GET HIGH BYTE BACK TYA ; 2 GET HIGH BYTE BACK
ADC #$08 ;GETSIZE+1 ; ADD HIGH BYTE OF RECEIVED SIZE ADC #$08 ;2 GETSIZE+1 ; ADD HIGH BYTE OF RECEIVED SIZE
TAY ; SAVE BIT tick ; 4 (39) ; don't mess with Carry prior to ADC
TAY ; 2 SAVE
LDA #<S0RXRD LDA #<S0RXRD ; 2
STA WADRL ; XXX already there? STA WADRL ; 4 XXX already there?
STY WDATA ; SEND HIGH BYTE STY WDATA ; 4 SEND HIGH BYTE
STX WDATA ; SEND LOW BYTE STX WDATA ; 4 SEND LOW BYTE
; SEND THE RECV COMMAND ; SEND THE RECV COMMAND
LDA #<S0CR LDA #<S0CR ; 2
STA WADRL STA WADRL ; 4
LDA #SCRECV LDA #SCRECV ; 2
STA WDATA STA WDATA ; 4
JMP CHECKRECV JMP CHECKRECV ; 3 (35 with following BIT TICK)
; CLOSE TCP CONNECTION ; CLOSE TCP CONNECTION