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https://github.com/KrisKennaway/ii-vision.git
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Add more comments and clean up timings for op_ack. Magically,
this all fits in exact multiples of 36/37 ticks!
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commit
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@ -5,7 +5,16 @@
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; Copyright © 2019 Kris Kennaway. All rights reserved.
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; Copyright © 2019 Kris Kennaway. All rights reserved.
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;
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;
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; W5100/Uthernet II code based on "TCP SOCKET DEMO FOR W5100/UTHERNET II" by D. Finnigan.
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; W5100/Uthernet II code based on "TCP SOCKET DEMO FOR W5100/UTHERNET II" by D. Finnigan.
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;
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; Multiplexed audio/video decoder for 64K, 1MHz Apple II systems with Uthernet II,
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; supporting:
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; - 5 bit DAC audio at ~14KHz
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; - 56 KB/sec video update bandwidth
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;
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; This is sufficient for ~7.5 full page redraws of the hires screen per second, although the
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; effective frame rate is typically higher, when there are only partial changes between
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; frames.
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;
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; Fitting this in 64K together with ProDOS is pretty tight. We make use of 3 memory
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; Fitting this in 64K together with ProDOS is pretty tight. We make use of 3 memory
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; segments:
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; segments:
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;
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;
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@ -285,15 +294,27 @@ init_mainloop:
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; via STA foo,X (5 cycles) instead of STA foo (4 cycles)
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; via STA foo,X (5 cycles) instead of STA foo (4 cycles)
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;
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;
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; During the ACK opcode and subsequent outer loop transit, we keep ticking the speaker
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; During the ACK opcode and subsequent outer loop transit, we keep ticking the speaker
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; every 36/37 cycles to maintain a multiple of 73 cycles
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; every 36/37 cycles to maintain a multiple of 73 cycles. Because we guarantee that the ACK
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; XXX is it actually an integer multiple?
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; appears every 2048 bytes, this lets us simplify the accounting for the W5100 socket buffer
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; management (moving the address pointer etc).
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;4 stores:
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;- 73 cycles
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;- 14364 Hz
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;- 57456 stores/sec
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;- 5 bit DAC
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; Somewhat magically, the cycle timings all align on multiples of 73 (with tick intervals
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; alternating 36 and 37 cycles, as in the "neutral" (i.e. 50% speaker duty cycle)
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; op_tick_36_* opcodes), without much work needed to optimize this. I'm pretty sure there's
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; still "unnecessary" work being done (e.g. low address bytes that are always 0) but there's
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; need to work harder since we'd end up having to pad them back anyway.
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;
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; With a 73 cycle fundamental opcode (speaker) period and 1MHz clock speed, this gives a
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; 14364 Hz "carrier" for the audio DAC, which is slightly audible (at least to my ageing
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; ears) but quite acceptable.
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;
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; i.e. we get about 14364 player opcodes/second, with the ACK "slow path" costing 6 opcodes.
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; Each of the "fat" audio/video opcodes results in storing 4 video bytes, so we store
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; about 56KB of video data per second.
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;
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; With 192x40 = 7680 visible bytes on the hires screen, this means we can do about 7.5 full
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; page redraws/sec; but the effective frame rate will usually be much higher than this
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; since we only prioritize the parts of the screen that are changing between frames.
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; Check for any received data
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; Check for any received data
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CHECKRECV:
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CHECKRECV:
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@ -1201,6 +1222,11 @@ op_tick_62 63
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op_tick_64 63
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op_tick_64 63
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op_tick_66 63
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op_tick_66 63
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; Manage W5100 socket buffer and ACK TCP stream.
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;
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; In order to simplify the buffer management we expect this ACK opcode to consume
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; the last 4 bytes in a 2K "TCP frame". i.e. we can assume that we need to consume
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; exactly 2K from the W5100 socket buffer.
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op_ack:
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op_ack:
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BIT tick ; 4
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BIT tick ; 4
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@ -1214,34 +1240,27 @@ op_ack:
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STA WADRL ; 4
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STA WADRL ; 4
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LDA WDATA ; 4 HIGH BYTE
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LDA WDATA ; 4 HIGH BYTE
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;TAY ; 2 SAVE
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LDX WDATA ; 4 LOW BYTE ; not sure if needed -- but we have cycles to spare so who cares!
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LDX WDATA ; 4 LOW BYTE ; needed? I don't think so
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;BEQ @1 ; 3
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;BRK
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;@1:
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;ADC #$00 ; 2 GETSIZE ; ADD LOW BYTE OF RECEIVED SIZE
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ADC #$08 ; 2 ADD HIGH BYTE OF RECEIVED SIZE
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BIT tick ; 4 (36)
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;TAX ; 2 SAVE
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;TYA ; 2 GET HIGH BYTE BACK
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ADC #$08 ; 2 GETSIZE+1 ; ADD HIGH BYTE OF RECEIVED SIZE
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BIT tick ; 4 (36) ; don't mess with Carry prior to ADC
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TAY ; 2 SAVE
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TAY ; 2 SAVE
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LDA #<S0RXRD ; 2
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LDA #<S0RXRD ; 2
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STA WADRL ; 4 XXX already there?
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STA WADRL ; 4 Might not be needed, but have cycles to spare
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STY WDATA ; 4 SEND HIGH BYTE
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STY WDATA ; 4 SEND HIGH BYTE
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STX WDATA ; 4 SEND LOW BYTE
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STX WDATA ; 4 SEND LOW BYTE
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; SEND THE RECV COMMAND
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; SEND THE RECV COMMAND
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LDA #<S0CR ; 2
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LDA #<S0CR ; 2
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STA WADRL ; 4
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STA WADRL ; 4
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LDA #SCRECV ; 2
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LDA #SCRECV ; 2
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STA WDATA ; 4
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STA WDATA ; 4
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JMP CHECKRECV ; 3 (35 with following BIT tick)
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NOP ; 2 ; see, we even have cycles left over!
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JMP CHECKRECV ; 3 (37 with following BIT tick)
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; CLOSE TCP CONNECTION
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; CLOSE TCP CONNECTION
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@ -1270,43 +1289,4 @@ CLOSECONN:
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;ISCLOSED:
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;ISCLOSED:
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; RTS ; SOCKET IS CLOSED
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; RTS ; SOCKET IS CLOSED
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; SUPPORT SUBROUTINE: CLEANOUT
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; "CLEANS UP" OUTPUT FOR THE APPLE BY
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; SETTING THE HIGH BIT AND DOING SOME SUBSTITUTIONS
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;CLEANOUT:
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; ORA #%10000000 ; SET HIGH BIT
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; CMP #$8A ; NEWLINE?
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; BNE @OUT
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; LDA #$8D ; CONVERT TO <CR>
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;@OUT:
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; JMP COUT ; THIS WILL DO THE RTS
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; DEBUG - PRINT W5100 STARTADR AND SIZE
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;DEBUG:
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; LDA #$A0 ; " "
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; JSR COUT
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; LDA #$A4 ; "$"
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; JSR COUT
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; LDA GETOFFSET+1
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; LDX GETOFFSET
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; JSR PRNTAX
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; LDA #$A0 ; " "
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; JSR COUT
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; LDA #$A4 ; "$"
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; JSR COUT
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; LDA GETSTARTADR+1
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; LDX GETSTARTADR
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; JSR PRNTAX
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; LDA #$A0 ; " "
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; JSR COUT
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; LDA #$A4 ; "$"
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; JSR COUT
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;LDA GETSIZE+1
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; LDX GETSIZE
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; JSR PRNTAX
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; LDA #$8D
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; JMP COUT ; THIS WILL DO THE RTS
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.endproc
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.endproc
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