209 lines
7.3 KiB
Python
209 lines
7.3 KiB
Python
import machine
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import memory
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import uthernet
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from py65 import disassembler
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from py65.devices import mpu65c02
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class AppleII(machine.Machine):
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def __init__(self, uthernet: uthernet.Uthernet):
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memory_map = [
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memory.MemoryRegion("Zero page", 0x0000, 0x00ff),
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memory.MemoryRegion("Stack", 0x0100, 0x01ff),
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memory.MemoryRegion(
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"Text page 1", 0x0400, 0x7ff,
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write_interceptor=self.TextPageWriteInterceptor),
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memory.MemoryRegion("HiRes Page 1", 0x2000, 0x2fff),
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memory.MemoryRegion("HiRes Page 2", 0x4000, 0x4fff, writable=False),
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memory.MemoryRegion(
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"IO page", 0xc000, 0xc0ff,
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read_interceptor=self.io_interceptor,
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write_interceptor=self.io_interceptor),
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memory.MemoryRegion("Slot 1 ROM", 0xc100, 0xc1ff, writable=False),
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memory.MemoryRegion("Slot 2 ROM", 0xc200, 0xc2ff, writable=False),
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memory.MemoryRegion("Slot 3 ROM", 0xc300, 0xc3ff, writable=False),
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memory.MemoryRegion("Slot 4 ROM", 0xc400, 0xc4ff, writable=False),
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memory.MemoryRegion("Slot 5 ROM", 0xc500, 0xc5ff, writable=False),
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memory.MemoryRegion("Slot 6 ROM", 0xc600, 0xc6ff, writable=False),
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memory.MemoryRegion("Slot 7 ROM", 0xc700, 0xc7ff, writable=False),
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memory.MemoryRegion(
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"ROM", 0xd000, 0xffff,
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entrypoints={
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0xf3e2: machine._Event("ROM", "HGR"),
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0xfca8: self._Wait,
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0xfded: machine._Event("ROM", "COUT"),
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0xfe89: machine._Event("ROM", "Select the keyboard (IN#0)")
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},
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writable=False
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)
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]
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self.memory_manager = memory.MemoryManager(memory_map)
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self.memory = self.memory_manager.memory
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self.cpu = mpu65c02.MPU(memory=self.memory)
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self.uthernet = uthernet # type: uthernet.Uthernet
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self.disassembler = disassembler.Disassembler(self.cpu)
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def _uther_wmode(mode, value):
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if mode & machine.AccessMode.READ:
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return self.uthernet.read_mode()
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else:
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return self.uthernet.write_mode(value)
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def _uther_wadrh(mode, value):
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old = self.uthernet.ptr
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self.uthernet.ptr = (value << 8) | (self.uthernet.ptr & 0x7f)
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machine.Log("WADRH", "%04x -> %04x" % (old, self.uthernet.ptr))
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def _uther_wadrl(mode, value):
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old = self.uthernet.ptr
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self.uthernet.ptr = (self.uthernet.ptr & 0x7f00) | value
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machine.Log("WADRL", "%04x -> %04x" % (old, self.uthernet.ptr))
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def _uther_wdata(mode, value):
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if mode & machine.AccessMode.READ:
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return self.uthernet.read_data()
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else:
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return self.uthernet.write_data(value)
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def _tick(mode, value):
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machine.Log("Tick", self.cpu.processorCycles)
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# Set up interceptors for accessing various interesting parts of the
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# memory map
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self.io_map = {
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0xc030: (
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machine.AccessMode.RW, "TICK", _tick),
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0xc094: (
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machine.AccessMode.RW, "WMODE", _uther_wmode),
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0xc095: (
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machine.AccessMode.WRITE, "WADRH", _uther_wadrh),
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0xc096: (
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machine.AccessMode.WRITE, "WADRL", _uther_wadrl),
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0xc097: (
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machine.AccessMode.RW, "WDATA", _uther_wdata),
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}
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self.soft_switches = {}
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for ss in [
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machine.SoftSwitch(
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"80Store",
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clear_addr=0xc000,
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set_addr=0xc001,
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status_addr=0xc018,
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callback=machine.SoftSwitch.unimplemented
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),
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machine.SoftSwitch(
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"RamRd",
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clear_addr=0xc002,
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set_addr=0xc003,
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status_addr=0xc013,
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callback=machine.SoftSwitch.unimplemented
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),
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machine.SoftSwitch(
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"RamWrt",
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clear_addr=0xc004,
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set_addr=0xc005,
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status_addr=0xc014,
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callback=machine.SoftSwitch.unimplemented
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),
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machine.SoftSwitch(
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"IntCxROM",
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clear_addr=0xc006,
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set_addr=0xc007,
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status_addr=0xc015,
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callback=machine.SoftSwitch.unimplemented
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),
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machine.SoftSwitch(
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"AltZP",
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clear_addr=0xc008,
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set_addr=0xc009,
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status_addr=0xc016,
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callback=machine.SoftSwitch.unimplemented
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),
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machine.SoftSwitch(
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"SlotC3ROM",
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clear_addr=0xc00a,
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set_addr=0xc00b,
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status_addr=0xc017,
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callback=machine.SoftSwitch.unimplemented
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),
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machine.SoftSwitch(
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"80Col",
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clear_addr=0xc00c,
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set_addr=0xc00d,
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status_addr=0xc01f
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),
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machine.SoftSwitch(
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"AltCharSet",
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clear_addr=0xc00e,
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set_addr=0xc00f,
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status_addr=0xc01e
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),
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machine.SoftSwitch(
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"Text",
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clear_addr=0xc050,
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set_addr=0xc051,
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status_addr=0xc01a,
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mode=machine.AccessMode.RW
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),
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machine.SoftSwitch(
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"Mixed",
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clear_addr=0xc052, set_addr=0xc053,
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status_addr=0xc01b,
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mode=machine.AccessMode.RW
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),
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machine.SoftSwitch(
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"Page2",
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clear_addr=0xc054, set_addr=0xc055,
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status_addr=0xc01c,
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mode=machine.AccessMode.RW
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),
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machine.SoftSwitch(
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"Hires",
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clear_addr=0xc056, set_addr=0xc057,
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status_addr=0xc01d,
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mode=machine.AccessMode.RW
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)
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]:
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self.soft_switches[ss.name] = ss
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ss.register(self.io_map)
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@staticmethod
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def _Wait(_):
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print("Waiting")
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# TODO: convert addresses to screen coordinates
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# See e.g. https://retrocomputing.stackexchange.com/questions/2534/what-are-the-screen-holes-in-apple-ii-graphics
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@staticmethod
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def TextPageWriteInterceptor(address, value):
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print('Wrote "%s" to text page address $%04X' % (chr(value & 0x7f),
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address))
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def Run(self, pc, trace=False):
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ctr = 0
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self.cpu.pc = pc
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old_pc = self.cpu.pc
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while True:
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self.memory_manager.MaybeInterceptExecution(self.cpu, old_pc)
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old_pc = self.cpu.pc
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if trace:
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cpu = str(self.cpu).split("\n")
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if ctr % 20 == 0:
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print(cpu[0])
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print(cpu[1], " $%04X: %-12s %d" % (
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self.cpu.pc,
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self.disassembler.instruction_at(self.cpu.pc)[1],
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self.cpu.processorCycles
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))
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self.cpu.step()
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if self.cpu.pc == old_pc:
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break
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ctr += 1
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