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https://github.com/buserror/mii_emu.git
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cpu: Sprinkle a few cycles here and there
Probably still missing the odd cycles Signed-off-by: Michel Pollet <buserror@gmail.com>
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@ -233,10 +233,10 @@ next_instruction:
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{ // BCC, BCS, BEQ, BMI, BNE, BPL, BVC, BVS
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if (d.s_bit_value == cpu->P.P[d.s_bit]) {
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cpu->_P = cpu->PC + (int8_t)cpu->_P;
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cpu->cycle++;
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if ((cpu->_P & 0xff00) != (cpu->PC & 0xff00))
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cpu->cycle++;
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cpu->PC = cpu->_P;
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cpu->cycle++;
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}
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} break;
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case 0x80:
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@ -361,6 +361,7 @@ next_instruction:
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} break;
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case 0xEA:
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{ // NOP
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cpu->cycle++;
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} break;
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case 0x09: case 0x05: case 0x15: case 0x0D: case 0x1D:
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case 0x19: case 0x01: case 0x11: case 0x12:
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@ -521,31 +522,31 @@ next_instruction:
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} break;
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case 0xAA:
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{ // TAX
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cpu->X = cpu->A;
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cpu->X = cpu->A;cpu->cycle++;
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_NZ(cpu->X);
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} break;
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case 0xA8:
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{ // TAY
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cpu->Y = cpu->A;
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cpu->Y = cpu->A;cpu->cycle++;
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_NZ(cpu->Y);
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} break;
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case 0xBA:
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{ // TSX
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cpu->X = cpu->S;
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cpu->X = cpu->S;cpu->cycle++;
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_NZ(cpu->X);
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} break;
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case 0x8A:
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{ // TXA
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cpu->A = cpu->X;
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cpu->A = cpu->X;cpu->cycle++;
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_NZ(cpu->A);
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} break;
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case 0x9A:
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{ // TXS
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cpu->S = cpu->X;
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cpu->S = cpu->X;cpu->cycle++;
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} break;
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case 0x98:
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{ // TYA
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cpu->A = cpu->Y;
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cpu->A = cpu->Y;cpu->cycle++;
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_NZ(cpu->A);
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} break;
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case 0x07: case 0x17: case 0x27: case 0x37: case 0x47:
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