add (de)acceleration function
This commit is contained in:
parent
bf7bd82b24
commit
257d0ed751
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@ -17,7 +17,8 @@
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; 8A00..8DFF - ProDOS file buffer for PROGRESS file
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; 8E10..8F37 - progress of puzzles in current world
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; 8F38..8FFF - address lookup table for puzzles within following world data
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; 9000..BEFF - world data (read from disk)
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; 9000..BEB3 - world data (read from disk)
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; BEB4..BEFF - (de)acceleration function
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;------------------------------------------------------------------------------
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; soft switches
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@ -75,3 +76,5 @@ PROGRESS = $8ED0 ; 0x0068 bytes
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PUZZLELO = $8F38 ; 0x0064 bytes
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PUZZLEHI = $8F9C ; 0x0064 bytes
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WORLDDATA = $9000 ; 0x2F00 bytes max
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DisableAccelerator = $BEB4
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EnableAccelerator = DisableAccelerator+3
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@ -0,0 +1,380 @@
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;license:MIT
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;(c) 2019-2020 by 4am & qkumba
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;
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; Functions to enable and disable acceleration on various
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; Apple II models, cards, and environments
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;
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; Forked from NORMFAST Release 6 (see changelog below)
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;
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; For Total Replay, we split the machine identification code from
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; the (de)acceleration code, because we can do the ID part once
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; at program startup (when ROM is easily available), then
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; (de)accelerate repeatedly from the language card (when ROM
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; is switched out).
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;
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; --------------------------------------------------------------
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;
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; Original changelog and documentation:
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;
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;;; NORMFAST Disable/enable Apple II compatible accelerator
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; (no copyright info given)
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;
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; Release 7 2019-11-27 FASTChip control just like ZipChip.
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; Prevents unexpected acceleration by user.
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;
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; Release 6 2017-10-05 Fix Mac IIe card check
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;
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; Release 5 2017-09-27 Add Macintosh IIe Card. Addon
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; accelerators are now set blindly, so will access
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; annunciators/IIc locations and may trigger the
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; paddle timer.
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; No plans for the Saturn Systems Accelerator which would
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; require a slot search.
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;
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; Release 4 2017-09-06 Add Laser 128EX, TransWarp I, UW
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;
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; Release 3 2017-08-29 Change FASTChip partially back to
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; release 1, which seems to work the way release 2 was
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; intended?!
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;
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; Release 2 2017-08-27 change enable entry point, add Zip
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; Chip, change setting FASTChip speed to disable/enable
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;
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; Release 1 2017-08-25 IIGS, //c+ and FASTChip
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;
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; WARNING: The memory location to set the accelerator
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; speed may overlap existing locations such as:
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; annuciators or Apple //c specific hardware
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; paddle trigger
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;
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; Known to work: IIGS, //c+
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; Theoretically: FASTChip, Laser 128EX, Mac IIe Card,
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; TransWarp I, trademarked German product, Zip Chip
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;
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; BRUN NORMFAST or CALL 768 to disable the accelerator.
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; CALL 771 to enable the accelerator.
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; Enabling an older accelerator may set maximum speed.
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; Accelerators such as the FASTChip or Zip Chip can run
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; slower than 1Mhz when enabled.
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;
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; NORMFAST is position independent and can be loaded most
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; anywhere in the first 48K of memory.
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; The ROMs must be enabled to identify the model of the
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; computer.
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;
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; This was originally for the //c+ which is normally
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; difficult to set to 1Mhz speed.
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; The other expected use is to set the speed in a program.
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;
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; Written for Andrew Jacobs' Java based dev65 assembler at
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; http://sourceforge.net/projects/dev65 but has portability
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; in mind.
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; addresses are lowercase, constant values are in CAPS
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romid = $FBB3
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; $38=][, $EA=][+, $06=//e compatible
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ROMID_IIECOMPAT = 6
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romid_ec = $FBC0
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; $EA=//e original, $E0=//e enhanced, $E1=//e EDM, $00=//c
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; Laser 128s are $E0
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romid_c = $FBBF
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; $FF=original, $00=Unidisk 3.5 ... $05=//c+
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ROMID_CPLUS = 5
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romid_maciie_2 = $FBDD ; 2
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; IIGS
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idroutine = $FE1F ; SEC, JSR $FE1F, BCS notgs
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gsspeed = $C036
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GS_FAST = $80 ; mask
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; //c+ Cache Glue Gate Array (accelerator)
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cgga = $C7C7 ; entry point
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CGGA_ENABLE = 1 ; fast
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CGGA_DISABLE = 2 ; normal
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CGGA_LOCK = 3
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CGGA_UNLOCK = 4 ; required to make a change
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; Macintosh IIe Card
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maciie = $C02B
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MACIIE_FAST = 4 ; mask
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l128irqpage = $C4
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; From the 4.2, 4.5 and EX2 ROM dumps at the Apple II
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; Documentation Project, the Laser 128 IRQ handlers are
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; in the $C4 page.
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; A comp.sys.apple2 post says the 6.0 ROM for the 128 and
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; 128EX are identical, so there may not be an easy way to
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; tell a plain 128 from an (accelerated) 128EX.
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irq = $FFFE ; 6502 IRQ vector
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; may overlap with paddle trigger
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ex_cfg = $C074 ; bits 7 & 6 for speed
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EX_NOTSPEED = $3F
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EX_1MHZMASK = $0
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EX_2MHZMASK = $80 ; 2.3Mhz
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EX_3MHZMASK = $C0 ; 3.6Mhz
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; FASTChip
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fc_lock = $C06A
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fc_enable = $C06B
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fc_speed = $C06D
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fc_config = $C06E
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fc_data = $C06F
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FC_UNLOCK = $6A ; write 4 times
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FC_LOCK = $A6
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FC_1MHZ = 9
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FC_ON = 40 ; doco says 16.6Mhz
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; TransWarp I
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; may overlap with paddle trigger
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tw1_speed = $C074
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TW1_1MHZ = 1
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TW1_MAX = 0
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; Zip Chip
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; overlaps annunciator 1 & //c vertical blank
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zc_lock = $C05A
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ZC_UNLOCK = $5A ; write 4 times
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ZC_LOCK = $A5
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zc_enable = $C05B
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iobase = $C000 ; easily confused with kbd
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BuildAcceleratorFunction
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; in: none
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; out: A/Y points to lo/hi address of code block
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; X contains length of code block
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;; first check built-in accelerators
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ldx romid
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cpx #ROMID_IIECOMPAT
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bne build_addon ; not a //e
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ldx romid_ec
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beq iic ; //c family
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; not worth the bytes for enhanced //e check
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ldx irq+1
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cpx #l128irqpage
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bne gscheck
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; a Laser 128, hopefully harmless on a non EX
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ldy #EX_3MHZMASK ; phew, all needed bits set
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ldx #<(ex_cfg)
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bne build_setspeed ; always branches
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gscheck
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pha
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sec
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jsr idroutine
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pla
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bcs maccheck ; not a gs
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; set IIGS speed
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ldy #GS_FAST
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ldx #<(gsspeed)
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bne build_setspeed ; always branches
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maccheck
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ldx romid_maciie_2
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cpx #2
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bne build_addon ; no built-in accelerator
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; the IIe Card in a Mac
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ldy #MACIIE_FAST
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ldx #<(maciie)
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bne build_setspeed ; always branches
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iic
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lda #$9D
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sta fixiic
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lda #$C0
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sta fixiic+2
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ldx romid_c
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cpx #ROMID_CPLUS
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bne build_addon ; not a //c+, eventually hit Zip
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lda #<iicplus
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ldy #>iicplus
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ldx #(end_iicplus-iicplus)
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rts
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build_setspeed
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stx setspeed_x
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sty setspeed_y
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lda #<setspeed
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ldy #>setspeed
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ldx #(end_setspeed-setspeed)
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rts
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build_addon
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lda #<addon
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ldy #>addon
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ldx #(end_addon-addon)
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rts
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;-----------------------------------------------------------
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; 3 distinct accelerator functions
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;
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; Only 1 of these will be required on any particular machine.
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;
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; Each has 2 entry points, +0 to disable acceleration and
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; +3 to enable acceleration.
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;
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; setspeed must be self-modified before use (setspeed_x and
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; setspeed_y).
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;
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;-----------------------------------------------------------
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; Function #1: Apple IIc+
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iicplus !pseudopc DisableAccelerator {
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; Set //c+ speed. Uses the horrible firmware in case other
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; code works "by the book", that is can check and set
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; whether the accelerator is enabled.
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; The //c+ is otherwise Zip compatible.
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; This code cannot run from LC, and *must* bank in ROM.
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; CGGA assumes that ROM is already banked in.
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lda #$3A ; DEC, disable accelerator entry point
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!byte $2C ; BIT <ABSOLUTE>, hide next lda #
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lda #$4A ; LSR, enable accelerator entry point
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sta @pokery ; action after CGGA_UNLOCK
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; cgga calls save X and Y regs but sets $0 to 0
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; (this will get a laugh from C programmers)
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lda $0
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pha
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php
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sei ; timing sensitive
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jsr @jiggerypokery
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;lda gMachineInDHGRMode
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;bne + ; DHGR mode doesn't need fix
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sta $C05B ; fix HGR-mode colouring
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+ plp ; restore interrupt state
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pla
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sta $0
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rts
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@jiggerypokery
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tsx
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ldy #(@endpokery - @jiggery)
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@copyiicp
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lda @jiggery-1,y
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pha
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dey
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bne @copyiicp
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txa
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tsx
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iny
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!cpu 65c02
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phy
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phx
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!cpu 6502
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tax
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rts
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@jiggery
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+READ_ROM_NO_WRITE
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lda #CGGA_LOCK ; should lock after a change
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pha
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@pokery
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nop ; SMC
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pha
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lda #CGGA_UNLOCK ; unlock to change
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pha
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jsr cgga ; disable/enable
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jsr cgga
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jsr cgga ; reads parm from stack, must JSR
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txs
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;+READ_RAM2_WRITE_RAM2
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+READ_ROM_NO_WRITE
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rts
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@endpokery
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}
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end_iicplus
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; Function #2: IIgs, Laser 128EX, or IIe card
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;; setspeed - set 1Mhz with AND and fast with OR
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;
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; A = lsb set for normal speed
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; X = low byte address of speed location
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; Y = OR mask for fast
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setspeed
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lda #1 ; disable accelerator entry point
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!byte $2C ; BIT <ABSOLUTE>, hide next lda #
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lda #0 ; enable accelerator entry point
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setspeed_x=*+1
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ldx #$FD ; SMC
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setspeed_y=*+1
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ldy #$FD ; SMC
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lsr
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tya
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bcs setnorm
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ora iobase,x
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ldy #$d6
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bne setsta ; always branches
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setnorm
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eor #$FF
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and iobase,x
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ldy #$56
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setsta
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sta iobase,x
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sty $7FE ; Laser checks it
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rts
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end_setspeed
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; Function #3: Card-based accelerator (TransWarp, ZipChip,
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; FastChip, &c.)
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; We blindly set switches for all known cards.
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addon
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lda #1 ; disable accelerator entry point
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!byte $2C ; BIT <ABSOLUTE>, hide next lda #
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lda #0 ; enable accelerator entry point
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; TransWarp I
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sta tw1_speed
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; no UW support here because the softswitch to enable
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; acceleration triggers DHGR bugs in OpenEmulator :-(
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; Zip Chip
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ldy #FC_1MHZ
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eor #1
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tax
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beq +
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ldy #FC_ON
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+ lda #ZC_UNLOCK
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php
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sei ; following sequence is timing sensitive
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sta zc_lock
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sta zc_lock
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sta zc_lock
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sta zc_lock
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lsr ; not ZC_LOCK or ZC_UNLOCK
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sta zc_lock,x ; disable/enable
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lda #ZC_LOCK
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sta zc_lock
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FASTChip
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lda #FC_UNLOCK
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sta fc_lock
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sta fc_lock
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sta fc_lock
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sta fc_lock
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sta fc_enable
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sty fc_speed
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lda #FC_LOCK
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sta fc_lock
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;ldx gMachineInDHGRMode
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ldx #0
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fixiic
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bit $D05F ; fix colouring on IIc (SMC to STA,X on IIc)
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+ plp ; restore interrupt state
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rts
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end_addon
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@ -14,6 +14,7 @@
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!source "src/macros.a" ; no code
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!source "src/million.init.a" ; one-time initialization code, exits via Start
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!source "src/hw.mockingboard.a"
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!source "src/hw.accel.a"
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FirstMover
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!pseudopc $4000 {
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@ -29,6 +30,7 @@ Start ; X = Mockingboard slot (from init)
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jsr MainMenuEventLoop
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; A = world ID
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bcc +
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jsr EnableAccelerator
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jmp Quit
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+
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sta gWorldID
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@ -18,8 +18,17 @@
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+BUILD_HGR_LOOKUP_TABLES HGRLO, HGRHI
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jsr InitScrollUp
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jsr InitScrollDown
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jsr BuildAcceleratorFunction
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+ST16 @accelSrc
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dex
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-
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@accelSrc=*+1
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lda $FDFD, x
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sta DisableAccelerator, x
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dex
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bpl -
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- inc FM+2
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- inc FM+2 ; relocate program code to $4000
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inc FMDEST+2
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lda FM+2
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cmp #>LastMover
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cmp #$40
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bcs FM
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jsr DisableAccelerator
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jsr GetMockingboardSlot
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;ldx #0 ; [DEBUG] uncomment to disable Mockingboard support
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cpx #0
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