prog8/examples/test.p8

%import textio
%zeropage basicsafe

main {
    sub start() {
        if (cx16.r0 & 1) as bool == false
            cx16.r1++
        else
            cx16.r2++

        if (cx16.r0 & 1) as bool == true
            cx16.r1++
        else
            cx16.r2++

        if not((cx16.r0 & 1) as bool)
            cx16.r1++
        else
            cx16.r2++

        if (cx16.r0 & 1) as bool
            cx16.r1++
        else
            cx16.r2++
    }
}
document the @R0 - @R15 register support for normal subroutine parameters 2024-11-30 19:46:31 +00:00			`%import textio`
			`%zeropage basicsafe`

fix asm optimization regression caused by wrong label prefix comparison 2024-11-13 23:54:07 +00:00			`main {`
ast printing fixes, added alias to syntax files 2024-11-24 06:28:33 +00:00			`sub start() {`
fix failing optimization of 'not' in if statements 2024-12-04 18:00:02 +00:00			`if (cx16.r0 & 1) as bool == false`
			`cx16.r1++`
			`else`
			`cx16.r2++`
Optimize diskio.f_read for size=1, also improve ST check 2024-12-02 20:25:38 +00:00
fix failing optimization of 'not' in if statements 2024-12-04 18:00:02 +00:00			`if (cx16.r0 & 1) as bool == true`
			`cx16.r1++`
			`else`
			`cx16.r2++`
Optimize diskio.f_read for size=1, also improve ST check 2024-12-02 20:25:38 +00:00
fix failing optimization of 'not' in if statements 2024-12-04 18:00:02 +00:00			`if not((cx16.r0 & 1) as bool)`
			`cx16.r1++`
			`else`
			`cx16.r2++`
Optimize diskio.f_read for size=1, also improve ST check 2024-12-02 20:25:38 +00:00
fix failing optimization of 'not' in if statements 2024-12-04 18:00:02 +00:00			`if (cx16.r0 & 1) as bool`
			`cx16.r1++`
			`else`
			`cx16.r2++`
IR: fix invalid asm name matching that resulted in not removing subs with a name matching an IR asm instruction 2024-11-29 23:06:02 +00:00			`}`
romsub @bank now also accepts a variable so the bank can be dynamic 2024-11-05 22:56:58 +00:00			`}`