2023-09-24 21:00:40 +00:00
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; Experimental Vera FX support.
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; Docs:
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; https://github.com/X16Community/x16-docs/blob/master/VERA%20FX%20Reference.md
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; https://docs.google.com/document/d/1q34uWOiM3Be2pnaHRVgSdHySI-qsiQWPTo_gfE54PTg/edit
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verafx {
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2023-10-01 20:02:07 +00:00
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%option no_symbol_prefixing
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2023-09-24 21:00:40 +00:00
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; unsigned multiplication just passes the values as signed to muls
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; if you do this yourself in your call to muls, it will save a few instructions.
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sub mult(uword value1, uword value2) -> uword {
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return muls(value1 as word, value2 as word) as uword
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}
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asmsub muls(word value1 @R0, word value2 @R1) -> word @AY {
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%asm {{
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lda #(2 << 1)
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sta cx16.VERA_CTRL ; $9F25
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stz cx16.VERA_FX_CTRL ; $9F29 (mainly to reset Addr1 Mode to 0)
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lda #%00010000
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sta cx16.VERA_FX_MULT ; $9F2C
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lda #(6 << 1)
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sta cx16.VERA_CTRL ; $9F25
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lda cx16.r0
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ldy cx16.r0+1
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sta cx16.VERA_FX_CACHE_L ; $9F29
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sty cx16.VERA_FX_CACHE_M ; $9F2A
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lda cx16.r1
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ldy cx16.r1+1
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sta cx16.VERA_FX_CACHE_H ; $9F2B
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sty cx16.VERA_FX_CACHE_U ; $9F2C
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lda cx16.VERA_FX_ACCUM_RESET ; $9F29 (DCSEL=6)
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; Set the ADDR0 pointer to $1f9bc and write our multiplication result there
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; (these are the 4 bytes just before the PSG registers start)
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lda #(2 << 1)
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sta cx16.VERA_CTRL
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lda #%01000000 ; Cache Write Enable
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sta cx16.VERA_FX_CTRL
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lda #$bc
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sta cx16.VERA_ADDR_L
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lda #$f9
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sta cx16.VERA_ADDR_M
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lda #$01
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sta cx16.VERA_ADDR_H ; no increment
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stz cx16.VERA_DATA0 ; multiply and write out result
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lda #%00010001 ; $01 with Increment 1
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sta cx16.VERA_ADDR_H ; so we can read out the result
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stz cx16.VERA_FX_CTRL ; Cache write disable
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lda cx16.VERA_DATA0
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ldy cx16.VERA_DATA0
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rts
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; we skip the upper 16 bits of the result:
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; lda cx16.VERA_DATA0
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; sta $0402
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; lda cx16.VERA_DATA0
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; sta $0403
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}}
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}
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}
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