Apple-2-SW/prog8
1
0
Fork 0
mirror of https://github.com/irmen/prog8.git synced 2024-11-23 07:32:10 +00:00
Code Issues Projects Releases Wiki Activity
82898f7bba
prog8/examples/cx16/multipalette.p8

415 lines
11 KiB
Plaintext
Raw Normal View History

fix inlining subroutines multiple times
2021-04-02 19:22:57 +00:00
%import palette
%import gfx2
%option no_sysinit
main {
sub start() {
; palette.set_rgb(&colors, len(colors))
x16 r39: cx16.screen_set_mode() -> cx16.screen_mode()
2022-03-31 16:17:28 +00:00
void cx16.screen_mode(128, false) ; low-res bitmap 256 colors
fix inlining subroutines multiple times
2021-04-02 19:22:57 +00:00
cx16.FB_init()
cx16.VERA_DC_VIDEO = (cx16.VERA_DC_VIDEO & %11001111) | %00010000 ; enable only layer 0
cx16.VERA_L0_CONFIG = %00000110 ; 4 bpp = 16 colors
;cx16.VERA_L0_MAPBASE = 0
;cx16.VERA_L0_TILEBASE = 0
ubyte pix=0
ubyte ypos
cx16.FB_cursor_position(0, 0)
some x16 example changes to use the improved mode $80 screen resolution
2022-03-28 20:28:39 +00:00
for ypos in 0 to 239 {
fix inlining subroutines multiple times
2021-04-02 19:22:57 +00:00
repeat 320/2 {
cx16.FB_set_pixel((pix&15)<<4 | (pix&15))
pix++
}
pix=0
}
; color index 0 can't be swapped - set it to black in both ranges
palette.set_color(0, 0)
palette.set_color(16, 0)
api change: new 'cbm' module that now contains the common CBM kernal variables and routines.
2023-04-28 21:13:03 +00:00
sys.set_rasterirq(&irq.irqhandler, 0)
fix inlining subroutines multiple times
2021-04-02 19:22:57 +00:00
repeat {
; don't exit
}
}
}
irq {
ubyte phase = 0
uword next_rasterline = 0
const ubyte increment = 4 ; 4 scanlines = 2 lores pixels per color swap (2 scanlines is too tight)
no longer allow subroutine name same as its block name due to asm symbol scoping issues
2021-06-12 15:31:09 +00:00
sub irqhandler() {
fix inlining subroutines multiple times
2021-04-02 19:22:57 +00:00
if phase & 1 == 0 {
%asm {{
lda #0 ; activate palette #0 (first set of colors)
sta cx16.VERA_L0_HSCROLL_H
stz cx16.VERA_CTRL
lda #<$fa00+32+2
sta cx16.VERA_ADDR_L
lda #>$fa00+32+2
sta cx16.VERA_ADDR_M
lda #%00010001
sta cx16.VERA_ADDR_H
; change 15 palette entries 1..15 (0 is fixed)
lda #<$e000
sta $02
lda #>$e000
sta $02
ldy #0
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
; lda #$0f
; sta cx16.VERA_DATA0
; lda #0
; sta cx16.VERA_DATA0
; lda #$0f
; sta cx16.VERA_DATA0
; lda #0
; sta cx16.VERA_DATA0
; lda #$0f
; sta cx16.VERA_DATA0
; lda #0
; sta cx16.VERA_DATA0
; lda #$0f
; sta cx16.VERA_DATA0
; lda #0
; sta cx16.VERA_DATA0
; lda #$0f
; sta cx16.VERA_DATA0
; lda #0
; sta cx16.VERA_DATA0
; lda #$0f
; sta cx16.VERA_DATA0
; lda #0
; sta cx16.VERA_DATA0
; lda #$0f
; sta cx16.VERA_DATA0
; lda #0
; sta cx16.VERA_DATA0
; lda #$0f
; sta cx16.VERA_DATA0
; lda #0
; sta cx16.VERA_DATA0
; lda #$0f
; sta cx16.VERA_DATA0
; lda #0
; sta cx16.VERA_DATA0
; lda #$0f
; sta cx16.VERA_DATA0
; lda #0
; sta cx16.VERA_DATA0
; lda #$0f
; sta cx16.VERA_DATA0
; lda #0
; sta cx16.VERA_DATA0
; lda #$0f
; sta cx16.VERA_DATA0
; lda #0
; sta cx16.VERA_DATA0
; lda #$0f
; sta cx16.VERA_DATA0
; lda #0
; sta cx16.VERA_DATA0
; lda #$0f
; sta cx16.VERA_DATA0
; lda #0
; sta cx16.VERA_DATA0
; lda #$0f
; sta cx16.VERA_DATA0
; lda #0
; sta cx16.VERA_DATA0
}}
}
else {
%asm {{
lda #1 ; activate palette #1 (second set of colors)
sta cx16.VERA_L0_HSCROLL_H
stz cx16.VERA_CTRL
lda #<$fa00+2
sta cx16.VERA_ADDR_L
lda #>$fa00+2
sta cx16.VERA_ADDR_M
lda #%00010001
sta cx16.VERA_ADDR_H
; change 15 palette entries 1..15 (0 is fixed)
lda #<$f000
sta $02
lda #>$f000
sta $02
ldy #0
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
iny
lda (2),y
sta cx16.VERA_DATA0
; lda #$ff
; sta cx16.VERA_DATA0
; lda #0
; sta cx16.VERA_DATA0
; lda #$ff
; sta cx16.VERA_DATA0
; lda #0
; sta cx16.VERA_DATA0
; lda #$ff
; sta cx16.VERA_DATA0
; lda #0
; sta cx16.VERA_DATA0
; lda #$ff
; sta cx16.VERA_DATA0
; lda #0
; sta cx16.VERA_DATA0
; lda #$ff
; sta cx16.VERA_DATA0
; lda #0
; sta cx16.VERA_DATA0
; lda #$ff
; sta cx16.VERA_DATA0
; lda #0
; sta cx16.VERA_DATA0
; lda #$ff
; sta cx16.VERA_DATA0
; lda #0
; sta cx16.VERA_DATA0
; lda #$ff
; sta cx16.VERA_DATA0
; lda #0
; sta cx16.VERA_DATA0
; lda #$ff
; sta cx16.VERA_DATA0
; lda #0
; sta cx16.VERA_DATA0
; lda #$ff
; sta cx16.VERA_DATA0
; lda #0
; sta cx16.VERA_DATA0
; lda #$ff
; sta cx16.VERA_DATA0
; lda #0
; sta cx16.VERA_DATA0
; lda #$ff
; sta cx16.VERA_DATA0
; lda #0
; sta cx16.VERA_DATA0
; lda #$ff
; sta cx16.VERA_DATA0
; lda #0
; sta cx16.VERA_DATA0
; lda #$ff
; sta cx16.VERA_DATA0
; lda #0
; sta cx16.VERA_DATA0
; lda #$ff
; sta cx16.VERA_DATA0
; lda #0
; sta cx16.VERA_DATA0
}}
}
phase++
next_rasterline += increment
some x16 example changes to use the improved mode $80 screen resolution
2022-03-28 20:28:39 +00:00
if next_rasterline >= 480 {
fix inlining subroutines multiple times
2021-04-02 19:22:57 +00:00
next_rasterline = 0
phase = 0
}
api change: new 'cbm' module that now contains the common CBM kernal variables and routines.
2023-04-28 21:13:03 +00:00
sys.set_rasterline(next_rasterline)
fix inlining subroutines multiple times
2021-04-02 19:22:57 +00:00
;
; uword[16] colors1 = 0
; uword[16] colors2 = 200
;
; palette.set_rgb(colors1, len(colors1))
; palette.set_rgb(colors2, len(colors2))
}
}
Reference in New Issue Copy Permalink