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fix IR codegen for the RETURN 4,5,6,7

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added cx16.EXTAPI_memory_decompress_from_func for cx16
This commit is contained in:
Irmen de Jong
2025-01-22 02:31:21 +01:00
parent 277a1a32b2
commit 0191acb2b3
11 changed files with 48 additions and 40 deletions
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codeGenIntermediate/src/prog8/codegen/intermediate/AssignmentGen.kt
+1 -1
View File
@@ -46,7 +46,7 @@ internal class AssignmentGen(private val codeGen: IRCodeGen, private val express
normalsub.returns.zip(assignmentTargets).zip(registersReverseOrder).forEach {
val target = it.first.second as PtAssignTarget
if(!target.void) {
val assignSingle = PtAssignment(assignment.position)
val assignSingle = PtAssignment(assignment.position, assignment.isVarInitializer)
assignSingle.add(target)
assignSingle.add(PtIdentifier("cx16.${it.second.toString().lowercase()}", it.first.first, assignment.position))
result += translateRegularAssign(assignSingle)
codeGenIntermediate/src/prog8/codegen/intermediate/IRCodeGen.kt
+2 -4
View File
@@ -1764,11 +1764,9 @@ class IRCodeGen(
for ((value, register) in ret.children.zip(registersReverseOrder)) {
val tr = expressionEval.translateExpression(value as PtExpression)
addToResult(result, tr, tr.resultReg, -1)
result += IRCodeChunk(null, null).also {
it += IRInstruction(Opcode.STOREM, tr.dt, reg1=tr.resultReg, labelSymbol = "cx16.${register.toString().lowercase()}")
it += IRInstruction(Opcode.RETURN)
}
addInstr(result, IRInstruction(Opcode.STOREM, tr.dt, reg1=tr.resultReg, labelSymbol = "cx16.${register.toString().lowercase()}"), null)
}
addInstr(result, IRInstruction(Opcode.RETURN), null)
return result
}