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vm: fix codegen for storing to pointer indexed
This commit is contained in:
Irmen de Jong
parent
f70b914779
commit
0a3cd652b0
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@ -168,7 +168,7 @@ internal class AssignmentGen(private val codeGen: CodeGen, private val expressio
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throw AssemblyError("non-array var indexing requires bytes index")
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val idxReg = codeGen.vmRegisters.nextFree()
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code += expressionEval.translateExpression(array.index, idxReg, -1)
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code += VmCodeInstruction(Opcode.LOADIX, vmDt, reg1=resultRegister, reg2=idxReg, value = variableAddr)
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code += VmCodeInstruction(Opcode.STOREIX, vmDt, reg1=resultRegister, reg2=idxReg, value = variableAddr)
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return code
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}
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@ -42,10 +42,10 @@ internal class BuiltinFuncGen(private val codeGen: CodeGen, private val exprGen:
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"sort" -> funcSort(call)
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"reverse" -> funcReverse(call)
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"swap" -> funcSwap(call)
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"rol" -> funcRolRor2(Opcode.ROXL, call, resultRegister)
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"ror" -> funcRolRor2(Opcode.ROXR, call, resultRegister)
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"rol2" -> funcRolRor2(Opcode.ROL, call, resultRegister)
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"ror2" -> funcRolRor2(Opcode.ROR, call, resultRegister)
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"rol" -> funcRolRor(Opcode.ROXL, call, resultRegister)
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"ror" -> funcRolRor(Opcode.ROXR, call, resultRegister)
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"rol2" -> funcRolRor(Opcode.ROL, call, resultRegister)
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"ror2" -> funcRolRor(Opcode.ROR, call, resultRegister)
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else -> TODO("builtinfunc ${call.name}")
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}
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}
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@ -368,7 +368,7 @@ internal class BuiltinFuncGen(private val codeGen: CodeGen, private val exprGen:
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return code
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}
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private fun funcRolRor2(opcode: Opcode, call: PtBuiltinFunctionCall, resultRegister: Int): VmCodeChunk {
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private fun funcRolRor(opcode: Opcode, call: PtBuiltinFunctionCall, resultRegister: Int): VmCodeChunk {
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val vmDt = codeGen.vmType(call.args[0].type)
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val code = VmCodeChunk()
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code += exprGen.translateExpression(call.args[0], resultRegister, -1)
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@ -50,17 +50,14 @@ internal class AstOnetimeTransforms(private val program: Program, private val op
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} else {
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val fcall = parent as? IFunctionCall
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if(fcall!=null) {
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// TODO for now, codegen seems wrong when using pointer indexed args to an in-place modifying function.
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if(fcall.target.nameInSource.size==1 && fcall.target.nameInSource[0] in InplaceModifyingBuiltinFunctions) {
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// TODO currently, 6502 codegen is wrong when using pointer indexed args to an in-place modifying function.
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if(options.compTarget.name!=VMTarget.NAME
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&& fcall.target.nameInSource.size==1
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&& fcall.target.nameInSource[0] in InplaceModifyingBuiltinFunctions) {
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val memread = DirectMemoryRead(add, arrayIndexedExpression.position)
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return listOf(IAstModification.ReplaceNode(arrayIndexedExpression, memread, parent))
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} else {
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return noModifications
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}
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}
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else {
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return noModifications
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}
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}
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}
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@ -3,7 +3,7 @@ TODO
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For next release
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^^^^^^^^^^^^^^^^
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- optimize pointervar indexing codegen: make them work as params to in-place modifying functions (rol, swap, ...)
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- optimize pointervar indexing codegen: fix 6502 codegen for params to in-place modifying functions (rol, swap, ...)
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- optimize pointervar indexing codegen: writing (all sorts of things)
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- pipe operator: (targets other than 'Virtual'): allow non-unary function calls in the pipe that specify the other argument(s) in the calls. Already working for VM target.
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- add McCarthy evaluation to shortcircuit and/or expressions. First do ifs by splitting them up? Then do expressions that compute a value?
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123
examples/test.p8
123
examples/test.p8
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@ -29,22 +29,6 @@ main {
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; txt.spc()
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; }
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; sub derp(ubyte u1, ubyte u2, ubyte u3) {
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; txt.print_ub(u1)
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; txt.spc()
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; txt.print_ub(u2)
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; txt.spc()
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; txt.print_ub(u3)
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; txt.nl()
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; }
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sub derp2(ubyte u1, ubyte u2) {
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txt.print_ub(u1)
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txt.spc()
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txt.print_ub(u2)
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txt.nl()
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}
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sub start() {
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; mcCarthy()
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;test_stack.test()
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@ -55,66 +39,55 @@ main {
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ubyte[10] data = [11,22,33,4,5,6,7,8,9,10]
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uword bitmapbuf = &data
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;derp(data[0],data[1],data[2])
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;derp(bitmapbuf[0], bitmapbuf[1], bitmapbuf[2])
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derp2(1,2)
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derp2(one, two)
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derp2(data[1], data[2])
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derp2(bitmapbuf[1], bitmapbuf[2])
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; 11 22 33
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txt.print_ub(bitmapbuf[0])
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txt.spc()
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txt.print_ub(bitmapbuf[1])
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txt.spc()
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txt.print_ub(bitmapbuf[2])
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txt.nl()
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rol(bitmapbuf[0])
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rol(bitmapbuf[0])
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txt.print_ub(bitmapbuf[0]) ; 44
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txt.spc()
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ror(bitmapbuf[0])
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ror(bitmapbuf[0])
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txt.print_ub(bitmapbuf[0]) ; 11
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txt.nl()
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; value = bitmapbuf[2]
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; txt.print_ub(value) ;; 33
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; txt.nl()
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;
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; ; 11 22 33
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; txt.print_ub(bitmapbuf[0])
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; txt.spc()
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; txt.print_ub(bitmapbuf[1])
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; txt.spc()
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; txt.print_ub(bitmapbuf[2])
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; txt.nl()
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; rol(bitmapbuf[0])
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; rol(bitmapbuf[0])
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; txt.print_ub(bitmapbuf[0]) ; 44
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; txt.spc()
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; ror(bitmapbuf[0])
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; ror(bitmapbuf[0])
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; txt.print_ub(bitmapbuf[0]) ; 11
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; txt.nl()
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;
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; ; 22 44 66
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; txt.print_ub(bitmapbuf[0]*2)
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; txt.spc()
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; txt.print_ub(bitmapbuf[1]*2)
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; txt.spc()
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; txt.print_ub(bitmapbuf[2]*2)
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; txt.nl()
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;
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; value = one+one+one+one+one
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; txt.print_ub(value) ; 5
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; txt.nl()
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;
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; bitmapbuf[0] = one
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; bitmapbuf[1] = one+one
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; bitmapbuf[2] = one+one+one
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; bitmapbuf[2] += 4
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; bitmapbuf[2] -= 2
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; bitmapbuf[2] -= 2
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; swap(bitmapbuf[0], bitmapbuf[1])
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;
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; ; 2 1 3
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; txt.print_ub(bitmapbuf[0])
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; txt.spc()
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; txt.print_ub(bitmapbuf[1])
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; txt.spc()
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; txt.print_ub(bitmapbuf[2])
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; txt.nl()
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;
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; for value in data {
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; txt.print_ub(value)
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; txt.spc()
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; }
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; txt.nl()
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; 22 44 66
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txt.print_ub(bitmapbuf[0]*2)
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txt.spc()
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txt.print_ub(bitmapbuf[1]*2)
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txt.spc()
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txt.print_ub(bitmapbuf[2]*2)
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txt.nl()
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value = one+one+one+one+one
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txt.print_ub(value) ; 5
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txt.nl()
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bitmapbuf[0] = one
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bitmapbuf[1] = one+one
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bitmapbuf[2] = one+one+one
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bitmapbuf[2] += 4
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bitmapbuf[2] -= 2
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bitmapbuf[2] -= 2
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swap(bitmapbuf[0], bitmapbuf[1])
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; 2 1 3
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txt.print_ub(bitmapbuf[0])
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txt.spc()
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txt.print_ub(bitmapbuf[1])
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txt.spc()
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txt.print_ub(bitmapbuf[2])
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txt.nl()
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for value in data {
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txt.print_ub(value)
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txt.spc()
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}
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txt.nl()
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;test_stack.test()
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@ -31,6 +31,7 @@ loadr reg1, reg2 - load reg1 with value in register reg2
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storem reg1, address - store reg1 at memory address
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storei reg1, reg2 - store reg1 at memory indirect, memory pointed to by reg2
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storex reg1, reg2, address - store reg1 at memory address, indexed by value in reg2
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storeix reg1, reg2, pointeraddr - store reg1 at memory indirect, pointed to by pointeraddr indexed by value in reg2
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storezm address - store zero at memory address
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storezi reg1 - store zero at memory pointed to by reg1
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storezx reg1, address - store zero at memory address, indexed by value in reg
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@ -190,6 +191,7 @@ enum class Opcode {
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STOREM,
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STOREI,
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STOREX,
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STOREIX,
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STOREZM,
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STOREZI,
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STOREZX,
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@ -489,7 +491,8 @@ val instructionFormats = mutableMapOf(
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Opcode.STOREM to InstructionFormat.from("BW,r1,v | F,fr1,v"),
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Opcode.STOREI to InstructionFormat.from("BW,r1,r2 | F,fr1,r1"),
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Opcode.STOREX to InstructionFormat.from("BW,r1,r2,v | F,fr1,r1,v"),
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Opcode.STOREZM to InstructionFormat.from("BW,v | F,v"),
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Opcode.STOREIX to InstructionFormat.from("BW,r1,r2,v | F,fr1,r1,v"),
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Opcode.STOREZM to InstructionFormat.from("BW,v | F,v"),
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Opcode.STOREZI to InstructionFormat.from("BW,r1 | F,r1"),
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Opcode.STOREZX to InstructionFormat.from("BW,r1,v | F,r1,v"),
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Opcode.JUMP to InstructionFormat.from("N,v"),
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@ -95,6 +95,7 @@ class VirtualMachine(val memory: Memory, program: List<Instruction>) {
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Opcode.LOADR -> InsLOADR(ins)
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Opcode.STOREM -> InsSTOREM(ins)
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Opcode.STOREX -> InsSTOREX(ins)
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Opcode.STOREIX -> InsSTOREIX(ins)
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Opcode.STOREI -> InsSTOREI(ins)
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Opcode.STOREZM -> InsSTOREZM(ins)
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Opcode.STOREZX -> InsSTOREZX(ins)
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@ -363,6 +364,24 @@ class VirtualMachine(val memory: Memory, program: List<Instruction>) {
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pc++
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}
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private fun InsSTOREIX(i: Instruction) {
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when (i.type!!) {
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VmDataType.BYTE -> {
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val pointer = memory.getUW(i.value!!) + registers.getUB(i.reg2!!)
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memory.setUB(pointer.toInt(), registers.getUB(i.reg1!!))
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}
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VmDataType.WORD -> {
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val pointer = memory.getUW(i.value!!) + registers.getUB(i.reg2!!)
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memory.setUW(pointer.toInt(), registers.getUW(i.reg1!!))
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}
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VmDataType.FLOAT -> {
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val pointer = memory.getUW(i.value!!) + registers.getUB(i.reg1!!)
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memory.setFloat(pointer.toInt(), registers.getFloat(i.fpReg1!!))
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}
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}
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pc++
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}
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private fun InsSTOREZM(i: Instruction) {
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when(i.type!!) {
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VmDataType.BYTE -> memory.setUB(i.value!!, 0u)
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