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https://github.com/irmen/prog8.git
synced 2024-11-26 11:49:22 +00:00
vm: just use new register instead of trying to (ab)use reg 0
This commit is contained in:
Irmen de Jong
parent
ba614801ee
commit
0a48ef3030
@ -57,8 +57,9 @@ internal class AssignmentGen(private val codeGen: CodeGen, private val expressio
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code // do nothing, mem=mem null assignment.
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else {
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// read and write a (i/o) memory location to itself.
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code += VmCodeInstruction(Opcode.LOADM, vmDt, reg1 =0, value = address)
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code += VmCodeInstruction(Opcode.STOREM, vmDt, reg1=0, value = address)
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val tempReg = codeGen.vmRegisters.nextFree()
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code += VmCodeInstruction(Opcode.LOADM, vmDt, reg1 = tempReg, value = address)
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code += VmCodeInstruction(Opcode.STOREM, vmDt, reg1 = tempReg, value = address)
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code
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}
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}
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@ -138,43 +138,49 @@ internal class BuiltinFuncGen(private val codeGen: CodeGen, private val exprGen:
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private fun funcSgn(call: PtBuiltinFunctionCall, resultRegister: Int): VmCodeChunk {
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val code = VmCodeChunk()
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code += exprGen.translateExpression(call.args.single(), 0, -1)
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code += VmCodeInstruction(Opcode.SGN, codeGen.vmType(call.type), reg1=resultRegister, reg2=0)
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val reg = codeGen.vmRegisters.nextFree()
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code += exprGen.translateExpression(call.args.single(), reg, -1)
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code += VmCodeInstruction(Opcode.SGN, codeGen.vmType(call.type), reg1=resultRegister, reg2=reg)
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return code
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}
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private fun funcSqrt16(call: PtBuiltinFunctionCall, resultRegister: Int): VmCodeChunk {
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val code = VmCodeChunk()
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code += exprGen.translateExpression(call.args.single(), 0, -1)
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code += VmCodeInstruction(Opcode.SQRT, VmDataType.WORD, reg1=resultRegister, reg2=0)
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val reg = codeGen.vmRegisters.nextFree()
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code += exprGen.translateExpression(call.args.single(), reg, -1)
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code += VmCodeInstruction(Opcode.SQRT, VmDataType.WORD, reg1=resultRegister, reg2=reg)
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return code
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}
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private fun funcPop(call: PtBuiltinFunctionCall): VmCodeChunk {
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val code = VmCodeChunk()
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code += VmCodeInstruction(Opcode.POP, VmDataType.BYTE, reg1=0)
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code += assignRegisterTo(call.args.single(), 0)
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val reg = codeGen.vmRegisters.nextFree()
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code += VmCodeInstruction(Opcode.POP, VmDataType.BYTE, reg1=reg)
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code += assignRegisterTo(call.args.single(), reg)
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return code
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}
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private fun funcPopw(call: PtBuiltinFunctionCall): VmCodeChunk {
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val code = VmCodeChunk()
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code += VmCodeInstruction(Opcode.POP, VmDataType.WORD, reg1=0)
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code += assignRegisterTo(call.args.single(), 0)
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val reg = codeGen.vmRegisters.nextFree()
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code += VmCodeInstruction(Opcode.POP, VmDataType.WORD, reg1=reg)
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code += assignRegisterTo(call.args.single(), reg)
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return code
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}
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private fun funcPush(call: PtBuiltinFunctionCall): VmCodeChunk {
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val code = VmCodeChunk()
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code += exprGen.translateExpression(call.args.single(), 0, -1)
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code += VmCodeInstruction(Opcode.PUSH, VmDataType.BYTE, reg1=0)
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val reg = codeGen.vmRegisters.nextFree()
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code += exprGen.translateExpression(call.args.single(), reg, -1)
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code += VmCodeInstruction(Opcode.PUSH, VmDataType.BYTE, reg1=reg)
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return code
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}
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private fun funcPushw(call: PtBuiltinFunctionCall): VmCodeChunk {
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val code = VmCodeChunk()
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code += exprGen.translateExpression(call.args.single(), 0, -1)
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code += VmCodeInstruction(Opcode.PUSH, VmDataType.WORD, reg1=0)
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val reg = codeGen.vmRegisters.nextFree()
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code += exprGen.translateExpression(call.args.single(), reg, -1)
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code += VmCodeInstruction(Opcode.PUSH, VmDataType.WORD, reg1=reg)
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return code
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}
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@ -202,15 +202,16 @@ class CodeGen(internal val program: PtProgram,
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val iterableVar = symbolTable.lookup(iterable.targetName) as StStaticVariable
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val loopvarAddress = allocations.get(loopvar.scopedName)
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val indexReg = vmRegisters.nextFree()
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val tmpReg = vmRegisters.nextFree()
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val loopLabel = createLabelName()
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val endLabel = createLabelName()
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if(iterableVar.dt==DataType.STR) {
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// iterate over a zero-terminated string
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code += VmCodeInstruction(Opcode.LOAD, VmDataType.BYTE, reg1=indexReg, value=0)
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code += VmCodeLabel(loopLabel)
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code += VmCodeInstruction(Opcode.LOADX, VmDataType.BYTE, reg1 = 0, reg2=indexReg, value = arrayAddress)
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code += VmCodeInstruction(Opcode.BZ, VmDataType.BYTE, reg1=0, labelSymbol = endLabel)
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code += VmCodeInstruction(Opcode.STOREM, VmDataType.BYTE, reg1=0, value = loopvarAddress)
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code += VmCodeInstruction(Opcode.LOADX, VmDataType.BYTE, reg1=tmpReg, reg2=indexReg, value = arrayAddress)
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code += VmCodeInstruction(Opcode.BZ, VmDataType.BYTE, reg1=tmpReg, labelSymbol = endLabel)
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code += VmCodeInstruction(Opcode.STOREM, VmDataType.BYTE, reg1=tmpReg, value = loopvarAddress)
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code += translateNode(forLoop.statements)
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code += VmCodeInstruction(Opcode.INC, VmDataType.BYTE, reg1=indexReg)
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code += VmCodeInstruction(Opcode.JUMP, labelSymbol = loopLabel)
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@ -225,8 +226,8 @@ class CodeGen(internal val program: PtProgram,
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code += VmCodeInstruction(Opcode.LOAD, VmDataType.BYTE, reg1=lengthReg, value=lengthBytes)
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code += VmCodeLabel(loopLabel)
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code += VmCodeInstruction(Opcode.BEQ, VmDataType.BYTE, reg1=indexReg, reg2=lengthReg, labelSymbol = endLabel)
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code += VmCodeInstruction(Opcode.LOADX, vmType(elementDt), reg1=0, reg2=indexReg, value=arrayAddress)
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code += VmCodeInstruction(Opcode.STOREM, vmType(elementDt), reg1=0, value = loopvarAddress)
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code += VmCodeInstruction(Opcode.LOADX, vmType(elementDt), reg1=tmpReg, reg2=indexReg, value=arrayAddress)
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code += VmCodeInstruction(Opcode.STOREM, vmType(elementDt), reg1=tmpReg, value = loopvarAddress)
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code += translateNode(forLoop.statements)
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code += addConstReg(VmDataType.BYTE, indexReg, elementSize)
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code += VmCodeInstruction(Opcode.JUMP, labelSymbol = loopLabel)
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@ -288,7 +289,7 @@ class CodeGen(internal val program: PtProgram,
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endvalueReg = vmRegisters.nextFree()
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code += VmCodeInstruction(Opcode.LOAD, loopvarDt, reg1 = endvalueReg, value = rangeEndWrapped)
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} else {
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endvalueReg = 0
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endvalueReg = -1 // not used
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}
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code += VmCodeInstruction(Opcode.LOAD, loopvarDt, reg1=indexReg, value=rangeStart)
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code += VmCodeInstruction(Opcode.STOREM, loopvarDt, reg1=indexReg, value=loopvarAddress)
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@ -3,9 +3,6 @@ TODO
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For next release
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^^^^^^^^^^^^^^^^
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- vm: don't use register 0/1 "as convenience" where it's not required, just allocate a new register anyway.
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search for reg.\s?=\s?0
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...
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@ -7,53 +7,56 @@
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; NOTE: meant to test to virtual machine output target (use -target vitual)
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other {
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ubyte value = 42
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sub getter() -> ubyte {
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return value
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}
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}
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main {
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sub ands(ubyte arg, ubyte b1, ubyte b2, ubyte b3, ubyte b4) -> ubyte {
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return arg>b1 and arg>b2 and arg>b3 and arg>b4
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}
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; sub ands(ubyte arg, ubyte b1, ubyte b2, ubyte b3, ubyte b4) -> ubyte {
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; return arg>b1 and arg>b2 and arg>b3 and arg>b4
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; }
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;
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; sub ors(ubyte arg, ubyte b1, ubyte b2, ubyte b3, ubyte b4) -> ubyte {
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; return arg==b1 or arg==b2 or arg==b3 or arg==b4
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; }
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sub ors(ubyte arg, ubyte b1, ubyte b2, ubyte b3, ubyte b4) -> ubyte {
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return arg==b1 or arg==b2 or arg==b3 or arg==b4
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}
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; sub mcCarthy() {
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; ubyte @shared a
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; ubyte @shared b
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;
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; txt.print_ub(ands(10, 2,3,4,5))
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; txt.spc()
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; txt.print_ub(ands(10, 20,3,4,5))
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; txt.spc()
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; txt.print_ub(ors(10, 2,3,40,5))
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; txt.spc()
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; txt.print_ub(ors(10, 1,10,40,5))
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; txt.spc()
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; }
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sub start() {
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ubyte @shared a
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ubyte @shared b
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; mcCarthy()
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txt.print_ub(ands(10, 2,3,4,5))
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txt.spc()
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txt.print_ub(ands(10, 20,3,4,5))
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txt.spc()
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txt.print_ub(ors(10, 2,3,40,5))
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txt.spc()
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txt.print_ub(ors(10, 1,10,40,5))
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txt.spc()
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ubyte bb
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for bb in 250 to 255 {
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txt.print_ub(bb)
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txt.spc()
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}
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txt.nl()
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; ; a "pixelshader":
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; sys.gfx_enable(0) ; enable lo res screen
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; ubyte shifter
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;
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; repeat {
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; uword xx
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; uword yy = 0
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; repeat 240 {
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; xx = 0
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; repeat 320 {
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; sys.gfx_plot(xx, yy, xx*yy + shifter as ubyte)
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; xx++
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; }
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; yy++
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; }
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; shifter+=4
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; }
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sys.gfx_enable(0) ; enable lo res screen
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ubyte shifter
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repeat {
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uword xx
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uword yy = 0
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repeat 240 {
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xx = 0
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repeat 320 {
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sys.gfx_plot(xx, yy, xx*yy + shifter as ubyte)
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xx++
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}
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yy++
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}
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shifter+=4
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}
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}
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}
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