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https://github.com/irmen/prog8.git
synced 2026-04-19 04:17:08 +00:00
vm: get rid of .p8virt file and cruft
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@@ -1,125 +1,16 @@
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package prog8.codegen.virtual
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import prog8.code.core.AssemblyError
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import prog8.code.core.CompilationOptions
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import prog8.code.core.IAssemblyProgram
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import prog8.intermediate.*
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import prog8.vm.Syscall
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import java.io.BufferedWriter
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import kotlin.io.path.bufferedWriter
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import kotlin.io.path.div
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import prog8.intermediate.IRFileWriter
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import prog8.intermediate.IRProgram
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internal class VmAssemblyProgram(override val name: String, private val irProgram: IRProgram): IAssemblyProgram {
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override fun assemble(dummyOptions: CompilationOptions): Boolean {
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val outfile = irProgram.options.outputDir / ("$name.p8virt")
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println("write code to $outfile")
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// at last, allocate the variables in memory.
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val allocations = VmVariableAllocator(irProgram.st, irProgram.encoding, irProgram.options.compTarget)
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outfile.bufferedWriter().use { out ->
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allocations.asVmMemory().forEach { (name, alloc) ->
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out.write("var ${name} $alloc\n")
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}
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out.write("------PROGRAM------\n")
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if(!irProgram.options.dontReinitGlobals) {
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out.write("; global var inits\n")
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irProgram.globalInits.forEach { out.writeLine(it) }
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}
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irProgram.blocks.firstOrNull()?.let {
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if(it.subroutines.any { it.name=="main.start" }) {
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// there is a "main.start" entrypoint, jump to it
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out.writeLine(IRCodeInstruction(Opcode.JUMP, labelSymbol = "main.start"))
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}
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}
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out.write("; actual program code\n")
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irProgram.blocks.forEach { block ->
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if(block.address!=null)
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TODO("blocks can't have a load address for vm")
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out.write("; BLOCK ${block.name} ${block.position}\n")
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block.inlineAssembly.forEach { asm ->
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out.write("; ASM ${asm.position}\n")
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out.write(asm.assembly)
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out.write("\n")
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}
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block.subroutines.forEach { sub ->
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out.write("; SUB ${sub.name} ${sub.position}\n")
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out.write("_${sub.name}:\n")
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sub.chunks.forEach { chunk ->
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if(chunk is IRInlineAsmChunk) {
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out.write("; ASM ${chunk.position}\n")
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out.write(processInlinedAsm(chunk.assembly, allocations))
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out.write("\n")
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} else {
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chunk.lines.forEach { out.writeLine(it) }
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}
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}
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out.write("; END SUB ${sub.name}\n")
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}
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block.asmSubroutines.forEach { sub ->
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out.write("; ASMSUB ${sub.name} ${sub.position}\n")
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out.write("_${sub.name}:\n")
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out.write(processInlinedAsm(sub.assembly, allocations))
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out.write("\n; END ASMSUB ${sub.name}\n")
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}
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out.write("; END BLOCK ${block.name}\n")
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}
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}
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override fun assemble(options: CompilationOptions): Boolean {
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val writtenFile = IRFileWriter(irProgram, null).write()
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println("Wrote intermediate representation to $writtenFile")
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return true
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}
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private fun processInlinedAsm(asm: String, allocations: VmVariableAllocator): String {
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// TODO do we have to replace variable names by their allocated address???
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return asm
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}
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}
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private fun BufferedWriter.writeLine(line: IRCodeLine) {
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when(line) {
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is IRCodeComment -> {
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write("; ${line.comment}\n")
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}
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is IRCodeInstruction -> {
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if(line.ins.opcode==Opcode.SYSCALL) {
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// convert IM Syscall to VM Syscall
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val vmSyscall = when(line.ins.value!!) {
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IMSyscall.SORT_UBYTE.ordinal -> Syscall.SORT_UBYTE
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IMSyscall.SORT_BYTE.ordinal -> Syscall.SORT_BYTE
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IMSyscall.SORT_UWORD.ordinal -> Syscall.SORT_UWORD
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IMSyscall.SORT_WORD.ordinal -> Syscall.SORT_WORD
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IMSyscall.ANY_BYTE.ordinal -> Syscall.ANY_BYTE
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IMSyscall.ANY_WORD.ordinal -> Syscall.ANY_WORD
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IMSyscall.ANY_FLOAT.ordinal -> Syscall.ANY_FLOAT
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IMSyscall.ALL_BYTE.ordinal -> Syscall.ALL_BYTE
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IMSyscall.ALL_WORD.ordinal -> Syscall.ALL_WORD
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IMSyscall.ALL_FLOAT.ordinal -> Syscall.ALL_FLOAT
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IMSyscall.REVERSE_BYTES.ordinal -> Syscall.REVERSE_BYTES
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IMSyscall.REVERSE_WORDS.ordinal -> Syscall.REVERSE_WORDS
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IMSyscall.REVERSE_FLOATS.ordinal -> Syscall.REVERSE_FLOATS
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else -> throw IllegalArgumentException("invalid IM syscall number ${line.ins.value}")
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}
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val newIns = line.ins.copy(value = vmSyscall.ordinal)
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write(newIns.toString() + "\n")
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} else
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write(line.ins.toString() + "\n")
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}
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is IRCodeInlineBinary -> {
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write("!binary ")
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line.data.withIndex().forEach {(index, byte) ->
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write(byte.toString(16).padStart(2,'0'))
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if(index and 63 == 63 && index<line.data.size-1)
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write("\n!binary ")
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}
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write("\n")
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}
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is IRCodeLabel -> {
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write("_${line.name}:\n")
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}
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else -> throw AssemblyError("invalid IR code line")
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}
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}
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@@ -1,97 +0,0 @@
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package prog8.codegen.virtual
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import prog8.code.core.*
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import prog8.intermediate.IRSymbolTable
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import prog8.intermediate.getTypeString
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internal class VmVariableAllocator(val st: IRSymbolTable, val encoding: IStringEncoding, memsizer: IMemSizer) {
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internal val allocations = mutableMapOf<String, Int>()
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private var freeMemoryStart: Int
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val freeMem: Int
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get() = freeMemoryStart
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init {
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var nextLocation = 0
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for (variable in st.allVariables()) {
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val memsize =
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when (variable.dt) {
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DataType.STR -> variable.onetimeInitializationStringValue!!.first.length + 1 // include the zero byte
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in NumericDatatypes -> memsizer.memorySize(variable.dt)
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in ArrayDatatypes -> memsizer.memorySize(variable.dt, variable.length!!)
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else -> throw InternalCompilerException("weird dt")
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}
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allocations[variable.name] = nextLocation
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nextLocation += memsize
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}
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for(slab in st.allMemorySlabs()) {
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// we ignore the alignment for the VM.
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allocations[slab.name] = nextLocation
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nextLocation += slab.size.toInt()
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}
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freeMemoryStart = nextLocation
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}
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fun asVmMemory(): List<Pair<String, String>> {
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val mm = mutableListOf<Pair<String, String>>()
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// normal variables
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for (variable in st.allVariables()) {
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val location = allocations.getValue(variable.name)
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val value = when(variable.dt) {
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DataType.FLOAT -> (variable.onetimeInitializationNumericValue ?: 0.0).toString()
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in NumericDatatypes -> (variable.onetimeInitializationNumericValue ?: 0).toHex()
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DataType.STR -> {
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val encoded = encoding.encodeString(variable.onetimeInitializationStringValue!!.first, variable.onetimeInitializationStringValue!!.second) + listOf(0u)
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encoded.joinToString(",") { it.toInt().toHex() }
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}
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DataType.ARRAY_F -> {
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if(variable.onetimeInitializationArrayValue!=null) {
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variable.onetimeInitializationArrayValue!!.joinToString(",") { it.number!!.toString() }
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} else {
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(1..variable.length!!).joinToString(",") { "0" }
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}
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}
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in ArrayDatatypes -> {
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if(variable.onetimeInitializationArrayValue!==null) {
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variable.onetimeInitializationArrayValue!!.joinToString(",") {
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if(it.number!=null)
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it.number!!.toHex()
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else
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"&${it.addressOf!!.joinToString(".")}"
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}
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} else {
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(1..variable.length!!).joinToString(",") { "0" }
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}
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}
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else -> throw InternalCompilerException("weird dt")
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}
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mm.add(Pair(variable.name, "@$location ${getTypeString(variable)} $value"))
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}
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// memory mapped variables
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for (variable in st.allMemMappedVariables()) {
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val value = when(variable.dt) {
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DataType.FLOAT -> "0.0"
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in NumericDatatypes -> "0"
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DataType.ARRAY_F -> (1..variable.length!!).joinToString(",") { "0.0" }
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in ArrayDatatypes -> (1..variable.length!!).joinToString(",") { "0" }
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else -> throw InternalCompilerException("weird dt for mem mapped var")
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}
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mm.add(Pair(variable.name, "@${variable.address} ${getTypeString(variable)} $value"))
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}
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// memory slabs.
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for(slab in st.allMemorySlabs()) {
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val address = allocations.getValue(slab.name)
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mm.add(Pair(slab.name, "@$address ubyte[${slab.size}] 0"))
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}
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return mm
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}
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}
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